Self-powered High-performance Full-wave Rectifier with a...

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.6, DECEMBER, 2017 ISSN(Print) 1598-1657 https://doi.org/10.5573/JSTS.2017.17.6.815 ISSN(Online) 2233-4866

Manuscript received Jan. 13, 2017; accepted Oct. 10, 2017 Dept. of Electronics Engineering, Incheon National University E-mail : [email protected]

Self-powered High-performance Full-wave Rectifier with a Vibration Detection Function for Energy

Harvesting Applications

Eun-Jung Yoon and Chong-Gun Yu

Abstract—In this paper, a full-wave rectifier (FWR) with a simple vibration detector is presented for vibrational energy harvesting systems. Conventional output-powered active FWRs consume power from the harvested energy even when the system is not harvesting any energy. To overcome the problem, a technique using a simple vibration detector consisting of a peak detector and a level converter is proposed. The vibration detector detects whether vibrational energy exists in the input terminal and disables the FWR when there is no vibrational energy. The proposed FWR with the vibration detector is designed using a 0.35-µm CMOS process. The measurement results show that the proposed FWR rectifies input signals with amplitudes in the range of 1.4-3.3 V with a maximum power efficiency of 97% and voltage efficiency over 99%. The rectifier can operate with input signals in the frequency range of 5 Hz-10 kHz. Compared with the rectifier without the vibration detector, a decrease in leakage current by approximately 20 times can be achieved by using the proposed vibration detector. The proposed rectifier does not require any off-chip components to enable full chip integration, and the die area of the proposed circuit is 338 μm × 460 μm without pads. Index Terms—Full-wave rectifier, vibrational energy, energy harvesting, vibration detector, active diode

I. INTRODUCTION

Recently, energy harvesting has been attracting considerable research interest [1-4]. Vibrational energy is one of the major energy sources being explored for energy harvesting. This form of energy is usually transduced into electrical energy using piezoelectric (PZT) devices. Because the outputs of a PZT device supply an AC voltage, a rectifier (an ac-dc converter) is required to generate a DC power supply for application loads, as shown in Fig. 1. The rectifier must have high performance and conversion efficiency in order to transfer the maximum amount of power from the harvester to the load.

Conventional passive full-wave rectifiers (FWRs) using four diode-connected MOSFETs [3] or gate cross-coupled rectifiers using two MOS diodes and two MOS switches [4, 5] suffer from diode voltage drop that reduces the available output voltage and thus system efficiency. Thus, active FWRs have been proposed to reduce diode voltage drop and power loss. Single-stage and two-stage structures have been widely used for

Pie

zoe

lec

tric

Tra

nsd

uc

er

Lo

ad

Full-Wave Rectifier

(AC-DC Converter)

AC DC

Fig. 1. Block diagram of general vibrational energy harvesting system.

816 EUN-JUNG YOON et al : SELF-POWERED HIGH-PERFORMANCE FULL-WAVE RECTIFIER WITH A VIBRATION …

implementation of active FWRs. One of the single-stage active FWRs [6-11] is shown in Fig. 2. This rectifier consists of two active diodes and two MOSFET switches. The active diode consists of a PMOS switch and a comparator. The comparators of the active diodes are powered from the output of the rectifier (VSTO), and they detect the voltage difference between the two terminals (VPZT and VSTO), determining when to turn the PMOS switch on or off. A two-stage implementation [12-16] is shown in Fig. 3. The first stage is a negative voltage converter (NVC) that converts the negative half wave into a positive half wave with minimized voltage drop and power consumption. This stage cannot charge the storage capacitor (CSTO) directly because the current direction cannot be controlled. The possible reverse current is blocked by an active diode shown in the second stage of Fig. 3. The second stage consists of a PMOS switch and a comparator.

Two schemes are adopted for powering the comparator. In the first scheme [12] the comparator is powered from the input terminal (VDD = VNVC), whereas in the other

scheme [6-9, 13-15], the comparator is powered from the output terminal (VDD = VSTO). In the input-powered configuration, the comparator consumes power only when the input is sufficiently high. As a result, the rectifier has no standby power consumption when the harvester is not active. The comparator is limited in performance because it is powered from the ac voltage (VNVC). Thus, the peak efficiency of the input-powered rectifier is limited to 82.4% [12]. In the output-powered configuration, the comparator is powered from the dc voltage (VSTO) after start-up, and thus, its performance can be better than that of the input-powered scheme. The output-powered rectifier exhibits a better peak efficiency up to 91.2% [8]. Nevertheless, output-powered rectifiers have one major drawback when used for energy harvesting systems. They consume power from the storage capacitor even when the system is not harvesting any energy. If there are long periods of inactivity of the harvester, the storage capacitor will be fully discharged.

In this paper, a self-powered high-performance full-wave rectifier with a vibration detection function for vibrational energy harvesting systems is presented. We adopt the two-stage active rectifier configuration and propose a simple vibration detector [9] to turn off the comparator of the active diode to overcome the problem of output-powered rectifiers when there is no vibrational energy.

II. CIRCUIT DESIGN

The block diagram of the proposed FWR with a vibration detector is shown in Fig. 4. The FWR is the two-stage active rectifier as shown in Fig. 3, where the comparator is powered from the output terminal; however, it is designed to have an enable function.

The sizes of the power switches in the NVC and active diode should be large enough to reduce on-resistance, so that both the voltage drop and power consumption of the FWR are minimized. However, a wide transistor has negative effects such as large area, high leakage and low gate oxide breakdown voltage.

In this work, the FWR has been designed in a 0.35 μm CMOS technology with Vthn = 0.63 V and |Vthp| = 0.79 V. The W/L ratio of 500/0.35 in μm is used for the PMOS and NMOS switches in the NVC. The W/L ratio of the PMOS switch in the active diode is 1000/0.35 in μm. The

+

-

+

-

+ VSTO -

+

VPZT

-

NMOS SwitchesActive Diodes

Fig. 2. Single-stage active full-wave rectifier.

+

-

VPZT

+

-

VNVC

VDD

CSTO

VSTO

RLoad

Negative Voltage Converter

Active Diode

Fig. 3. Two-stage active full-wave rectifier.

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, VOL.17, NO.6, DECEMBER, 2017 817

estimated on-resistances of the PMOS and NMOS switches in the NVC are around 10 Ω and 3 Ω, respectively. The estimated on-resistance of the PMOS switch in the active diode is around 5 Ω.

A vibration detector is used to disable the comparator when there is no alternating signal in the input terminal (VPZT). As a result, the leakage current from the output to the active diode, Ileak,w/ VD, can be considerably reduced compared to the leakage current of the rectifier without the vibration detector, Ileak,w/o VD, when the harvester is not active.

The vibration detector comprises a simple peak detector and a level shifter as shown in Fig. 4. The designed peak detector consists of a p-type diode of size 2 μm × 2 μm and a small capacitor (CPD = 30 fF). If the harvester is active, the peak detector detects the peak value of an input ac signal (VPZT+), and thus, the output signal EN goes to a ‘high’ level that enables the comparator. If there is no vibration or the vibration is weak, the capacitor CPD is discharged, and the signal EN returns to a ‘low’ level, thus disabling the comparator. As the output of the peak detector VPD is reduced owing to the diode voltage drop, a level converter is employed to recover the degraded signal into a full-scale digital signal. Since the capacitance at node VPD is very small, the charge to be discharged is not large. Therefore, the diode leakage path is sufficient for the discharge, eliminating the need for extra circuits for discharging operations.

The schematic of the level converter is shown in Fig. 5(a). The RLC value used in this design is 1 MΩ. The simulated transfer curves at different temperatures and process corners are shown in Fig. 5(b). The transition point is typically 634 mV with a variation of −80 mV and + 50 mV by temperature and process corners.

A simple two-stage comparator with enable switches is designed to control the PMOS switch in the active diode. A schematic of the designed comparator with enable switches is shown in Fig. 6. To supply the comparator with a constant bias current even when in the presence of a changing supply voltage (VSTO), a current reference circuit based on a supply-independent reference architecture [5] is used. As shown in Fig. 6, the reference circuit includes a start-up circuit [17], which consumes

CSTO

Negative Voltage Converter

Active Diode

+

-

VPZT

RLoad

EN

VPD

CPD

LevelConverter

Vibration Detector

VSTO

IPZT

ILeak,w/ VD

VNVC

Fig. 4. Proposed FWR with vibration detector.

(a)

(b)

Fig. 5. (a) Schematic of level converter, (b) Transfer curves of level converter at different temperatures and process corners.

IN+ IN-

GND

VSTO

OUT

EN

EN

Start-up Current Reference Comparator Inverter

Fig. 6. Schematic of designed comparator with enable switches.


no power after startup. The comparator is based on a differential stage, a common-source output amplifier and an inverter. The designed comparator has a dc gain of 100 dB, a 3 dB frequency of 100 Hz, and it consumes 80 nA from a supply voltage of 3.3 V.

III. EXPERIMENTAL RESULTS

The proposed FWR has been designed and fabricated using a 0.35 μm CMOS process. The photograph of the fabricated die is presented in Fig. 7. It has an active area of 338 μm × 460 μm without pads. For the experiment, an 80 Hz, 3.3 V amplitude sinewave from an Agilent 33250A function generator [18] is used as a default input waveform to mimic the output of a PZT device. The function generator has an internal resistance of 50 Ω. The selected value of the storage capacitor CSTO is 47 µF.

Fig. 8 shows the measured waveforms of VPZT+ and VSTO for different load conditions. As shown in Fig. 8(a), the output VSTO successfully follows the peak of the input VPZT+ when the FWR is unloaded. The voltage drop compared with the input amplitude is 15 mV, corresponding to 0.45% of the input amplitude. When a 1 kΩ load resistor is connected at the output, the input voltage drops from the applied voltage of 3.3 V to 2.82 V because of the internal resistance of the function generator. As shown in Fig. 8(b), the average VSTO voltage is 2.60 V, and thus, the voltage drop is 220 mV, which results in a voltage efficiency of 92.2%.

Fig. 9 shows the measured waveforms of VSTO with and without the vibration detector when the vibration disappears. The FWR without the vibration detector

Fig. 7. Photograph of the fabricated die.

(a)

(b)

Fig. 8. Measured waveforms of VPZT+ and VSTO for different load conditions (a) RLoad = ∞, (b) RLoad = 1 kΩ.

Fig. 9. Measured waveforms of VSTO when the vibration disappears.


consumes power from the storage capacitor after the vibration disappears, and therefore, VSTO decreases gradually. This is because the comparator is not disabled and consumes power continuously from the storage capacitor. For the input condition of 80 Hz and 3.3 V, the leakage current of the FWR without the vibration detector is 80 nA; however, the leakage current of the FWR with the vibration detector is 4 nA. It can thus be seen that using the proposed vibration detector achieves approximately a 20 times decrease in the leakage current.

Fig. 10 shows the measured disable delay time (DDT) and enable delay time (EDT). When the vibration disappears, the ‘EN’ signal returns to a ‘low’ level to disable the comparator with a DDT of 800 ms due to the time required for the discharge of the capacitor CPD through the diode leakage path. EDT is the time from the start of the vibration to the operation of the comparator. The measured EDT is less than 1 ms. The DDT distribution measured for ten sample chips is shown in Fig. 11. The proposed circuit has a mean DDT of 1 s with a standard deviation of 385 ms.

Fig. 12 shows the measured DDT versus input peak voltage. As the input peak voltage decreases, the DDT is also reduced because the discharge time of CPD from VPZT,peak+ − VD (a diode voltage) to the transition point of the level converter is reduced as the VPZT,peak+ decreases. When the VPZT,peak+ is less than 1.4 V the designed circuit does not work. This is because the designed comparator in Fig. 6 does not operate properly when the supply voltage is less than 1.4 V.

Fig. 13 shows the measured EN signal when the peak voltage of VPZT+ decreases from 3.3 to 2 V and then 1 V. While the peak value of the input signal is greater than the transition voltage of the level converter plus the diode

Fig. 10. Measured VPZT+ and EN when the vibration disappears and appears again.

Fig. 11. Measured DDT distribution for ten chips.

Fig. 12. Measured DDT versus input peak voltage.

Fig. 13. Measured EN signal when the input peak voltage decreases from 3.3 to 2 V and then 1V.


voltage, which is about 1.3 V at typical-typical process and 27 as can be seen in Fig. 5(b), the EN signal maintains a ‘high’ level, and thus, the comparator of the active diode is enabled. When the input peak voltage becomes 1 V, the EN signal returns to a ‘low’ level, and the comparator is disabled.

Fig. 14 shows the measured voltage efficiency (ηV) and power efficiency (ηP) for different input peak voltages operating at 80 Hz. The ηV is measured for the unloaded condition, while ηP is measured for a load resistance of 5.1 kΩ. The voltage efficiency (or voltage conversion ratio) is defined as the ratio of the average output voltage to the peak magnitude of the AC input voltage [10, 14-16]. The power efficiency (or power conversion efficiency) is defined as the ratio of the average output power to the input power [10, 12-16]. Therefore, the ηV and ηP are given by Eqs. (1, 2), respectively.

+

=ò

peakPZT

T

STO

V V

dtVT

,

0

1

h (1)

ò

ò×--+

==T

PZTPZTPZT

T

LoadSTO

PZT

STOP

dtIVVT

dtRVT

PP

0

0

2

])]()[(1

]/[1

h

(2)

The designed FWR has a voltage efficiency of over 99% starting at 1.3 V, which further increases to a maximum value of 99.6% at 1.5 V when the FWR is

unloaded. Once the input peak voltage is larger than 1.4 V, the power efficiency is greater than 90%. The FWR reaches the maximum power efficiency of 97.6% at 2 V. With the decrease of input peak voltage, the ηP is reduced rapidly at around 1.4 V. This is because the performance of the comparator used in the active diode is degraded when the supply voltage is less than 1.4 V.

Fig. 15 shows the voltage and power efficiency for different load resistances. The designed FWR is working well down to 1 kΩ with high voltage efficiencies over 90%. At smaller load resistance the voltage efficiency drops below 90% owing to the increasing voltage drops on the MOSFET switches in the NVC and active diode. As for the power efficiency of FWRs, the conduction losses at MOSFET switches are dominant at small load resistances while the losses caused by power consumption of the comparator in the active diode are dominant at large load resistances [19]. The measured power efficiencies of the designed FWR are greater than 90% for 1 kΩ £ RLoad £ 43 kΩ. The peak power efficiency is 97% at 5.1 kΩ. Beyond 5.1 kΩ, the power efficiency decreases with increasing load resistance because the comparator’s power consumption begins to dominate over the output power.

The designed FWR has also been tested for different input frequencies, and the results are shown in Fig. 16. The measured peak voltage efficiency is 99.5%, and a peak power efficiency of 97.4% occurs at 5 kHz. It can be seen that the voltage and power efficiencies of the proposed FWR are greater than 90% for input source frequencies less than 10 kHz. At source frequencies

Fig. 14. Measured voltage and power efficiency versus input peak voltage, f = 80 Hz, RLoad = 5.1 kΩ for ηP , RLoad = ∞ for ηV.

Fig. 15. Measured voltage and power efficiency versus load resistance, VPZT,peak+ = 3.3 V, f = 80 Hz.


greater than 10 kHz, they start to decrease below 90% due to the bandwidth limit of the designed comparator. Because the output frequencies of most vibration energy harvesting sources lie between 10 Hz and 1 kHz [20], the designed FWR satisfies this frequency range with high efficiencies greater than 90%. Therefore, the proposed FWR can be applied for most vibration energy harvesting applications.

To test the functionality of the proposed circuit with a real vibrational energy harvester, a commercially available piezoelectric device (QP20W [21]) from Mouser Electronics was mounted on a shaker as shown in Fig. 17. The shaker is driven with a specific power amplifier 2718 from Brüel & Kjær, with the command signals coming from a function generator.

Fig. 18 shows the measured waveforms of VPZT+ and VSTO at open-circuit load. The output VSTO successfully follows the peak of the AC input, and the voltage drop compared with the input amplitude is 10 mV. The real piezoelectric device has an internal impedance much larger than 50 Ω. Therefore, when the FWR is loaded, the input voltage of the FWR is considerably reduced as compared with the case of using the function generator. When RLoad is 10 kΩ, the measured peak voltage of VPZT+ is 1.5 V. However, the measured voltage efficiency is 99.1%, which is almost the same as when the function generator is used. Similar characteristics have also been observed when tested at various load resistances.

The measured DDT with a vibrational energy harvester source is shown in Fig. 19. The DDT increases

Fig. 16. Measured voltage and power efficiency versus input frequency, VPZT,peak+ = 3.3 V, RLoad = 5.1 kΩ for ηP , RLoad = ∞for ηV.

Fig. 17. Experimental setup with a real vibrational energy harvester (QP20W).

Fig. 18. Functional test with a real vibrational energy harvestersource at open-circuit load.

Fig. 19. Functional test with a real vibrational energy harvestersource at open-circuit load.


to 7.6 s due to a relatively large internal capacitance of the piezoelectric device. However, it is proved that the advantage of the proposed technique is valid in a real energy harvesting environment.

Table 1 compares the performance of the proposed FWR with previously reported rectifiers for energy harvesting applications. It should be noted that the results of the references [11, 14, 15] are from simulation. It can be seen that the proposed FWR competes with state-of-the-art FWRs and even shows better performance in voltage and power efficiencies. In addition, as the most significant difference from the other output-powered rectifiers, the proposed FWR has the lowest leakage current by using the vibration detector when the system is not harvesting any energy.

V. CONCLUSIONS

An enhanced FWR with a vibration detection function is presented. The proposed rectifier overcomes the leakage current from the storage capacitor associated with the power consumption of output-powered FWRs when there is no vibrational energy. A simple vibration detector is implemented which consists of a peak

detector and a level converter. The FWR is implemented in a 0.35 μm CMOS process and experimentally verified. Experimental results show that an approximate 20 times decrease in leakage current can be achieved by using the vibration detector. The proposed rectifier works properly with input signals in the amplitude range of 1.4-3.3 V and in the frequency range of 5 Hz-10 kHz. It achieves a maximum power efficiency of 97% and voltage efficiency over 99%. The proposed vibration detector can be applied for various types of active rectifiers.

ACKNOWLEDGMENTS

This research was supported by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (2010-0021112) and was partially supported by IDEC.

REFERENCES

[1] E.-J. Yoon and C.-G. Yu, "Power management circuits for self-powered systems based on micro-scale solar energy harvesting," International

Table 1. Performance comparison of state-of-the-art full-wave rectifiers for energy harvesting applications

[12] [14] [10] [7] [11] [15] [8] This work Year 2010 2010 2012 2012 2013 2014 2015 2016

Process (μm) 0.5 CMOS

0.18 CMOS

0.18 CMOS

0.18 CMOS - 0.18

CMOS 0.18

CMOS 0.35

CMOS VIN (V) 0.65-2.5 0.7-1.8 0.8-2.7 2.8 3.1 0.45-1.8 3 1.4-3.3

Frequency (Hz) 1-100k 100k-1.5M 10M 200 - 10-1k 200 5-10k Type Two-stage Two-stage Single-stage Single-stage Single-stage Two-stage Single-stage Two-stage

Vibration detection No No No No No No No Yes

Comparator powering

Input powered Output powered - Output powered Using ideal

op-amp Output powered Output powered Output powered

No. of comparators 1 1 0 2 2 1 2 1

Voltage efficiency

(%) -

88-96 (unloaded)

82-93 (RL=500 Ω)

70-87 (unloaded, 10 MHz)

99 80.6 (RL= 30 kΩ)

95-99 (RL =50 kΩ,

100 Hz)

96.6 (VIN=3 V)

> 99 (VIN>1.3 V,

10 Hz-1 kHz, unloaded)

Power efficiency

(%)

82.4 (VIN=1 V,

20 Hz, RL=2 kΩ)

81.8-87 (RL=500 Ω, 100 kHz)

37-80 (RL=2 kΩ, 10 MHz)

90 (RL=95 kΩ)

93.3 (RL=30 kΩ)

84-98 (RL=10 kΩ ~100 kΩ)

91.2 (RL=100 kΩ)

89.7-97 (80 Hz,

RL=5.1 kΩ)

Input source for measur.

Signal generator Simulation Signal

generator Equiv. circuit of PE device Simulation Simulation Equiv. circuit

of PE device Signal

generator Area

(mm2) 0.026

(w/o pads) Not

integrated 0.61

(w/ pads) 0.24

(w/ pads) Not

integrated Not

integrated 0.016

(w/o pads) 0.16

(w/o pads)

<Note> VIN: Input peak voltage, RL: Load resistance, PE : Piezoelectric


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[5] M. Ghovanloo and K. Najafi, “Fully integrated wideband high-current rectifiers for inductively powered devices,” IEEE J. Solid-State Circuits, vol. 39, No. 11, pp. 1976-1984, Nov. 2004.

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[7] Y. Sun, N. H. Hieu, C.-J. Jeong, and S.-G. Lee, “An integrated high-performance active rectifier for piezoelectric vibration energy harvesting systems,” IEEE Trans. Power Electron. Lett., vol. 27, no. 2, pp. 623-627, Feb. 2012.

[8] X.-D. Do, H.-H. Nguyen, S.-K. Han, D. S. Ha, and S.-G. Lee, “A self-powered high-efficiency rectifier with automatic resetting of transducer capacitance in piezoelectric energy harvesting systems,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst, vol. 23, no. 3, pp. 444-453, Mar. 2015.

[9] E.-J. Yoon, M.-J. Yang, J.-T. Park, and C.-G. Yu, “Full-wave rectifier with vibration detector for vibrational energy harvesting systems,” J. Semiconductor Technology and Science, vol. 16, no. 3, pp. 255-260, Jun. 2016.

[10] S. S. Hashemi, M. Sawan, and Y. Savaria, “A high-efficiency low-voltage CMOS rectifier for harvesting energy in implantable devices,” IEEE

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[11] S. S. P. Baby, R. S. Edward, and C. A. A. Allwyn, “Performance analysis of an efficient active rectifier for powering LEDs using piezoelectric energy harvesting systems,” in Proc. Int. Conf. Circuits, Power and Computing Technologies (ICCPCT), 2013, pp. 376-380.

[12] Y. Rao and D. P. Arnord, “An input-powered active AC/DC converter with zero standby power for energy harvesting applications, ” in Proc. IEEE Energy Conversion Congress and Exposition, 2010, pp. 4441-4446.

[13] C. Peters, O. Kessling, F. Henrici, M. Ortmanns, and Y. Manoli, “CMOS integrated highly efficient full wave rectifier, ” in Proc. IEEE Int. Sym. Circuits and Systems, 2007, pp. 2415-2418.

[14] Q. Li, R. Zhang, Z. Huang, and Y. Inoue, “A low voltage CMOS rectifier for wirelessly powered devices, ” in Proc. IEEE Int. Sym. Circuits and Systems, 2010, pp. 873-876.

[15] Q. Li, J. Wang, D. Niu, and Y. Inoue, “A two-stage CMOS integrated highly efficient rectifier for vibration energy harvesting applications,” J. Int. Council on Electrical Engineering, vol. 4, no. 4, pp. 336-340, 2014.

[16] A. S. Herbawi, O. Paul, and T. Galchev, “An ultra-low-power active AC-DC CMOS converter for sub-1V integrated energy harvesting applications,” in Proc. IEEE Sensors, 2013, pp. 1-4.

[17] B. Ru, “Design of a low-power bandgap current reference, ” in Proc. Int. Conf. E-Product E-Service and E-Entertainment (ICEEE), 2010, pp. 1-3.

[18] Agilent 33250A function/arbitrary waveform generator datasheet. Available: http://literature. cdn.keysight.com/litweb/pdf/5968-8807EN.pdf?id= 1000034211:epsg:dow

[19] E.-J. Yoon, M.-J. Yang, and C.-G. Yu, "Performance comparison of full-wave rectifiers for vibrational energy harvesting," Information, vol. 18, no. 5(A), pp. 1707-1714, May 2015.

[20] S. Roundy, P. K. Wright, and J. Rabaey, “A study of low level vibrations as a power source for wireless sensor nodes,” Computer Communications, vol. 26, no. 11, pp. 1131-1144, 2013.

[21] QP20W, Mouser Electronics [Online]. Available: http://www.mouser.com/


Eun-Jung Yoon received the B.S. and M.S. degrees in the Department of Electronics Engineering from Incheon National University, Incheon, Korea, in 2011 and 2013, respectively. She is currently pursuing the Ph.D. degree. Her research interests

include micro-scale energy harvesting system design and analog/mixed-mode IC design.

Chong-Gun Yu received the B.S. and M.S. degrees in Electronics Engineering from Yonsei University, Seoul, Korea in 1985 and 1987, respectively. He was a graduate student at Texas A&M University, College Station, TX from 1989 to

1991. He received the Ph.D. degree in Electrical and Computer Engineering from Iowa State University, Ames, IA in 1993. He joined the Department of Electronics Engineering, Incheon National University, Incheon, Korea in 1994, and currently serves as Professor. His research interests include analog and mixed-mode IC design.

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