L30 01May031 Semiconductor Device Modeling and Characterization EE5342, Lecture 30 Spring 2003...
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Transcript of L30 01May031 Semiconductor Device Modeling and Characterization EE5342, Lecture 30 Spring 2003...
L30 01May03 1
Semiconductor Device Modeling and CharacterizationEE5342, Lecture 30Spring 2003
Professor Ronald L. [email protected]
http://www.uta.edu/ronc/
L30 01May03 2
Gummel-Poon Staticnpn Circuit Model
C
E
B
B’
ILC
ILEIBF
IBR ICC - IEC = {IS/QB}*
{exp(vBE/NFVt)-exp(vBC/NRVt)}
RC
RE
RBB
IntrinsicTransistor
L30 01May03 3
Gummel Poon npnModel Equations
IBF = IS expf(vBE/NFVt)/BF
ILE = ISE expf(vBE/NEVt)
IBR = IS expf(vBC/NRVt)/BR
ILC = ISC expf(vBC/NCVt)
ICC - IEC = IS(exp(vBE/NFVt - exp(vBC/NRVt)/QB
QB = { + + (BF IBF/IKF + BR IBR/IKR)1/2} (1 - vBC/VAF - vBE/VAR )-1
L30 01May03 4
VBIC Model Overview [5]
Self-heating effects included Improved Early effect modeling Quasi-saturation modeling Parasitic substrate transistor modeling Parasitic fixed (oxide) capacitance modeling An avalanche multiplication model included Base current is decoupled from collector current
L30 01May03 5
CAD Tools Support for VBIC
• Hspice [4]
Does not support PNP deviceDoes not scale with “Area” and “M” terms
• Spectre [5]
Support both NPN and PNP devicesscale with “Area” and “M” term
• HPADSNo temperature nodes (“dt” and “tl”), so
unable to simulate thermal coupling effects
L30 01May03 6
Temperature Designations for VBIC
25tnom27tnomParameters measurement temperature 27tref
25
0
Default
27
0
Default NameName
temptempAmbient temp.
dtemptriseTemperature rise of the device from ambient
Hspice [5]Spectre [4]Parameters Description
L30 01May03 7
Using VBIC in Spectre [5]
Name c b e [s] [dt] [tl] ModelName parameter=value ...
• Selft=1 and Rth>0 to enable Self-heating• 1 volt at the temperature nodes = 1 degree in
temperature• “tl” node represents the initial local
temperature of device which always corresponds to trise+temp
• “dt” node represents the rise above trise+temp caused by thermal dissipation, whose value equals V(dt)-V(tl)
• Device temperature=V(dt)-V(tl)+trise+temp
L30 01May03 8
Using VBIC in Cadence
• Need explicit external temperature nodes in the symbol to model inter-device thermal coupling by Connecting thermal network between “dt” nodes, or Adding VCVS between “tl” and “tlr” node
• Customized VBIC 6-terminal (5-pin) symbol
L30 01May03 9
Model Conversion
• Most BJTs are defined with SGP model • A conversion from SGP to VBIC is needed• Only approximate conversion is possible
• Some parameters are left unmapped such as Rth and Cth
• Two approaches are provided Manual conversion — done empirically and need
Local Ratio Evaluation [2]
Program conversion — “official” program sgp_2_vbic [3]
L30 01May03 10
Parameters Mapping by sgp_2_vbic
VBIC mapping VBIC mapping VBIC mappingRcx Rc Mc Mjc Xtf XtfRci 0 Cjcp Cjs Vtf VtfRbx Rbm Ps Vjs Itf ItfRbi Rb-Rbm Ms Mjs Tr TrRe Re Nei Nf Td Tf·Ptf/180Is Is Iben Ise Ea EgNf Nf Nen Ne Eaie EgNr Nr Ibei Is/Bf Eaic EgFc Fc Ibci Is/Br Eane EgCje Cje Nci Nr Eanc EgPe Vje Ibcn Isc Xis XtiMe Mje Ncn Nc Xii Xti-XtbCjc Cjc·Xcjc Ikf Ikf Xin Xti-XtbCjep Cjc(1-Xcjc) Ikr Ikr Kfn KfPc Vjc Tf Tf Afn Af
AFFbcAR
Fbe
AF
C
F
VVVV
V
I
gO
//1
/1
AFRbcAR
Rbe
AR
e
R
VVVV
V
I
go
//1
/1
1
11
1
/
/
ER
EF
eR
RbeR
beRbc
Fbe
cF
FbcF
bc
V
V
Ig
Cqq
qIg
Cq
o
o
Early Effect model is different Need Vbe, Vbc to solve the 3 equations below
L30 01May03 11
L30 01May03 12
HeterojunctionElectrostatics
Eo
EC,p
EV,p
EF,pEF,n
EC,n
EV,n
EC
EV
qp
qn
-xn xp0
L30 01May03 13
Poisson’s EquationEx
xxp-xn
p
A
p
px qNdxdE
n
D
n
nx qN
dxdE
n,bix VdxE
n,bix VdxE
0xE0xE
0x at eqn Continuity
xpxn
L30 01May03 14
Heterojunctionelectronics
d
2inonovn,vn,f
n,vn,fn,gnn
dcn,fc
n,fcnn,fon
npbi
pand
N/np , p/NlnkTEE
EEEqq
N/NlnkTEE
EEqEEq
V
xqNxqN ,neutrality Charge
L30 01May03 15
Heterojunctionelectronics (cont)
text. in 8.40 & 8.39 c.f.
, N/NlnkTEE
, EEEqq
. N/nn , n/NlnkTEE
, EEqEEq
avp,vp,f
p,vp,fp,gpp
a2ipopocp,fc
p,fcpp,fop
L30 01May03 16
Heterojunctionelectronics (cont)
form. eappropriat the is this then
E is barrier eappropriat the and
important, is injection hole Since
. /Nnp and , Np
, N
N
p
plnkTEqV
8.39 e.g.
v
d2inoapo
n,v
n,v
no
povbi
L30 01May03 17
Heterojunctiondepletion widths
p,apn,dnp,a
n,dbipnp
p,apn,dnn,d
p,abipnn
p,apn,dnp,an,d
2p,an,dbipn
pn
NNqN
NV2x
NNqN
NV2x
NNNqN
NNV2xxW
L30 01May03 18
Final Exam• Review a paper on “Device Parameter
Extraction”.• Paper to be reviewed will be posted
Monday, May 5, 2003 • Comment on Device Physics used.• Critique the extraction procedures
– Assumptions– Consistency of method w.r.t. assumptions
• One page solution due 11 AM, Thur., May 8
L30 01May03 19
References• Fujiang Lin, et al, “Extraction Of VBIC Model for SiGe HBTs
Made Easy by Going Through Gummel-Poon Model”, from http://eesof.tm.agilent.com/pdf/VBIC_Model_Extraction.pdf
• http://www.fht-esslingen.de/institute/iafgp/neu/VBIC/• Avanti Star-spice User Manual, 04, 2001. • Affirma Spectre Circuit Simulator Device Model Equations• Zweidinger, D.T.; Fox, R.M., et al, “Equivalent circuit
modeling of static substrate thermal coupling using VCVS representation”, Solid-State Circuits, IEEE Journal of , Volume: 2 Issue: 9 , Sept. 2002, Page(s): 1198 -1206