EE 330 Lecture 13 Devices in Semiconductor Processesclass.ece.iastate.edu/ee330/lectures/EE 330 Lect...
Transcript of EE 330 Lecture 13 Devices in Semiconductor Processesclass.ece.iastate.edu/ee330/lectures/EE 330 Lect...
EE 330Lecture 13
Devices in Semiconductor Processes
• Diodes
• Capacitors
• MOSFETs
Flash Memory Cell
• Single FET with dual gate
• Electrically isolated floating gate is the storage element
• Electrons added to or removed from the floating gate shift the Vt of the cell to store a 1 or a 0
• Two types: NAND and NOR
• NAND – Better array efficiency, lower cost per die for mass-storage
• NOR – Faster read/write speeds for code storage and execution
Review from last lecture
Diodes (pn junctions)
Depletion region created that is ionized but void of carriers
Review from last lecture
pn Junctions
ID
VD
Anode
Cathode
Anode
CathodeCircuit Symbol
Review from last lecture
Rectifier Application: Simple Diode Model:
VD
ID
1K
VOUT
D1
VIN=VMsinωt
VIN
VM
t
VM
t
VIN
VOUT
Review from last lecture
pn Junctions
VI
0V0
0VAeJITnV
V
S
I
V
Diode Equation:(good enough for most applications)
JS= Sat Current Density (in the 1aA/u2 to 1fA/u2 range)
A= Junction Cross Section Area
VT=kT/q (k/q=1.381x10-23V•C/°K/1.6x10-19C=8.62x10-5V/°K)
n is approximately 1
Anode
Cathode
Note: IS=JsA
Review from last lecture
pn Junctions
0V0
0VAeJITnV
V
S I
V
Diode Equation:Anode
CathodeJS is strongly temperature dependent
G0 D
t t
-V V
V Vm
SXI(T) J T e Ae
With n=1, for V>0,
Typical values for key parameters: JSX=0.5A/μ2, VG0=1.17V, m=2.3
Review from last lecture
pn Junctions
VI
0V0
0VAeJITnV
V
S
I
V
Diode Equation:(good enough for most applications)
Anode
Cathode
IS=JsA
VD
ID
Simple Diode Model:
Often termed the “conducting” or “ON” state
Often termed the “nonconducting” or “OFF” state
VIN R
ID
VD
VOUT
O U TV ?
Consider again the basic rectifier circuit
• Previously considered sinusoidal excitation• Previously gave “qualitative” analysis• Rigorous analysis method is essential
Analysis of Nonlinear Circuits (Circuits with one or more nonlinear devices)
What analysis tools or methods can be used?
KCL ?
KVL?
Superposition?
Voltage Divider ?
Current Divider?
Thevenin and Norton Equivalent Circuits?
Nodal Analysis
Mesh Analysis
Two-Port Subcircuits
RIVV DDIN
RIV DOUT
1eII t
d
V
V
SD
VIN R
ID
VD
VOUT
1eRIV t
OU TIN
V
VV
SOUT
Consider again the basic rectifier circuit
Even the simplest diode circuit does not have a closed-form solution
when diode equation is used to model the diode !!
Due to the nonlinear nature of the diode equation
Simplifications are essential if analytical results are to be obtained
Lets study the diode equation a little further
Diode Characteristics
0
2000
4000
6000
8000
10000
0 0.2 0.4 0.6 0.8 1
Vd (volts)
Id (
am
ps)
Power Dissipation Becomes Destructive if Vd > 0.85V (actually less)
1eII t
d
V
V
Sd
Linear-Linear Axis
Lets study the diode equation a little further
For two decades of current change, Vd is close to 0.6V
Diode Characteristics
1E-12
1E-10
1E-08
1E-06
0.0001
0.01
1
100
10000
0 0.2 0.4 0.6 0.8 1
Vd (volts)
Id (
am
ps)
This is the most useful current range for many applications
1eII t
d
V
V
Sd
Linear-Log Axis
Lets study the diode equation a little further
For two decades of current change, Vd is close to 0.6V
This is the most useful current range when conducting for many applications
Diode Characteristics
0
0.002
0.004
0.006
0.008
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Vd (volts)
Id (
am
ps)
1eII t
d
V
V
Sd
Lets study the diode equation a little further
Diode Characteristics
0
0.002
0.004
0.006
0.008
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Vd (volts)
Id (
am
ps)
Widely Used Piecewise Linear Model
1eII t
d
V
V
Sd 0I0 .6 VV
0 .6 VV0I
dd
dd
Lets study the diode equation a little further
Diode Characteristics
0
0.002
0.004
0.006
0.008
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Vd (volts)
Id (
am
ps)
Better model in “ON” state though often not needed
1eII t
d
V
V
Sd
Includes Diode “ON” resistance
Lets study the diode equation a little further
0IRI0 .6 VV
0 .6 VV0I
dDdd
dd
1eII t
d
V
V
Sd
Piecewise Linear Model with Diode Resistance
Equivalent Circuit
Vd
Id
A C
(RD is rather small: often in the 20Ώ to 100Ώ range):
Vd
Id0.6V
A
A
C
C
Off State
On State
RD
if
if
The Ideal Diode
I
ID
VD
0
0
D D
D D
I 0 if V
V if I 0
IDVD I
0
0
D D
D D
I 0 if V
V if I 0
“OFF”
“ON”
The Ideal Diode
ID
VD
I
ID VD
“ON” “OFF”
ID >0 VD ≤0Valid for
Diode Models
ID
VD
Diode Characteristics
0
0.002
0.004
0.006
0.008
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Vd (volts)
Id (
am
ps)
Diode Characteristics
0
0.002
0.004
0.006
0.008
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Vd (volts)
Id (
am
ps)
Diode Characteristics
0
0.002
0.004
0.006
0.008
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Vd (volts)
Id (
am
ps)
Which model should be used?
The simplest model that will give acceptable results in the analysis of a circuit
0
0
D D
D D
I 0 if V
V if I 0
Diode Models
ID
VD
Diode Equation
1eII t
d
V
V
SD
Diode Characteristics
0
0.002
0.004
0.006
0.008
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Vd (volts)
Id (
am
ps)
Piecewise Linear
Models
0I0 .6 VV
0 .6 VV0I
dd
dd
Diode Characteristics
0
0.002
0.004
0.006
0.008
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Vd (volts)
Id (
am
ps)
0IRI0 .6 VV
0 .6 VV0I
dddd
dd
Diode Characteristics
0
0.002
0.004
0.006
0.008
0.01
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
Vd (volts)
Id (
am
ps)
if
if
if
if
0
0
D D
D D
I 0 if V
V if I 0
Diode Models
Diode Equation
1eII t
d
V
V
SD
Piecewise Linear
Models
0I0 .6 VV
0 .6 VV0I
dd
dd
0IRI0 .6 VV
0 .6 VV0I
dddd
dd
When are the piecewise-linear models adequate?
When it doesn’t make much difference whether Vd=0.6V or Vd=0.7V is used
When is the ideal PWL model adequate?
When it doesn’t make much difference whether Vd=0V or Vd=0.7V is used
Example: Determine IOUT for the following circuit
10K
12V
IOUT
D1
Solution:
1. Assume PWL model with VD=0.6V, RD=0
2. Guess state of diode (ON)
3. Analyze circuit with model
4. Validate state of guess in step 2 (verify the “if” condition in model)
5. Assume PWL with VD=0.7V
6. Guess state of diode (ON)
7. Analyze circuit with model
8. Validate state of guess in step 6 (verify the “if” condition in model)
9. Show difference between results using these two models is small
10. If difference is not small, must use a different model
Strategy:
Solution:
10K
12V
IOUT
0.6V
1. Assume PWL model with VD=0.6V, RD=0
2. Guess state of diode (ON)
3. Analyze circuit with model
1 14OUT
12V-0.6VI = .
10KmA
4. Validate state of guess in step 2
To validate state, must show ID>0
D OUTI =I =1.14mA>0
Solution:
10K
12V
IOUT
0.7V
5. Assume PWL model with VD=0.7V, RD=0
6. Guess state of diode (ON)
7. Analyze circuit with model
1 13OUT
12V-0.7VI = .
10KmA
8. Validate state of guess in step 6
To validate state, must show ID>0
D OUTI =I =1.13mA>0
Solution:
9. Show difference between results using these two models is small
OUT OUTI =1.14mA and I =1.13 mA are close
Thus, can conclude OUTI 1.14mA
Example: Determine IOUT for the following circuit
10K
0.8V
IOUT
D1
Solution:
1. Assume PWL model with VD=0.6V, RD=0
2. Guess state of diode (ON)
3. Analyze circuit with model
4. Validate state of guess in step 2
5. Assume PWL with VD=0.7V
6. Guess state of diode (ON)
7. Analyze circuit with model
8. Validate state of guess in step 6
9. Show difference between results using these two models is small
10. If difference is not small, must use a different model
Strategy:
Solution:
10K
0.8V
IOUT
0.6V
1. Assume PWL model with VD=0.6V, RD=0
2. Guess state of diode (ON)
3. Analyze circuit with model
20OUT
0.8 - 0.6VI =
10KA
4. Validate state of guess in step 2
To validate state, must show ID>0
D OUTI =I =20 A>0
Solution:
10K
0.8V
IOUT
0.7V
5. Assume PWL model with VD=0.7V, RD=0
6. Guess state of diode (ON)
7. Analyze circuit with model
10OUT
0.8V-0.7VI =
10KA
8. Validate state of guess in step 6
To validate state, must show ID>0
D OUTI =I =10 A>0
Solution:
9. Show difference between results using these two models is small
OUT OUTI =10 A and I =20 A are not close
10. If difference is not small, must use a different model
Thus must use diode equation to model the device
10K
0.8V
IOUT
0.6V
VDD
OUT
0.8-VI =
10K
D
t
V
V
OUT SI =I e
Solve simultaneously, assume Vt=25mV, IS=1fA
Solving these two equations by iteration, obtain VD= 0.6148V and IOUT=18.60μA
Use of Piecewise Models for Nonlinear Devices when
Analyzing Electronic Circuits
Process:
1. Guess state of the device
2. Analyze circuit
3. Verify State
4. Repeat steps 1 to 3 if verification fails5. Verify model (if necessary)
Observations:
o Analysis generally simplified dramatically (particularly if piecewise model is linear)
o Approach applicable to wide variety of nonlinear deviceso Closed-form solutions give insight into performance of circuito Usually much faster than solving the nonlinear circuit directlyo Wrong guesses in the state of the device do not compromise solution
(verification will fail)
o Helps to guess right the first timeo Model is often not necessary with most nonlinear devices
Types of Diodes
Vd
Id Id
Vd
Id
VdVd
Id
Vd
Id
Vd
Id
Vd
Id
Vd
Id
pn junction diodes
Metal-semiconductor junction diodes
Signal or
Rectifier
Pin or
Photo
Light Emitting
LED
Laser Diode
Zener Varactor or
Varicap
Schottky Barrier
Vd
Id
Basic Devices and Device Models
• Resistor
• Diode
• Capacitor
• MOSFET
• BJT
Capacitors
• Types
– Parallel Plate
– Fringe
– Junction
Parallel Plate Capacitors
C
d
A1
A2
cond1
cond2
insulator
A = area of intersection of A1 & A2
d
AC
One (top) plate intentionally sized smaller to determine C
Parallel Plate Capacitors
ACC d
d
AεC
areaunit
CapC If d
d
εCd
where
Fringe Capacitors
d
C
d
AεC
A is the area where the two plates are parallel
Only a single layer is needed to make fringe capacitors
Fringe Capacitors
C
Capacitance
2
φV
φ
V1
ACC B
FBn
B
D
j o
for
ddepletion
region
C
Junction Capacitor
d
AC
Note: d is voltage dependent
-capacitance is voltage dependent
-usually parasitic caps
-varicaps or varactor diodes exploit
voltage dep. of C
d
p
n
VD
0.6VφB n ; 0.5
Capacitance
2
φV
φ
V1
ACC B
FBn
B
D
j o
for
Junction Capacitor
0.6VφB n ; 0.5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
-4 -3 -2 -1 0 1
j0
C
C A
VD
Voltage dependence is substantial
VD
Basic Devices and Device Models
• Resistor
• Diode
• Capacitor
• MOSFET
• BJT
n-Channel MOSFET
Poly
n-active
Gate oxide
p-sub
n-Channel MOSFET
LEFF
L
W
Source
DrainGate
Bulk
n-Channel MOSFET
Poly
n-active
Gate oxide
p-subdepletion region (electrically induced)
n-Channel MOSFET Operation and Model
VBS
VGS
VDS
Apply small VGS
(VDS and VBS assumed to be small)ID=0
IG=0
IB=0
Depletion region electrically induced in channel
IDIG
IB
Termed “cutoff” region of operation
n-Channel MOSFET Operation and Model
VBS
VGS
VDS
Increase VGS
(VDS and VBS assumed to be small)ID=0
IG=0
IB=0Depletion region in channel becomes larger
IDIG
IB
n-Channel MOSFET Operation and Model
VBS
VGS
VDS
ID=0
IG=0
IB=0
IDIG
IB
Model in Cutoff Region
n-Channel MOSFET Operation and Model
VBS
VGS
VDS
Increase VGS more
IDRCH=VDS
IG=0
IB=0
Inversion layer forms in channel
IDIG
IB
(VDS and VBS small)
Inversion layer will support current flow from D to S
Channel behaves as thin-film resistor
Critical value of
VGS that creates
inversion layer
termed threshold
voltage, VT)
End of Lecture 13