On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits
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On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits Department of Electrical and Computer Engineering By Han Lin Jiun-Yi Lin 05/14/2014
description
On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits. Department of Electrical and Computer Engineering. By Han Lin Jiun-Yi Lin. Overview. Introduction Principle and background Proposed reliability monitor circuit Circuit Blocks and Simulation Result : - PowerPoint PPT Presentation
Transcript of On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits
On-Chip Reliability Monitor for Measuring Frequency Degradation of Digital Circuits
Department of Electrical and Computer Engineering
ByHan Lin
Jiun-Yi Lin
05/14/2014
Overview Introduction Principle and background Proposed reliability monitor circuit Circuit Blocks and Simulation Result:
Ring Oscillator Phase Comparator Majority Voting Circuit Beat Frequency Detector 8 Bit Counter Circuit Total Circuit
Conclusion05/14/2014 1
Abstract
Precise measurement of digital circuit degradation caused by agingReliability monitor using beat frequency of two ring oscillators to get a high sensing resolution1V, 32nm CMOS technology, up to 0.02% sensing resolution
Overview Introduction Principle and background Proposed reliability monitor circuit Circuit Blocks and Simulation Result:
Ring Oscillator Phase Comparator Majority Voting Circuit Beat Frequency Detector 8 Bit Counter Circuit Total Circuit
Conclusion05/14/2014 1
Types of reliability issues
BTI (bias temperature instability)HCI (hot carrier injection)TDDB (time-dependent dielectric breakdown)NBTI (negative bias temperature instability)NBTI effect is among the most pressing issues among all of them
Cause of NBTI effect
Structural mismatch at the Si-SiO2 interface cause dangling bondsSi-H bonds is transformed by hydrogen passivation process of dangling Si bonds which is made by oxidation of Si-SiO2
Broken bonds from Si-H degrade the driving current of pMOS threshold voltagePositive shift in absolute value of pMOS threshold voltage |Vtp| in stress phaseBroken Si-H bonds is annealed in recovery phase, and Vtp is reduced
Cross section of pMOS device and pMOS Vth degradation
Constraints of typical measurement
Device probing, on-chip ring oscillator frequency monitoringLimitations in sensing resolution, cannot get large number of data points
Simulation platformMicrosoft WindowsHSPICE 2009CosmosScope
Overview Introduction Principle and background Proposed reliability monitor circuit Circuit Blocks and Simulation Result:
Ring Oscillator Phase Comparator Majority Voting Circuit Beat Frequency Detector 8 Bit Counter Circuit Total Circuit
Conclusion05/14/2014 1
Beat frequency detection circuit
Measuring difference in frequency between Stressed and Reference ROSCWhen there is exactly one in the pulse difference between two ROSC, we can get the value of N before stress, and we use this method to get N’ which is detected after stress period.
Beat frequency detection scheme
Using difference between stressed and reference ROSCBefore stress: N/fref=(N-1)/fstress After stress: N’/fref=(N’-1)/f’stress
Percent of frequency degradation:(f’stress-fstress)/fstress=(N’-N)/(N’(N-1))
Change in counter output by frequency degradation
(f’stress-fstress)/fstress
=(N’-N)/(N’(N-1))When there is 1% degradation, N will decrease half compared with 1% for convention method
Architecture of silicon odometer
Two ring oscillators, identical structure, different VddPhase comparator will show frequency difference between two ROSC.5-bit majority voting circuit can erase the bubbles caused by jitter effect from phase comparatorBeat frequency detector can produce a DETECT signal to reset the counter, and get the output from the register
Block diagram
Overview Introduction Principle and background Proposed reliability monitor circuit Circuit Blocks and Simulation Result:
Ring Oscillator Phase Comparator Majority Voting Circuit Beat Frequency Detector 8 Bit Counter Circuit Total Circuit
Conclusion05/14/2014 1
Ring Oscillator
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Simulation Result of Ring Oscillator Circuit
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The ring oscillator has a period of 4 ns
Phase Comparator
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CLK=0 Pre charge
CLK=1 Evaluate(Compare the phase of A
and B)
CLK=1A’&&B=1PC_OUT=1
CLK=1A’&&B=0PC_OUT=0
CLK=0PC_OUT keepthe same value
X: Pre charge Switch open Switch closeSwitch close
Simulation Result of Phase Comparator Circuit
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CLK=1A’&&B=1PC_OUT=1
CLK=0PC_OUT keepthe same value
CLK=1A’&&B=0PC_OUT=0
Majority Voting Circuit
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Majority Voting circuit (Continue)
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Simulation Result of Majority Voting Circuit
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PC_OUT10111010
VOTE_OUT11111100
10111011
111111 00
Beat Frequency Detector
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Simulation Result of Beat Frequency Detector Circuit
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Beat Frequency
Latency
10111 011
111111 00
8 Bit Counter Circuit
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Simulation Result of 8 Bit Counter
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Simulation Result of Total Circuit
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CONCLUSION
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THANK YOU!
