IDR - HC

Do you want to know what is inside a chip? Vloer 3: THE place to be!!!

Leerstoel HC Groep IDR

chip

IDR - HC

IC-technology, devices and reliability

IDR - HC

IC-technology, devices and reliability• Dielectrics

• Reliability of very thin dielectrics

• Novel materials to replace SiO2

• Metallization• Fabrication of advanced metallization (deposition and CMP)• Reliability of interconnects

• Thin Film Physics• Deposition• Modelling and characterisation• Application (TFT’s)

• ElectroStatic Discharge• Modelling ESD effects in Integrated Circuits and TFT’s

IDR - HC

• Optimising process steps used for the fabrication of advanced IC devices.

• Thin dielectrics• Cu metallization

• Issues• New materials• New processes

– Processing, material and electrical characteristics

• Optimising process steps used for the fabrication of advanced IC devices.

• Thin dielectrics• Cu metallization

• Issues• New materials• New processes

– Processing, material and electrical characteristics

IC-technology

IDR - HC

• Device physics• Understanding

fundamental principles

• New devices • TFT’s, memories

• New applications• Nanolamps

Devices

Pentium 3

IDR - HC

• Degradation• Shift in parameters during lifetime (Vt, Ids ,...)

• Predictions of lifetime based on models

• Failure mechanisms • Physical mechanisms of breakdown• What happens during Electrostatic discharges• What is the bottleneck?

• Modeling• Device and circuit simulations• Understanding degradation and breakdown• Suggestions for improvements

Reliability

FIB analysis

IDR - HC

Plasma damage

Zhi

chun

Wan

g

During IC manufacturing plasma processes are needed to obtain advanced devices. We study the effects of these process conditions on the lifetime of CMOS devices. Measurements on gate oxide quality and physical modelling of damage are possible assignments.

Cooperation with Philips Semiconductors Nijmegen and Mietec Belgium.

Plasma current

po ly si liconoxide

m ono silico n

source drainchannel e lectrons

depletion layer

A ntenna

FN tunneling

c urrent

gate oxide

Project:

IDR - HC

Dielectric Limits for EMbedded(non-volatile) Memory Applications

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re H

of

Door de steeds kleiner wordende afmetingen op chip wordt embedded flash geheugen steeds belangrijker. Denk hierbij bijvoorbeeld aan het adressenbestand in je GSM. Maar door deze kleiner wordende afmetingen komen we ook steeds dichter bij de fysische limiet. Dit project probeert uit te zoeken hoe dun het tunnel-oxide in flash geheugen mag zijn voor de toekomstige 100 nm technology.

Samenwerking met Philips Semiconductors Nijmegen en Philips Research Eindhoven.

Project:

IDR - HC

Thin film dielectricsDeposition and characterisation

Our aim is to obtain high-quality dielectrics at glass compatible temperatures, for thin film transistors. MOS devices are used to test the dielectrics deposited by Jet Vapor Deposition and Electron Cyclotron Resonance PECVD.Cooperation with DIMES, Delft.

Project:

Gra

tiel

a Is

ai

IDR - HC

And

reea

Mer

ticar

u

Technology for stable TFTsProject:

The problem is only when and why. Our work is directed towards the investigation of the physical mechanism responsible of electrical instability of a-Si:H TFT subjected to various stress biases, stress time and stress temperatures in order to get more stable TFTs.

Cooperation with Philips Research UK and Eindhoven.

Do you realise that you kill the laptop display day by day?

IDR - HC

Reliability of TFTsESD phenomena in a-Si:H TFTs for AM-LCD applications

Thin film transistors (TFT) are widely used devices, especially for liquid crystal displays (LCD), but they are very hard to understand. We investigate the behaviour of TFTs during electrostatic discharges (by applying short (100ns) high voltage (>500V) pulses). Cooperation with Philips Research UK and Eindhoven.

This is a TFT,

after zapping.

Project:

Nat

asa

Tos

ic

IDR - HC

ElectroStatic Discharge

Gia

nluc

a B

osel

li

Electrostatic charge may transfer from a body to an object. IC’s may be irreversibly damaged. Experiments and simulations of devices are needed to understand the physics and suggest models to predict and ways to optimise circuit behaviour under ESD stress.

Cooperation with Philips Semiconductors Nijmegen, Texas Instruments Dallas.

Simulated max T reached in an nMOSafter a Human Body Model pulse.

Project:

IDR - HC

80386, 80486, 80586, Pentium, Pentium II… Our microprocessors are getting bigger and faster, devices in chips are getting smaller and packed at higher density. Aluminium then no longer can be used in wiring circuits in chips. Don’t panic, COPPER HAS ARRIVED! We are doing research on know-how to form Copper circuits in chip by using Chemical Mechanical Polishing.

Cooperation with Philips Semiconductors Nijmegen and Philips Research Eindhoven.

Ngu

yen

Hoa

ng V

iet

Metal 1Metal 2Metal 3Metal 4Metal 5Metal 6

Conventional without CMP Damascene & CMP

Project:Chemical Mechanical Polishing of Copper

IDR - HC

CVD barriers for Cu metallization

Ultra-thin barrier and adhesion layers are needed when Cu is used for metallization in advanced IC’s. Barriers can be characterised by C(V) measurements of capacitors or transistors, before and after BTS (Bias Thermal Stress), or by I(V) measurements of diodes. What are the reasons for barrier failure?Cooperation with Philips

Semiconductors Nijmegen

and Philips Research

Eindhoven.

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a B

ystr

ova

Project:

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ughn

ess

= 0

.9 n

mz-

rang

e =

6.7

nm

IDR - HC

Electro-thermo-mechanical effects in metallization films N

guye

n V

an H

ieu

In power IC’s, like car audio amplifiers, large AC currents lead to high temperatures that vary with audio frequencies, large thermal gradients and mechanical stress build-up in the metallization films. The aim is to measure and model resistance changes in time for audio power IC’s and generate design rules for power designers.

Cooperation with Philips Semiconductors Nijmegen.

Project:

IDR - HC

Silicon Nanoscale LightEmitting Anti-fuse Diodes

Project:

Le M

inh

Phu

ong

Nano-link light emission of MOS diode

Light emission from a-Si MOS diode nano-structure (~10 nm) under reverse bias is studied. The research is focussed on the radiation mechanisms, temperature distribution and applications in microsystems.

Observed radiation spectrum

IDR - HC

Ale

xey

Kov

algi

n

SafegasSensor Array for Fast Explosion-proof Gas Monitoring

EU Project:

Si

Oxide

Poly-Si

Bottom ElectrodeSubstrate

Top Electrode

10m

300 nm

60 nm

Si

Oxide

Poly-Si

Substrate

300 nm

60 nm

Programmeddiode-antifuse

After programming

This European Union project is aimed at the improvement of safety in working environments by accurate, fast, real time and reliable monitoring of the presence of combustive gas mixtures. The novel idea of using nano-hotspots (see the figure) with the antifuse technology for gas sensing lends itself to very high density array-integration.Cooperation with several EuropeanIndustries and Institutes.

Thin Dielectric (6-8 nm)

Programmed gate-to-substrate link or nano-hotspot

IDR - HC

Upcoming projects:

• 1/f noise, physical characterization

(collaboration with IC-O)

• Reliability of advances dielectrics

• Charge-Device-Model ESD

• Temperature stability of gate-dielectrics

IDR - HC

Scientific staff: IC-technology, devices and reliability

Fred Kuper

Herma v Kranenburg

Cora Salm

Jisk Holleman

Hans Wallinga

Pierre Woerlee

Ton Mouthaan

IDR - HC

Conclusie’s

• IDR biedt een heel scala aan onderwerpen

• Technisch: Cleanroom

• Elektrisch: Meten/karakteriseren, eigen meetlaboratorium

• Modelleren en simuleren: verschillende world class pakketten

• Veel contact met de industrie

• Samenwerken met promovendi

• Kom eens langs bij promovendi of medewerkers!

IDR - HC

Do you want to know what's inside a chip? Vloer 3, The place to be !!!!