THE FINAL WORD ON THE 8051

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- Introduction

This is a book about the Intel 8051 microcontroller and its large family of descendants. It is intended togive you, the reader, some new techniques for optimizing your 8051 projects and the developmentprocess you use for those projects. It is not the purpose of this book to provide various recipes fordifferent types of embedded projects.

Wherever possible, I have included code examples to make the discussion clearer. There are points inthe book where projects are discussed as a means of illustrating the point of the given chapter. Much ofthis code is available on the companion disk, to use it you will need to be familiar with C and 8051assembler since this book is not intended to be a tutorial in C or 8051 assembler. There are many finebooks you can buy to learn about ANSI C. As for 8051 assembler, the best source is the Intel data bookwhich is free from your 8051 vendor or the manual that comes with your particular assembler.

The code on the companion diskette contains the code I wrote and compiled for the book you hold inyour hands. It is fully functional and has been tested. This is not to say that that the code on the disketteis ready to go into your system and be delivered as part of your projects. Some of it will require changebefore it can be integrated into your system.

This book will help you learn how to make the best out of the tools you have. If you only have an 8051assembler, you can still learn from this book and use the examples, but you will have to decide foryourself how to implement the C language examples in assembler. This is not a difficult task for anyonewho understands the basics of C and the 8051 assembler set.

If you have a C compiler for the 8051, then I congratulate you. You have made an excellent decision inyour use of C. You will find that your project development time using C is lower and that yourmaintenance time using C is also lower. If you have the Keil C51 package, then you have made anexcellent decision in 8051 development tools. I have found that the Keil package for the 8051 providesthe best support. The code in this book directly supports the Keil C extensions. If you have one of theother development packages such as Archimedes or Avocet, you will find that this book is still of greatservice to you. The main thing to be aware of is that you may have to change some of the Keil specificdirectives to the appropriate ones for your development tools.

In many places in this book are diagrams of the hardware on which the example code runs. These arenot intended to be full schematics, but are merely block diagrams that have enough information to allowyou to understand how the software must interface to the hardware.

You should look upon this book as a learning tool rather than a source of various system designs. This isnot an 8051 cookbook, but rather an exploration of the capabilities of the 8051 given proper hardwareand software design. I prefer to think that you will use this book as a source of ideas from which yourdesigns springboard and grow in a marvelous world of sunshine and roses! Seriously, though, I think youwill gain useful knowledge from this book that will help you greatly improve your designs and make youlook like your companys 8051 guru.

CHAPTER 2 - THE HARDWARE

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- The Hardware

OverviewThe 8051 family of micro controllers is based on an architecture which is highly optimized for embeddedcontrol systems. It is used in a wide variety of applications from military equipment to automobiles to thekeyboard on your PC. Second only to the Motorola 68HC11 in eight bit processors sales, the 8051family of microcontrollers is available in a wide array of variations from manufacturers such as Intel,Philips, and Siemens. These manufacturers have added numerous features and peripherals to the 8051such as I2C interfaces, analog to digital converters, watchdog timers, and pulse width modulated outputs.Variations of the 8051 with clock speeds up to 40MHz and voltage requirements down to 1.5 volts areavailable. This wide range of parts based on one core makes the 8051 family an excellent choice as thebase architecture for a company's entire line of products since it can perform many functions anddevelopers will only have to learn this one platform.

The basic architecture consists of the following features:

One 8051 processor cycle consists of twelve oscillator periods. Each of the twelve oscillator periods isused for a special function by the 8051 core such as op code fetches and samples of the interrupt daisychain for pending interrupts. The time required for any 8051 instruction can be computed by dividing theclock frequency by 12, inverting that result and multiplying it by the number of processor cycles requiredby the instruction in question. Therefore, if you have a system which is using an 11.059MHz clock, youcan compute the number of instructions per second by dividing this value by 12. This gives aninstruction frequency of 921583 instructions per second. Inverting this will provide the amount of timetaken by each instruction cycle (1.085 microseconds).

an eight bit ALU

32 descrete I/O pins (4 groups of 8) which can be individually accessed

two 16 bit timer/counters

full duplex UART

6 interrupt sources with 2 priority levels

128 bytes of on board RAM

separate 64K byte address spaces for DATA and CODE memory

THE FINAL WORD ON THE 8051

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Memory OrganizationThe 8051 architecture provides the user with three physically distinct memory spaces which can be seenin Figure A - 1. Each memory space consists of contiguous addresses from 0 to the maximum size, inbytes, of the memory space. Address overlaps are resolved by utilizing instructions which referspecifically to a given address space. The three memory spaces function as described below.

Figure A - 1 - 8051 Memory Architecture

The CODE Space The first memory space is the CODE segment in which the executable program resides. This segmentcan be up to 64K (since it is addressed by 16 address lines) . The processor treats this segment as readonly and will generate signals appropriate to access a memory device such as an EPROM. However,this does not mean that the CODE segment must be implemented using an EPROM. Many embeddedsystems these days are using EEPROM which allows the memory to be overwritten either by the 8051itself or by an external device. This makes upgrades to the product easy to do since new software canbe downloaded into the EEPROM rather than having to disassemble it and install a new EPROM.Additionally, battery backed SRAMs can be used in place of an EPROM. This method offers the samecapability to upload new software to the unit as does an EEPROM, and does not have any sort ofread/write cycle limitations such as an EEPROM has. However, when the battery supplying the RAMeventually dies, so does the software in it. Using an SRAM in place of an EPROM in developmentsystems allows for rapid downloading of new code into the target system. When this can be done, ithelps avoid the cycle of programming/testing/erasing with EPROMs, and can also help avoid hasslesover an in circuit emulator which is usually a rare commodity.

In addition to executable code, it is common practice with the 8051 to store fixed lookup tables in theCODE segment. To facilitate this, the 8051 provides instructions which allow rapid access to tables viathe data pointer (DPTR) or the program counter with an offset into the table optionally provided by theaccumulator. This means that oftentimes, a table's base address can be loaded in DPTR and theelement of the table to access can be held in the accumulator. The addition is performed by the 8051during the execution of the instruction which can save many cycles depending on the situation. Anexample of this is shown later in this chapter in

CHAPTER 2 - THE HARDWARE

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Listing A - 5.

THE FINAL WORD ON THE 8051

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The DATA SpaceThe second memory space is the 128 bytes of internal RAM on the 8051, or the first 128 bytes of internalRAM on the 8052. This segment is typically referred to as the DATA segment. The RAM locations inthis segment are accessed in one or two cycles depending on the instruction. This access time is muchquicker than access to the XDATA segment because memory is addressed directly rather than via amemory pointer such as DPTR which must first be initialized. Therefore, frequently used variables andtemporary scratch variables are usually assigned to the DATA segment. Such allocation must be donewith care, however, due to the limited amount of memory in this segment.

Variables stored in the DATA segment can also be accessed indirectly via R0 or R1. The register beingused as the memory pointer must contain the address of the byte to be retrieved or altered. Theseinstructions can take one or two processor cycles depending on the source/destination data byte.

The DATA segment contains two smaller segments of interest. The first subsegment consists of the foursets of register banks which compose the first 32 bytes of RAM. The 8051 can use any of these fourgroups of eight bytes as its default register bank. The selection of register banks is changeable at anytime via the RS1 and the RS0 bits in the Processor Status Word (PSW). These two bits combine into anumber from 0 to 3 (with RS1 being the most significant bit) which indicates the register bank to be used.Register bank switching allows not only for quick parameter passing, but also opens the door forsimplifying task switching on the 8051.

The second sub-segment in the DATA space is a bit addressable segment in which each bit can beindividually acc