The Advanced Compact MOSFET Model and its Application · PDF fileThe Advanced Compact MOSFET...

The Advanced Compact MOSFET Model and its Application to Inversion Coefficient Based Circuit Design

By

Sean Nicolson

ECE 1352 Research Paper, Fall 2002 Department of Electrical and Computer Engineering

University of Toronto


Sean T. Nicolson Copyright © 2002

2

Abstract

Contemporary MOSFET mathematical models contain many parameters, most of which have

little or no meaning to circuit designers. Designers therefore, continue to use obsolete models --

such as the MOSFET square law -- for circuit design calculations. However, low-voltage, low-

power systems development demands more advanced circuit design techniques. In this paper I

present a brief literature review of MOSFET modeling, which has culminated in the development

of the Advanced Compact MOSFET model. Next, I discuss the key ideas and equations of the

ACM model, a physically based model with few parameters and equations. Additionally, I show

that the ACM model can aid designers in small and large signal circuit analysis in three major

respects. First, the ACM model is continuous throughout all regions of operation. Second, terms

in ACM model equations appear explicitly in equations that specify circuit performance. Third,

the ACM model can aid designers in neglecting MOSFET small signal components that have

little influence on circuit performance. Lastly, I conclude with a brief discussion of

transconductor linearity, and conclude by mentioning some promising areas of research.



3

Table of Contents

ABSTRACT..................................................................................................................................................................2 LIST OF FIGURES .....................................................................................................................................................4 LIST OF TABLES .......................................................................................................................................................5 1. INTRODUCTION ..............................................................................................................................................6 2. MOSFET MODELING: A LITERATURE REVIEW...................................................................................7 3. THE ACM MODEL ...........................................................................................................................................9

3.1 ACM PARAMETERS .....................................................................................................................................9 3.2 MODELING THE MOSFET DRAIN CURRENT ..............................................................................................10 3.3 MODELING MOSFET VOLTAGES ..............................................................................................................11 3.4 DESIGN METHODS BASED ON (GM/ID) ........................................................................................................12 3.5 SMALL SIGNAL TRANSCONDUCTANCE.......................................................................................................13 3.6 INTRINSIC CAPACITANCE ...........................................................................................................................13

4. DESIGN METHODOLOGY BASED ON THE INVERSION COEFFICIENT ........................................15 4.1 EXPRESSING CIRCUIT SPECIFICATIONS IN TERMS OF THE INVERSION COEFFICIENT ...................................15 4.2 TRANSISTOR MISMATCH............................................................................................................................15 4.3 TRANSCONDUCTOR LINEARITY..................................................................................................................17

5. CONCLUSION .................................................................................................................................................19 6. REFERENCES .................................................................................................................................................20



4

List of Figures

Figure 1: The ACM transconductance to current ratio, continuous through weak, moderate and strong inversion (plotted using Microsoft Excel)..........................................................12

Figure 2: Normalized intrinsic MOSFET capacitances versus inversion coefficient [8] .............14 Figure 3: MOSFETs biased with the same VGS (a) and the same ID (b) .......................................16 Figure 4: Simple differential pair used to demonstrate offset voltage calculations ......................17 Figure 5: Asymptotic definition for the input linear range of a transconductor ...........................17 Figure 6: Transfer characteristics for transconductors with the same gm/ID ................................18



5

List of Tables

Table 1: ACM parameters and their BSIM equivalents [4,11] .......................................................9



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1. Introduction

Accurately predicting the behaviour of fabricated circuits using device models and circuit

simulators saves time and money. As a result, MOSFET modeling remains an ongoing topic of

research for many engineers and device physicists. In our quest for ever more accurate models

and simulators, we have developed models with over 60 parameters. Many of these parameters

are non-physical, and have no intuitive relationship to circuit performance. In our quest for

simulation accuracy, we have developed MOSFET models that have little significance to circuit

designers. Therefore, many designers continue to use obsolete one or two parameter MOSFET

“design models”1.

Many of these design models were developed in the 1970s, and have numerous disadvantages

[18]. Most importantly, some design models, such as the “square law” for a MOSFET in strong

inversion1, are no longer valid for today’s submicron technologies. Consequently, designers use

large error margins which yield conservative designs that do not achieve the best possible circuit

performance [15]. Secondly, most design models (in fact, most models in general) do not

account for the continuous transitions between different regions of operation seen in real devices

[18]. As a result, designers cannot take full advantage of the benefits of MOSFETs biased in

non-standard operating regions, such as moderate inversion. Thirdly, each region of operation is

approximated using a different design model with a unique (small) set of parameters. Therefore,

designers cannot easily understand how changing the region of operation of a single transistor

affects the performance of a complex circuit. Finally, when designers simplify circuit analysis by

disregarding MOSFET small signal components that have negligible effect on circuit

performance, many design models do not indicate which components the designer can safely

neglect.

As today’s designers seek creative solutions to new problems that arise in low-voltage low-power

systems, they require more sophisticated design models and methodologies [12,13]. New models

must accurately predict transistor bias point and small signal parameters in all regions of

1 The strong inversion design model: ( ) ( )DSTHGSOXD VVV

LW

CI λµ +−= 121 2



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operation. Moreover, the models must exhibit continuous transitions between these regions, and

must model every region using the same set of parameters [18]. Additionally, the models must

use parameters and equations that can be intuitively related to circuit performance specifications,

and the design methodology must allow designers to use model equations systematically to select

MOSFET geometries and bias points to meet all circuit specifications. Finally, the new models

must aid designers in understanding which MOSFET small signal components are important, and

which can be neglected.

In this paper, I describe a model called the Advanced Compact MOSFET (ACM) model that

addresses the needs of today’s low-voltage low-power designers [18]. I provide brief

explanations of the ACM parameters, and a detailed description of the ACM equations relevant to

circuit designers. Furthermore, I demonstrate that the ACM model can simplify small signal

analysis by indicating exactly which MOSFET small signal components have negligible effect on

circuit performance. Finally, I show that terms in the ACM model equations appear explicitly in

equations describing small and large signal circuit performance specifications, such as open loop

gain and input referred offset voltage.

2. MOSFET modeling: A Literature Review

Ever since the first MOSFETS were fabricated, scientists have sought to explain their operation

using physical models. Some early models still in use today include SPICE levels 1-3, and

MOS9 [2,14]. Although these models proved adequate for fabrication processes with gate

lengths greater than 1µm, these models do not properly account for the short channel effects seen

in today’s submicron technologies. Additionally, these models, known as non-unified models,

are discontinuous between different regions of transistor operation (non-unified) and contain non-

physical parameters.

Efforts to develop unified MOSFET small signal models using quasi-static charge based

modeling began in the early 1980s [20]. These models proved inaccurate for high frequency

applications, resulting in the development of non-quasi-static small signal models in the mid

1980s [1]. Simultaneously, the physical mechanisms behind general (large signal) MOSFET



8

operation were under investigation [19]. Unfortunately, the small signal and large signal models

were not united until the 1990s.

In the 1990s, scientists and engineers developed comprehensive MOSFET models, such as Spice

Level 49+, and BSIM models, which are still in use today [2,14]. Although these complex

models are somewhat satisfactory for simulators, they are discontinuous, and are cumbersome for

designers to use because they contain many parameters. As a result, designers face the frustrating

task of designing high performance circuits with obsolete methods [15,17,21]. Under these

conditions designers avoid hand calculations, and plunge directly into circuit simulations, thereby

losing insight into how their circuits might be improved.

By the mid 1990s however, interest in low-power, low-voltage circuits led efforts to provide

designers with improved transistor models and design methods [16]. The EKV model,

continuous through weak, moderate, and strong inversion, allowed designers to improve the

accuracy of their hand calculations and simulations of low-voltage, low-power circuits [10].

Furthermore, in 1994, Micropower Techniques showed how designers could relate parameters

and equations of the EKV model to many circuit performance specifications [21]. Comparison of

traditional MOSFET design techniques (which use weak and strong inversion approximations)

with the new (gm/ID) method clearly highlights the superiority of the gm/ID method for low

voltage, low power circuits [17]. Weaknesses in the EKV model led to the development of the

Advanced Compact MOSFET model [6,7,8,11], which addresses many of the modeling problems

outlined in references [15] and [18].

A complete version of the ACM model, including short channel and non-quasi-static effects, is

described in [11] and implemented using the SMASH circuit simulator. However, in the

remainder of this paper, I describe a design methodology based on the long channel ACM model.

Nonetheless, the design methodology can be modified to account for short channel effects [11].



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3. The ACM Model

3.1 ACM Parameters

The long channel ACM model (herein referred to as “the ACM model”) is a MOSFET model

with only 10 parameters, and is continuous through weak, moderate, strong inversion, and the

triode region. In Table 1 I have listed the ACM parameters, along with their BSIM equivalents

[11]. ACM parameters which have no equivalent BSIM3 parameter can be calculated using

BSIM3 parameters, and equations (3.1.1) to (3.1.3) [4]. Therefore, the designer can easily derive

a MOSFET’s ACM model given the BSIM model. If the BSIM model in not available, the ACM

parameters can also be extracted, either by the simulation or testing of single transistor circuits

[4].

Table 1: ACM parameters and their BSIM equivalents [4,11]

ACM parameter BSIM parameter Description Units VT0 VTH0 Zero bias threshold voltage V GAMMA Body effect parameter V1/2

PHI Surface potential V TOX TOX Gate oxide thickness m LD DLC Lateral diffusion m XJ XJ Junction depth m U0 U0 Low-field mobility cm2/Vs VMAX VSAT Saturation velocity m/s THETA Mobility reduction parameter V-1

Si

qNCHTOXGAMMA

εγ

2== (3.1.1)

==

itF n

NCHPHI ln2φφ (3.1.2)

( ) ( )

−+−

+= 222 03002VTHVTHVDD

VTHVDDTOX

UBTOXUA

THETA (3.1.3)



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3.2 Modeling the MOSFET Drain Current

The ACM drain current expression for the MOSFET is given in (3.2.1), where IF is the forward

current that flows from the drain to the source and depends on VGB and VSB, and IR is the reverse

current that flows from the source to the drain and depends on VGB and VDB [8]. The ACM

model refers all MOSFET terminal voltages to the bulk terminal, thus preserving drain-source

symmetry. With bulk-referred notation, VGB becomes VG, VSB becomes VS, and so on.

),(),( DGRSGFD VVIVVII −= (3.2.1)

Using the saturation current in (3.2.2), where µ in the carrier mobility, COX is the oxide

capacitance per unit area, and φt is the thermal voltage, the drain current can be normalized to

yield (3.2.3).

2

21

toxS LW

CI φµ

= (3.2.2)

rfS

DGRSGF

S

Dd ii

IVVIVVI

II

i −=−

==),(),(

(3.2.3)

For a MOSFET in saturation, the drain current depends largely on VG and VS but not on VD [8].

Therefore, if >> ir, leading to the approximation in (3.2.4).

fS

Dd i

II

i ≈= (3.2.4)

The parameter if is called the inversion coefficient, because it indicates whether the transistor is

in weak (if < 1), moderate (1 < if < 100), or strong inversion (if > 100) [8,10,21]. The boundary

between weak and moderate inversion (if = 1) occurs where diffusion and drift contribute equally

to the drain current. Unfortunately, the boundary between moderate and strong inversion has no

physical definition. Note however, this is not a shortcoming of the ACM model in particular.

Combining (3.2.2) and (3.2.4) produces the final expression for the drain current given by (3.2.5).

ftoxD iL

WCI

= 2

21

φµ (3.2.5)

Note that (3.2.5) contains only three designer-controlled input parameters: if, W, and L. By

choosing if, the designer fixes the level of inversion and the drain current per unit (W/L).



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3.3 Modeling MOSFET Voltages

Using the parameter if and the approximation of (3.2.4), equations (3.3.1) and (3.3.2) are derived

in [6,7,8,9] for VGS and VDSsat respectively. Note that references [6,7,8,9,15] state VGS under the

assumption that Vs = 0, however, designers must consider the body effect, so I have included

here the general expression for VGS.

( )[ ] ( ) SfftTGS VniinVV 111ln210 −+−++−++= φ (3.3.1)

( )31 ++= ftDSsat iV φ (3.3.2)

Note that VDSsat depends only on the thermal voltage, φt, and the inversion coefficient if. The

designer need only choose if to determine VDSsat.

However, VGS depends on n, φt, if, VS, and VT0. Furthermore, as shown in (3.3.3), n is also a

function of if, VS, the body effect parameter, γ, and the surface potential φF. Note that references

[6,7,8,9,10,15,21] express n in terms of other parameters that are not as important to the circuit

designer. However, I derived (3.3.3) using the equations in references [6,7,8,9,10].

( )[ ] SfftF Viin

+−++−+++=

11ln21221

φφ

γ (3.3.3)

Of the parameters in (3.3.3), φF, and γ are given directly by the ACM model, and φt is set by

temperature. Therefore, the only design parameters available in the VGS equation (3.3.1) are if

and VS.

By choosing if and VS, the designer fixes VGS, VDSsat, the level of inversion, and the drain current

per until (W/L). In most cases VS = VB, and in the ACM model VB = 0 by definition, leaving

only if to be chosen by the designer.



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3.4 Design Methods based on (gm/ID)

As I will discuss later, many circuit performance goals can be expressed in terms of a MOSFET’s

transconductance to drain current ratio [8,10,13]. However, there is a one-to-one relationship

between gm/ID and if, given in (3.4.1) [11]. Therefore, the ACM model allows designers to use

(gm/ID) and if interchangeably.

( )

++=

1121

/ft

Din

Igmφ

(3.4.1)

Unfortunately, (3.4.1) cannot be solved explicitly for if because the term n, given in (3.3.3), is a

transcendental function of if. Nonetheless, the relationship between if and gm/ID is one-to-one,

and in choosing (gm/ID), the designer has fixed if, VGS, VDSsat, and the MOSFET’s level of

inversion. In Figure 1 I have graphed the relationship between gm/ID and if, given by (3.4.1). I

have also shown the well known weak and strong inversion approximations given by (3.4.2) and

(3.4.3) respectively. Note that these approximations are inaccurate in moderate inversion, but

nonetheless are often used to design circuits with transistors biased in moderate inversion.

Reference [17] provides three excellent design examples, and demonstrates the peril of using

weak and strong inversion approximations in the moderate inversion region.

( ) twiD nIgm φ1/ = (3.4.2)

( ) ( ) ( )2

422/

tfSfDsiD iIi

LWKPI

LWKPIgm

φ=== (3.4.3)

gm/ID versus Inversion Coefficient

0

10

20

30

40

0.01 0.1 1 10 100 1000Inversion Coefficient

gm/ID

ACM gm/IDs.i. approxw.i. approx

Figure 1: The ACM transconductance to current ratio, continuous through weak, moderate and

strong inversion (plotted using Microsoft Excel)



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3.5 Small Signal Transconductance

Often, circuit design specifications place a constraint on a MOSFET’s transconductance, and the

designer would like to determine the transistor size and bias current that yield the desired gm. In

general, gm is given by (3.5.1) or alternatively (3.5.2) [8]. Depending upon the design goals, the

designer may wish to calculate gm based on if and (W/L), or if and ID [13].

( )11 −+= ft

ox inL

WCgm

φµ (3.5.1)

( )112

++= ft

D inI

gmφ

(3.5.2)

3.6 Intrinsic Capacitance

Accurate calculation of circuit frequency response requires accurate estimation of all MOSFET

capacitances and the judicious elimination of the negligible ones [14]. The ACM model provides

accurate values for MOSFET capacitances, and indicates the important capacitances.

MOSFET capacitances are the sum of two components: the intrinsic component and the

geometric component. The intrinsic component arises from fluctuations of charge stored in the

channel, and in the depletion region surrounding the channel and drain/source implants. The

geometric component arises from gate overlap and fringe effects. In general, overlap and fringe

effects contribute substantially to Cgs and Cgd, but are negligible between other terminals. In this

paper I discuss only intrinsic capacitances.

The MOSFET is a four terminal device, and therefore has 16 different intrinsic capacitances.

However, only 9 of the capacitances are independent, and exact equations for these are

derived/given in [6,7,8,9,10,11] in terms of if and ir. Therefore, in (3.6.1) to (3.6.4), I have only

stated the formulas for the most commonly used capacitances: Cgs(d), Cds, Cgb, and Cbs. Note that

(3.6.1) to (3.6.4) are valid in all regions of operation. In (3.6.1) to (3.6.4), COX is the total

capacitance of the gate, given by (3.6.5).



14

( )

+++

+−

+−= 2

)(

)()(

11

11

11

132

rf

fr

rfoxdgs

ii

i

iCC (3.6.1)

( ) ( ) ( )( )

+++

++++++−+= 3

11

181191311

154

rf

rrfffoxds

ii

iiiiinCC (3.6.2)

( )gdgsoxgb CCCn

nC −−

−

=1

(3.6.3)

( ) gsbs CnC 1−= (3.6.4)

OX

SiOX t

WLC

εε 0= (3.6.5)

I normalized (3.6.1) to (3.6.4) with respect to COX, and plotted the results versus if in Figure 2. In

these plots, I assume the ratio ir/if = 0.1 is constant.

Normalized Intrinsic MOSFET Capacitances

0

0.2

0.4

0.6

0.8

0.01 0.1 1 10 100 1000Inversion Coefficient

C/C

OX

cgs/COX

cgd/COX

cds/COX

cgb/COX

cbs/COX

Figure 2: Normalized intrinsic MOSFET capacitances versus inversion coefficient [8]

Figure 2 indicates which of the five capacitances are important in each region of operation. For

example, in weak inversion, (if < 1), Cgb is important and Cgs can be neglected. However, in

strong inversion, (if < 100), Cgd and Cgs are important. Figure 2 reveals another disadvantage of

the body effect in moderate inversion, namely, the effects Cbs must be considered. Furthermore,

Figure 2 shows that, in weak inversion, the common gate amplifier has the additional advantage

over the common-source: Cgb does not affect the frequency response of the common-gate if the

bulk is grounded.



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4. Design Methodology Based on the Inversion Coefficient

4.1 Expressing Circuit Specifications in terms of the Inversion Coefficient I have already shown that MOSFET currents, voltages, capacitances, and transconductances

(herein referred to as “MOSFET design parameters”) can be expressed in terms of the inversion

coefficient if, or gm/ID. In fact, many equations that relate circuit performance to MOSFET

design parameters can be rewritten in terms of if or gm/ID [8,10,13]. In equations (4.1.1) and

(4.1.2) I have provided examples.

ADD

AOOL V

Igm

IV

gmgmRA

=== (4.1.1)

=

=D

C

D

CT

Igm

CI

Cgm

RateSlewf

ππ

41

2

2 (4.1.2)

Note that (4.1.1) and (4.1.2) are written in terms of gm/ID, but can be restated in terms of if using

(3.4.1). Rewriting specifications in terms of if (or gm/ID) is not merely a mathematical exercise,

but reveals whether MOSFETs should be biased in weak, moderate, or strong inversion to

achieve the best circuit performance. Rewriting specifications in terms of if also minimizes the

number of variables the designer must consider simultaneously, and can make design equations

valid for all regions of operation2. Thus, the inversion coefficient based design methodology

simplifies the design process. In the remainder of this section I provide more detailed discussions

that relate circuit performance to MOSFET design parameters.

4.2 Transistor Mismatch Even with careful layout, no two transistors are identical. Circuit designers need to understand

how to minimize the effects of mismatch on circuit performance. As explained in [5], process

variations cause transistors to differ in many respects, and a complete analysis of mismatch is

beyond the scope of this paper. Usually however, the designer requires only two statistical

2 Care must be exercised when an equation that assumes a region of operation is rewritten it in terms of if. In such cases, the original assumption about the region of operation remains relevant. For example (3.4.2) and (3.4.3) are not true in general, but (3.4.1) is.



16

parameters to effectively characterize transistor mismatch [21]. The parameters are σVT0 and σβ,

which represent, respectively, the standard deviations of VT0 and µCox(W/L) of two adjacent

transistor layouts. Normally, these values are made available by the foundry. Using these

parameters, the designer can calculate the expected ID mismatch of two transistors with the same

VGS (4.2.1), as in the case of the differential pair in Figure 3a.

2

2

0 βσσσ +

= VT

DID I

gm (4.2.1)

Equation (4.2.1) indicates that transistors biased with the same VGS should be biased in strong

inversion (low gm/ID) to achieve the best matching between their drain currents.

(a) (b)

Figure 3: MOSFETs biased with the same VGS (a) and the same ID (b)

Conversely, the designer can calculate the expected VGS mismatch of two transistors biased with

the same ID (4.2.2), as in the case of the circuit in Figure 3b. Equation (4.2.2) indicates that

transistors biased with the same ID should be biased in weak inversion (high gm/ID) to achieve the

best matching between their gate-source voltages.

2

20

+=

β

σσσ β

gmI D

VTVGS (4.2.2)

Equations (4.2.1) and (4.2.2) can be applied to calculate input offset voltages of amplifiers,

comparators, and A/D converters, in terms of gm/ID, or if. For example, mismatch causes the

input stage in Figure 4 to exhibit the input referred offset voltage given by (4.2.3). Clearly, the

only variable available to the designer in (4.2.3) is (gm/ID).

( )( )

2

1

2

01

220 2

+

+=

β

σσσ β

gmI

IgmIgm

V DVT

D

DVTOS (4.2.3)

IBIAS IBIAS

2IBIAS



17

Figure 4: Simple differential pair used to demonstrate offset voltage calculations

4.3 Transconductor Linearity

A simple transconductor, such as the one in Figure 5a, has the transfer function shown in Figure

5b. For small input signals, the transfer function is approximately linear, but for large input

signals, the transfer function is clearly non-linear.

(a) (b)

Figure 5: Asymptotic definition for the input linear range of a transconductor

Qualitatively, the input voltage linear range Vlin of the transfer function in Figure 5b can be

defined asymptotically as shown. Note that many applications require a stricter definition for

input linear range, but for the purposes of this discussion the asymptotic definition is adequate.

Shown in Figure 6 is a family of curves that represent transconductors biased with the same

gm/ID ratio.

M1P M1N

M2N M2P

IDN

IDP IDP

io=gm(vip-vin)

vin vip

2ID

-2ID Vlin

io

vin

M1P M1N

M2N M2P

IDN

IDP IDP

io=gm(vip-vin)

vin vip



18

Figure 6: Transfer characteristics for transconductors with the same gm/ID

Note that gm (slope) and ID (asymptotic io values) are different for all three curves, but the

asymptotic definition of input linear range results in the same Vlin for all three transconductors.

Intuitively, the linear range of a transconductor depends largely on (gm/ID) (or if) of the input

differential pair.

Setting aside the qualitative asymptotic definition of linear input range, Equation (4.3.1) is the

typical definition for Vlin [14].

( )LWKPI

V SSlin

22= (4.3.1)

Using (4.3.2), I have rewritten the definition in terms of if, as shown in (4.3.2).

( ) ( )24

1622 tf

DSSlin i

LWKPI

LWKPI

V φ=== (4.3.2)

Unfortunately, both (4.3.1) and (4.3.2) are based on the assumption that the input pair is biased in

strong inversion. A complete description of transconductor distortion must be valid for all levels

of inversion, and must include non-linearities introduced by the active load, the tail current

source, and channel length modulation of the input pair. Nonetheless, (4.3.2) represents a

starting point for the analysis of transconductor linearity based on if, an analysis that may

eventually encompass the 2nd order effects listed, in addition to the effects of source degeneration

and other linearizing techniques.

2ID

-2ID Vlin

io

vin



19

5. Conclusion

The ACM model is a physically based MOSFET model with few parameters and equations.

Furthermore, the parameters and equations are directly related to circuit performance

specifications, making the ACM model useful to circuit designers. The equations are accurate

and continuous throughout all regions of operation, thus allowing designers to eliminate costly

error margins to achieve the best circuit performance in low-voltage low-power systems. I have

demonstrated that design methods based on the transconductance-to-current ratio or the inversion

coefficient lend themselves to use with the ACM model. Although some research has been done

in this area, in particular numerous articles provide design examples, I believe that there are many

research opportunities. In particular, I believe that the areas of transconductor distortion analysis,

automated amplifier design, and compact modeling of deep submicron devices require further

investigation.



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6. References [1] Bagheri M., Tsividis Y. A small signal dc-to-high-frequency nonquasistatic model for the four-terminal MOSFET valid in all regions of operation. IEEE Transactions on Electron Devices. Vol. ED-32, #11, Nov. 1985. [2] Baker R.J., Li H.W., Boyce D.E. CMOS circuit design, layout, and simulation. IEEE Inc. New York, 1998. [3] Bucher M., Lallement C., Enz C.C., Theodoloz F., Krummenacher F. The EPFL-EKV MOSFET Model Equations for Simulation. Electronics Laboratories, Swiss Federal Institute of Technology: Technical Report Model Version 2.6, Revision II, July 1998. [4] Coitinho R.M., Spiller L.H., Schneider M.C., Galup-Montoro C. A simplified methodology for the extraction of the ACM MOST model parameters. Integrated Circuit Laboratory, Department of Electrical Engineering, University of Santa Catarina, Brazil. [5] Croon J.A., Rosmeulen MJ., Decoutere S., Sansen W., Maes H.E. An easy-to-use mismatch model for the MOS transistor. IEEE Journal of Solid-State Circuits. Vol. 37, #8, 2002. [6] Cunha A.I.A., Gouveia-Filho O.C. Schneider M.C. Galup-Montoro C. A current-based model for the MOS transistor. IEEE International Symposium on Circuits and Systems, 1997. [7] Cunha A.I.A., Schneider M.C., Galup-Montoro C. An explicit physical model for the long-channel MOS transistor including small-signal parameters. Solid-State Electronics. Vol. 38, #11, pg. 1945-1952, 1995. [8] Cunha A.I.A., Schneider M.C., Galup-Montoro C. An MOS transistor model for analog circuit design. IEEE Journal of Solid-State Circuits, Vol. 33, #10, Oct. 1998. [9] Cunha A.I.A., Schneider M.C., Galup-Montoro C. Derivation of the unified charge control model and parameter extraction procedure. Solid-State Electronics. Vol. 43, pg. 481-485, 1999. [10] Enz C.C., Krummenacher F., & Vittoz E.A. An analytical MOS transistor model valid in all regions of operation and dedicated to low-voltage and low-current applications. Analog Integrated Circuits and Signal Processing. Vol. 8, pg. 83-114, 1995. [11] Gouveia Filho O.C., Cunha A.I.A., Schneider M.C., Galup-Montoro C. The ACM model for circuit simulation and equations for SMASH. [Online]: http://www.dolphin.fr, Sept 1997.



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[12] Mallya S.M., Nevin J.H. Design procedures for a fully differential folded-cascode CMOS operational amplifier. IEEE Journal of Solid-State Circuits. Vol. 24, #6, 1989. [13] Oliveira Pinto R.L., Cunha A.I.A., Schneider M.C., Galup-Montoro C., An amplifier design methodology derived from a MOSFET current-based model. IEEE International Symposium on Circuits and Systems, 1998. [14] Razavi B. Design of analog CMOS integrated circuits. McGraw-Hill Inc. New York, 2001. [15] Sanchez-Sinencio E., Yan S. Low voltage analog circuit design techniques: a tutorial. IEICE Transactions on Analog Integrated Circuits and Systems. Vol. E00-A, #2, Feb. 2000. [16] Shur M., Fjeldly T.A., Ytterdal T., Lee K. Unified MOSFET model. Solid-State Electronics. Vol. 35, #12, 1992. [17] Silveira F., Flandre D., Jespers P.G.A. A gm/ID based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-ion-insulator micropower OTA. IEEE Journal of Solid State Circuits. Vol. 31, pg. 1314-1319, Sept. 1996. [18] Tsividis Y.P., Suyama K., MOSFET modeling for analog circuit CAD: problems and prospects. IEEE Journal of Solid-State Circuits. Vol. 29, #3, March 1994. [19] Tsividis Y.P. (1987). Operation and Modeling of the MOS Transistor. McGraw- Hill Book Company, New York. [20] Turchetti C., Masetti G., Tsividis Y. On the small-signal behaviour of the MOS transistor in quasistatic operation. Solid-State Electronics. Vol. 26, #10, pg. 941-949, 1983. [21] Vittoz E.A. Micropower Techniques. Reprinted from Design of VLSI Circuits for Telecommunications and Signal Processing. Ed. Franca J.E. & Tsividis Y.P. Prentice Hall, 1994, Chapter 5.

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