TechRef SEL Directional

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DIgSILENT Technical Documentation SEL Directional block

Transcript of TechRef SEL Directional

Page 1: TechRef SEL Directional

D I g S I L E N T T e c h n i c a l D o c u m e n t a t i o n

SEL Directional block

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S E L d i r e c t i o n a l b l o c k 2

DIgSILENT GmbH Heinrich-Hertz-Strasse 9 D-72810 Gomaringen Tel.: +49 7072 9168 - 0 Fax: +49 7072 9168- 88 http://www.digsilent.de e-mail: [email protected]

Sel Directional block

Published by DIgSILENT GmbH, Germany

Copyright 2003. All rights reserved. Unauthorised copying or publishing of this or any part of this document is prohibited.

doc.TechRef, Build 233 27 März 2007

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T a b l e o f C o n t e n t s

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Table of Contents

1 GENERAL DESCRIPTION ....................................................................................................................................... 4

2 USING THE BLOCK ................................................................................................................................................ 5

3 AVAILABLE SEL DIRECTIONAL TYPES .................................................................................................................. 6

3.1 SEL321..........................................................................................................................................................................7

3.2 SEL 351 ........................................................................................................................................................................7

3.3 SEL351R .......................................................................................................................................................................7

4 INPUT PARAMETERS DEFINITION........................................................................................................................ 8

4.1 DIRECTIONAL TYPE (TYPSELDIR)...................................................................................................................................8

4.2 SEL DIRECTIONAL ELEMENT (RELSELDIR)......................................................................................................................8

5 INPUT/OUTPUT SIGNALS DEFINITION ................................................................................................................ 9

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1 G e n e r a l d e s c r i p t i o n

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1 General description

The SEL directional block is a full implementation of the new directional logic used by the Schweitzer devices. Such logic is using the negative and the zero sequence impedances to detect the direction of both the phase and the ground fault current.

At the moment the block is completely supporting the directional detection features of the SEL 321, SEL 351 and SEL351R. It means that the SEL 321logic is using only a Negative sequence current negative voltage polarized directional logic. The SEL351 and SEL351R logic is more complicate and consists of a combination of three directional elements:

• Zero-sequence current-polarized (321).

• Negative-sequence voltage-polarized (32Q).

• Zero-sequence voltage-polarized (32V).

The logic selects the optimal directional element for each system condition.

The Zero-sequence current-polarized equation is:

where:

Ipol Polarizing quantity

3I0 Operating quantity: 310= IA+ IB+ lc

The Negative-sequence voltage-polarized equation is:

where:

V2 = Negative-sequence voltage = (VA+ a2VB+ aVc)/3

I2 = Negative-sequence current (IA + a2IB + alc)/3

ΘL2 Line negative-sequence impedance angle

The Zero-sequence voltage-polarized equation is:

( )00 3cos3 IIIIT polpol ∠−∠=

( )[ ]2

2

*222

2*1Re

IIVZ LΘ∠

=

( )[ ]2

0

*000

03

*13ReI

IVZ LΘ∠

=

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where:

V0 = Zero-sequence voltage = (VA+ VB+ Vc)/3

I0 = Zero-sequence current (IA + IB + lc)/3

ΘL0 Line zero-sequence impedance angle

For more details regarding such detection method please refer to:

http://www.selinc.com/techpprs/6026.pdf

http://www.selinc.com/techpprs/6072.pdf

http://www.selinc.com/techpprs/6036.pdf

http://www.selinc.com/techpprs/6009.pdf

http://www.selinc.com/techpprs/6012.pdf

http://www.selinc.com/appguide/9902.pdf (SEL351R sensitive directional element)

2 Using the block

The SEL directional type class name is TypSeldir; the SEL directional element class name is RelSeldir.

Figure 1: The RelSeldir dialog main page (SEL 351R)

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Please note that such directional block interface is including the directional settings which are usually part of the single distance tripping zone of the impedance devices. In other words it’s inside this block that the directional setting of each trip element must be set using the “Level 1 direction”, “Level 2 direction” etc combo boxes. 16 separated enabling outputs are available.4 for each of the main “families” of protective elements: the positive sequence elements family, the negative sequence elements family, the neutral current elements family and the residual current elements family.

The block is also providing the outputs to control the phase, ground and negative sequence overcurrent element (51P,51N,51Q).

The directional type is set using the “Relay model” parameter in the SelDir type dialog (TypSeldir) main page.

3 Available SEL directional types

3 different types of SEL directional logic are available:

• SEL321 • SEL351 • SEL351R

Figure 2: The TypSelDir dialog main page with the “Relay Model” combobox open

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3.1 SEL321

It fully supports the Schweitzer SEL 321 directional element:

with reference the 321-3_im_20010417.pdf ( http://www.selinc.com/instruction_manual/321-3/321-3_IM_20030404.pdf )manual the logic implements Figure 2.22 scheme (pag#2-63) . The “loss of potential” and the “open pole logic” are implemented using simplified schemes (the reference schemes are figure 2.37 and 2.39 (pag#2-73-75))

3.2 SEL 351

It fully supports the Schweitzer SEL 351 directional element:

with reference the 351-5-6-7_im_20010307.pdf (http://www.selinc.com/instruction_manual/351-5,6,7/351-5-6-7_IM_20030908.pdf) manual the logic implements Figure 4.5 (pag#4-11), Figure 4.6 scheme (pag#4-12), Figure 4.7 scheme (pag#4-13), Figure 4.8 scheme (pag#4-14), Figure 4.9 scheme (pag#4-15), Figure 4.10 scheme (pag#4-16), Figure 4.11 scheme (pag#4-16), Figure 4.12 scheme (pag#4-17), Figure 4.14 scheme (pag#4-21), Figure 4.15 scheme (pag#4-22), Figure 4.16 scheme (pag#4-23), Figure 4.17 scheme (pag#4-24), Figure 4.18 scheme (pag#4-25) . . The “loss of potential” is implemented using the Figure 4.1 scheme (pag#4-1), the “open pole logic” is implemented using the Figure 5.3 scheme (pag#5-8).

3.3 SEL351R

It fully supports the Schweitzer SEL 351 directional element:

with reference the 351R_IM_20021119.pdf (http://www.selinc.com/instruction_manual/351r/351R_IM_20021119.pdf) manual the logic implements Figure 4.5 (pag#4-11) Figure 4.6 scheme (pag#4-12), Figure 4.7 scheme (pag#4-12), Figure 4.8 scheme (pag#4-13), Figure 4.9 scheme (pag#4-14), Figure 4.10 scheme (pag#4-15), Figure 4.11 scheme (pag#4-16), Figure 4.12 scheme (pag#4-17), Figure 4.13 scheme (pag#4-17), Figure 4.14 scheme (pag#4-18), Figure 4.15 scheme (pag#4-19), Figure 4.17 scheme (pag#4-23), Figure 4.18 scheme (pag#4-24), Figure 4.19 scheme (pag#4-25), Figure 4.20 scheme (pag#4-25), Figure 4.21 scheme (pag#4-26) . The “loss of potential” is implemented using the Figure 4.1 scheme (pag#4-1), the “open pole logic” is implemented using the Figure 5.3 scheme (pag#5-6).

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4 Input Parameters definition

4.1 Directional Type (TypSeldir)

Parameter Description Unit

Relaymodel Relay model (SEL321,SEL351,SEL351R)

dir1pos Level 1 direction (F,R,N or F,R or F,N or R,N or F:N)

dir2pos Level 2 direction (F,R,N or F,R or F,N or R,N or F:N)

dir3pos Level 3 direction (F,R,N or F,R or F,N or R,N or F:N)

dir4pos Level 4 direction (F,R,N or F,R or F,N or R,N or F:N)

rs50P32P Range of the phase directional element 3-phase pickup threshold Amps

rs50GFP Range of the forward directional residual ground pickup threshold Amps

rs50GRP Range of the reverse directional residual ground pickup theshold Amps

Ts Pickup Time Sec

rZ0F Range of the forward directional Z0 threshold Ohm

rZ0R Range of the reverse directional Z0 threshold Ohm

rZ0 Range of the zero sequence line impedance magnitude threshold Ohm

Rphi0 Range of the zero sequence line impedance angle threshold Ohm

rs50LP Range of the load detection phase pickup threshold Amps

ra0 Range of the zero sequence current restraint factor a0 = I0/I1 Amps

rs50QF Range of the forward directional current threshold Amps

rs50QR Range of the reverse directional current threshold Amps

rZ2F Range of the forward directional Z2 threshold Ohm

rZ2R Range of the reverse directional Z2 threshold Ohm

RZm Range of the positive sequence line impedance magnitude threshold Ohm

Rphi Range of the positive sequence line impedance angle threshold

ra2 Range of the positive sequence current restraint factor a2 = I2/I1

rk2 Range of the zero sequence current restraint factor k2 = I2/I0

4.2 Sel directional Element (RelSeldir)

Parameter Description Unit

ORDER Ground directional element priority OFF , Q , V , I , Q V , Q I , V Q , V I , I

V , Q , Q V I, Q I V, V Q I , V I Q , I Q V,I

V Q

DIR1 Level 1 direction F,R,N

DIR2 Level 2 direction F,R,N

DIR3 Level 3 direction F,R,N

DIR4 Level 4 direction F,R,N

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s51PTC Phase(51P) Torque Control M2P,N

s51NTC Residual(51N) Torque Control 32QF,32QR,Z2G,N

s51QTC Negative sequence(51Q) Torque Control: 32QF,32QR,M2P,Z2G,N

ELOP Loss Of Potential enable setting Y,Y1,N

s3PVOLT True 3-phase voltage connected 3PVOLT flag

E32IV Ground directional element enabling flag

s50P32P Phase directional element 3-phase pickup threshold Amps

s50GFP Forward directional residual ground pickup threshold Amps

s50GRP Reverse directional residual ground pickup theshold Amps

Z0F Forward directional Z0 threshold Ohm

Z0R Reverse directional Z0 threshold Ohm

Z0 Zero sequence line impedance magnitude threshold Ohm

phi0 Zero sequence line impedance angle threshold Ohm

s50LP Load detection phase pickup threshold Amps

a0 Zero sequence current restraint factor a0 = I0/I1 Amps

s50QF Forward directional current threshold Amps

s50QR Reverse directional current threshold Amps

Z2F Forward directional Z2 threshold Ohm

Z2R Reverse directional Z2 threshold Ohm

Zm Positive sequence line impedance magnitude threshold Ohm

Phi Positive sequence line impedance angle threshold

a2 Positive sequence current restraint factor a2 = I2/I1

k2 Zero sequence current restraint factor k2 = I2/I0

5 Input/output Signals definition

Input Signal Description Unit

I1 Positive sequence Current Amps

I0r Zero sequence current real part Amps

I0i Zero sequence current imaginary part Amps

I2r Negative sequence current real part Amps

I2i Negative sequence current imaginary part Amps

Inr Neutral current real part Amps

Ini Neutral current imaginary part Amps

I1r Positive sequence current real part Amps

I1i Positive sequence current imaginary part Amps

U1 Positive sequence voltage Volt

U2r Negative sequence voltage real part Volt

U2i Negative sequence voltage imaginary part Volt

U0x3r Zero sequence voltage real part Volt

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U0x3i Zero sequence voltage imaginary part Volt

U1r Positive sequence voltage real part Volt

U1i Positive sequence voltage imaginary part Volt

M2PStart Starting signal coming from the phase (Mho) zone #2

Z2GStart Starting signal coming from the ground zone #2

BreakerStatus Breaker status signal (1 = closed,0 = open). At the moment not used

Output Signal Description Unit

Fwd_I1 Signal on when the positive sequence element detects a forward fault

Fwd_I2 Signal on when the negative sequence element detects a forward fault

Fwd_I0 Signal on when the zero sequence element detects a forward fault

Fwd_IN Signal on when the neutral current element detects a forward fault

rev_I1 Signal on when the positive sequence element detects a reverse fault

rev_I2 Signal on when the negative sequence element detects a reverse fault

rev_I0 Signal on when the zero sequence element detects a reverse fault

rev_IN Signal on when the neutral current element detects a reverse fault

I0Level1 I0 level 1 enabling signal

I0Level2 I0 level 2 enabling signal

I0Level3 I0 level 3 enabling signal

I0Level4 I0 level 4 enabling signal

INLevel1 IN level 1 enabling signal

INLevel2 IN level 2 enabling signal

INLevel3 IN level 3 enabling signal

INLevel4 IN level 4 enabling signal

I1Level1 I1 level 1 enabling signal

I1Level2 I1 level 2 enabling signal

I1Level3 I1 level 3 enabling signal

I1Level4 I1 level 4 enabling signal

I2Level1 I2 level 1 enabling signal

I2Level2 I2 level 2 enabling signal

I2Level3 I2 level 3 enabling signal

I2Level4 I2 level 4 enabling signal

_51PTC Signal enabling the phase overcurrent element (51P)

_51NTC Signal enabling the neutral overcurrent element (51N)

_51QTC Signal enabling the negative sequence overcurrent element (51Q)