Teaching Staff...
Transcript of Teaching Staff...
1
EECS240 – Spring 2013
Advanced Analog Integrated Circuits Lecture 1: Introduction
Lingkai Kong EECS
2
Who am I? • Lingkai Kong • Ph.D. in EECS, UC Berkeley, Dec. 2012.
• Currently a post-doc at BWRC
• Thesis: 60GHz Energy-Efficient Phased-Array Design for High Data-Rate Wireless Communications
• Research Interest • Mixed-signal circuit and system design • RF/Microwave circuit and system design • Power circuit design • Design Automation
3
Teaching Staff • Lingkai’s office hours
• Location: TBA • Tues. and Thurs. 11am-12pm (right after the class) • konglk@eecs
• GSI: Yue Lu • Weekly discussion session/office hours • Time/location: TBA
• Most likely Fri. 10am-11am in 550 Cory • yuelu@eecs
4
Administrative • Course web page:
http://bwrc.eecs.berkeley.edu/classes/icdesign/ee240_sp13
• Lecture videos • Will be posted on course website
• All announcements made through piazza • Enroll in EE240 at:
https://piazza.com/class#spring2013/ee240
5
Lecture Notes • Based on material from Prof. Elad Alon, Prof.
Bernhard Boser, Prof. Ali Niknejad, Simone Gambini, and myself
• Primary source of material for the class • No required text – reference texts on next slide
• Notes posted on the web at least 1 hour before lecture
6
References • Analysis and Design of Integrated Circuits,
Paul R. Gray, Paul J. Hurst, Stephen H. Lewis, Robert G. Meyer, 4th Ed., Wiley, 2001.
• Design of Analog CMOS Integrated Circuits, Behzad Razavi, McGraw-Hill, 2000.
• The Design of CMOS Radio-Frequency Integrated Circuits, Thomas H. Lee, 2nd Ed., Cambridge University Press, 2003.
• The Art of Analog Layout, A. Hastings, Prentice Hall, 2005.
• The Designers Guide to SPICE & SPECTRE, K. S. Kundert, Kluwer Academic Press, 1995.
• Operation and Modeling of the MOS Transistor, Y. Tsividis, McGraw-Hill, 2nd Edition, 1999.
• Solid-State Circuits, Journey of
2
7
Grading • Grading:
• HW: 20% • One HW roughly every two weeks • Essential for learning the class material
• Project: 25% • Groups of 2 – find a partner ahead of time
• Midterm: 20% • Final Exam: 35%
8
Homework • Homework:
• Can discuss/work together • But write-up must be individual • Hand in during the class • Electronic version encouraged • Generally due 5pm on Thursdays
• No late submissions in general • Start early! • Exceptions: Tape-out and etc., tell us ahead of
time
9
Simulation Tools • Need to setup Spectre or equivalent
simulator • HSPICE, ADS, BDA, SpectreRF, Eldo, or other
favorite tool • Berkeley Analog Generator (BAG)
• Python based analog design framework • Design automation/scripting • Design optimization • Complete setup on instructional servers (t7400-*)
and BWRC servers • See course website for tutorials • Special discussion session for BAG (this Fri.)
10
Schedule Notes • ISSCC Week: 2/17 – 2/21 (no lectures) • Spring break: 3/25 – 3/29 • Midterm: March 14 (tentative) • Project:
• Part 1 due middle of Apr. • Part 2 due end of Apr. • Part 3 due May 9th(tentative)
• Final: Wed., May 15, 11:30am-2:30pm
Why Analog IC?
12
“Analog ICs in a Digital World?” Digital circuitry: • Cost/function
decreases by 29% each year
• 30X in 10 years
Analog circuitry: • Cost/function may not scale very well • Common complaints about scaling analog:
• Supply voltage is too low, device gain is low, horrible matching…
“Analog will die – everything will be digital!” • Who agrees?
0.00000010.0000001
0.0000010.000001
0.000010.00001
0.00010.0001
0.0010.001
0.010.01
0.10.111
19821982 19851985 19881988 19911991 19941994 19971997 20002000 20032003 20062006 20092009 20122012
cost: cost: ¢¢--perper--transistortransistor
Fabrication cost per transistor
0.00000010.0000001
0.0000010.000001
0.000010.00001
0.00010.0001
0.0010.001
0.010.01
0.10.111
19821982 19851985 19881988 19911991 19941994 19971997 20002000 20032003 20062006 20092009 20122012
cost: cost: ¢¢--perper--transistortransistor
Fabrication cost per transistor
3
13
(Good) Digital Design Needs Analog Insights • Can synthesize large blocks at “medium”
frequencies in ASIC flow, but • Need to know transistors to design the cells • Really need to know transistors to design memories
• Lots of analog issues to deal with when push digital performance, power, etc. • Charge sharing, interconnect parasitics, etc.
• Matching growing concern in advanced CMOS technologies • Especially in memories
14
Another Example
• Look at interface between two digital chips • Is received bit a
“1” or a “0”?
• Analog circuits critical for receiving bits correctly
TX RX
Initial eye
15
The More Fundamental Reason • The “real” or “physical” world is analog
• Analog is required to interface to just about anything
• Digital signals have analog characteristics too… • “If you look close enough, all the digital signals are
analog” • In many applications, analog is in the critical path
• Examples: • Wireline, optical communications • RF transceivers (receiver + transmitter) • Sensors and actuators (e.g., MEMS)
16
RF Receiver
• Why so many RF and analog building blocks?
• Why not just put the ADC right after the antenna?
17
Software Defined Radio
18
RF Transceiver Layout
• Analog building blocks take up significant die area • Even in 0.13um…
Source: Zagari et al, “A Dual-Band CMOS MIMO Radio SoC for IEEE 802.11n Wireless LAN”, JSSC Dec. 2008"
4
19
Capacitive Touch Sensor
20
MEMS Accelerometer
DSP"
A/D Conversion"
Amplification"
C/V conversion"
MEMS "sensor"
Acceleration"
Digital Output"
M. Lemkin and B. E. Boser, “A Three-Axis Micromachined Accelerometer with a CMOS Position-Sense Interface and Digital Offset-Trim Electronics,” IEEE J. Solid-State Circuits, vol. SC-34, pp. 456-468, April 1999
Analog Design versus Others
22
Analog versus Digital Design • Abstraction in digital is Boolean logic (1’s, 0’s)
• Works because of noise margins • At a higher level, it’s gates and registers (RTL) • Digital layout is often automated
• Abstraction in analog is the device model • (BSIM is a few thousand lines long)
• At a higher level, it’s the (opamps) (filters) (comparators) • Abstraction depends on the problem you’re solving
• Analog layout is usually hand crafted • Is there a way to automate analog layout?
23
Analog versus RF Design • RF = “Analog with inductors” • RF signal is usually narrowband (i.e., sinusoidal)
• Tuned circuit techniques used for signal processing.
• RF impedance levels are relatively low • Can’t make transmission line impedance too high
• Analog impedances are high (low) for voltage (current) gain. • Voltage/current gain versus power gain.
• “Mixed-signal” analog is often discrete time (sampled).
24
RF Shifting Toward Analog
• Classic RF uses inductors to tune the circuits • Inductors are big – would be nice to get rid of them
• With increasing fT , moving towards wideband analog & feedback • What’s the penalty?
5
25
Mixed-Signal Design
• Many building blocks involve analog and digital circuit co-design • PLLs, ADCs, etc.
• Sometimes hard to even distinguish between analog and digital • Is VCO analog, or digital?
Clk
PFD RegulatorVcp
Vreg
up
down
÷N
Ref_clk+
-
26
Digitally-Assisted Analog
• In 90nm, one RF inductor (200µ× 200µ) takes same area as a microprocessor! • Leverage digital processing to improve analog circuits
• Good analog design doesn’t go away though • Need to find right partitioning to maximize the benefit
Source: B. Murmann, “Digitally-Assisted Analog Circuits – A Motivational Overview,” ISSCC 2007."
Contents of This Class
28
Syllabus • Devices (both passive and active):
• Models, simulation, layout, and matching • Electronic noise • Basic support functions:
• Current sources, references, biasing • Basic analog “gate”: amplifier
• Opamps, OTAs, feedback, settling time, common-mode feedback
• Application driver • Motivates additional building blocks • As well as why you care about certain specs
• Data converters, comparators, offset cancellation, filters, sample & hold, oscillators, PLLs
29
Course Focus • Focus is on analog design
• Typically: Specs circuit topology layout
• Spec-driven approach
• Where specs come from
• Key point: • Especially in analog, some things are much
“easier” to do than others • Sometimes (often) the right thing to do is
change the specs 30
Course Goal • Learn how to create systematic approaches
to analog design • Based on fundamental principles • For a wide variety of applications
• Will show specific design methodology example • OTA designs embedded in ADCs
• And then move on to a more complex system
6
31
EECS 240 versus 247 • EECS 240
• Transistor level building blocks • Device and circuit fundamentals • A lot of the class at a low level of abstraction
• SPICE
• EECS 247 • Macro-models, behavioral simulation, large
systems • Signal processing fundamentals • High level of abstraction • Matlab
32
240 versus 242/142 • 142/242 mostly concerned with narrowband
circuits operating at a “high” carrier frequency • Signals mostly look like sinusoids • Inductors ubiquitous • Use of feedback is rare
• 240 focuses on more “wideband”, general-purpose analog and mixed-signal • Signals are “arbitrary” • Spend a lot of time worrying about capacitance • Feedback common
33
240 versus 231 • 231 concentrates on device physics
• 240: device physics abstracted to the extent possible • Device models from a “circuit designer’s perspective” • Treat transistor as black box described by complex
equations • Equations relevant for biasing, nonlinear effects
(output swing), and some charge storage effects • Mostly outside design loop • “small signal analysis”