Survey and Trends in Nonlinear T it Mdli Mthdl iTransistor...

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Survey and Trends in Nonlinear T it M d li Mthdl i Transistor Modeling Methodologies Dr. David E. Root Principal R&D Scientist High Frequency Technology Center Santa Rosa, CA USA IEEE MTT-S Lecture #3 Bergen, Norway May 7 2010 May 7, 2010 © Copyright Agilent Technologies 2010 Page 1 Page 1 D. E. Root D. E. Root Norway #3 Transistor Modeling May 7, 2010

Transcript of Survey and Trends in Nonlinear T it Mdli Mthdl iTransistor...

Survey and Trends in Nonlinear T i t M d li M th d l iTransistor Modeling Methodologies

Dr. David E. RootPrincipal R&D Scientistp

High Frequency Technology CenterSanta Rosa, CA USA

IEEE MTT-S Lecture #3Bergen, Norway

May 7 2010May 7, 2010

© Copyright Agilent Technologies 2010

Page 1Page 1 D. E. RootD. E. RootNorway #3 Transistor Modeling

May 7, 2010

Key Contributors

• Alex Cognata

• Daniel Gunyan

• Jason Horn• Jason Horn

• Masaya Iwamoto

• Alexander Pekker

• Dominique Schreurs

• Jonathan Scott

• Gary Simpson

• Franz Sischka

• Paul TaskerPaul Tasker

• John Wood

• Jianjun Xu

© Copyright Agilent Technologies 2010

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Presentation Outline

• Introduction• I-V modeling• Nonlinear Charge Modeling• Non Quasi-Static Effects & Dispersion Modeling• Electro-Thermal Modeling• Advanced Measurements

NVNA d t d d d d i l FET d li• NVNA data and advanced dynamical FET modeling• Symmetry Considerations • Summary & Conclusions• Summary & Conclusions

© Copyright Agilent Technologies 2010

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Norway #3 Transistor Modeling

Introduction

All models are wrong, but some are useful.“

t ti ti i G B- statistician George Box

“All models are approximations. Some models are useful ”Some models are useful.

- attributed to Mike Golio and others

© Copyright Agilent Technologies 2010

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Compact Transistor Models (AgilentHBT model) [48, 49, 10][48, 49, 10]

Thermal Subcircuit (Two-Poles)( )

Complete Circuit Model(Intrinsic Model in Red)

Coupled nonlinear ordinary differential equations in the time

IqI

Icr

cf −⎟⎟⎠

⎞⎜⎜⎝

⎛3 ⎟

⎠⎞

⎜⎝⎛ −

−=VKDC

VJCVIKDCIcrit BCi131

equations in the time domain

Equivalent Circuit with d

ICE⎠⎝=

( ) ( )IKDCIKDCIcritIcf

IKDCIKDCIKDCIcritIcf

IKDC 211

21

211

21 22

⎥⎦

⎤⎢⎣

⎡⎟⎠⎞

⎜⎝⎛−⎟

⎠⎞

⎜⎝⎛ −+⎟

⎠⎞

⎜⎝⎛+⎟

⎠⎞

⎜⎝⎛ −

⎠⎝ VKDCnonlinear elements

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oqIKDCIKDCIKDCIKDC

q 312

22223 −+⎦⎣ ⎠⎝⎠⎝⎠⎝⎠⎝=

Agilent HBT Model Parameters (over 100)

AgilentHBT_ModelHBTM1HBTM1

Xth2=0.0Cth2=0.0Rth2=0.0Xth1=0.0Cth1=5.0e-10Rth1=1000.0

Eaa=0.0 VXtik3=0.0Xtirh=4.0Xtic=3.0Xtir=3.0Egc=1.5 V

Tvje=0.0Xre=0.0Xrc=0.0Xrb=0.0Lpe=0.0 HLpc=0.0 H

Vkrk2Inv=0.2Vkrk=3.0 VIkrktr=1.0e-06 AIkrk=0.025 ATkrk=1.0e-12 secFextc=0.8

Itc=0.006 ATcmin=5.0e-13 secTfc0=2.0e-12 secFextb=0.2Tfb=1.0e-12 secAbcx=0.75

Cemax=1.0e-13 FMje=0.3Vje=1.3 VCje=4.0e-14 FIk=1.0 AGkdc=0.0

Var=1000.0 VVaf=500.0 VAbel=0.0Nc=2.0Isc=1.0e-13 ANrh=2.0

Rbx=5.0 OhmRbi=15.0 OhmRcx=5.0 OhmRci=1.0 OhmRe=2.0 OhmTnom=25.0

Fb=1.0 HzAb=1.0Kb=0.0Ffe=1.0Af=1.0Kf=0.0Xth2 0.0

Xitc2=0.0Xitc=0.0Xtfc0=0.0Xtcmin=0.0Xtfb=0.0Eab=0.0 VEaa 0.0 V

Ege=1.55 VTnr=0.0Tnf=0.0Tvpc=0.0Tvjc=0.0Tvpe=0.0Tvje 0.0

Cpce=1.0e-15 FTr=1.0e-09 secFexke=0.2Vkmx=1.0 VVktr=1.0 VGkrk=4.0Vkrk2Inv 0.2

Vtrmin=1.0 VVtcminInv=0.5Vmx0=2.0 VVtr0=2.0 VVtc0Inv=0.3Itc2=0.008 AItc 0.006 A

Mjc=0.3Vjc=1.1 VCjc=5.0e-14 FAbex=0.0Mjer=0.05Vpte=1.0 VCemax 1.0e 13 F

Ikdc2Inv=0.0Ikdc1=1.0 ANb=1.0Isb=1.0e+10 ANa=1.0Isa=1.0e+10 AVar 1000.0 V

Nh=1.0Ish=1.0e-27 ANr=2.0Isr=1.0e-15 ANf=1.0Is=1.0e-25 ARbx 5.0 Ohm

AllParams=Imax=10.0 A

Xvkrk=0.0Xikrk=0.0Xtkrk=0.0

Xtie=3.0Xtih=4.0Xtis=3.0

g

Lpb=0.0 HCpbc=1.0e-15 FCpbe=1.0e-15 F

p

Vtc2Inv=0.1VtcInv=0.1Vmxmin=1.0 V

Mjcr=0.03Vptc=3.0 VCcmax=9.0e-14 F

j

Nkdc=3.0VkdcInv=0.1Ikdc3=1.0 A

Isrh=1.0e-15 ANe=2.0Ise=1.0e-18 A

Resistances: 5 Parasitics: 6Resistances: 5DC Currents: 26Depletion Charge: 14Delay Charge: 25

Parasitics: 6Temp., DC & R’s: 22Temp., Charges: 12Noise: 6

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Delay Charge: 25 Noise: 6

Transistor Modeling

• Compact Models: Equivalent circuit models for IC design formulated in the time-domain. Examples are BSIM models for MOSFET Angelov model for GaAs FETs Gummel PoonMOSFET, Angelov model for GaAs FETs, Gummel-Poonmodels for bipolars, AgilentHBT model for III-V HBTs

• “Compact” models can be complex (> 100 parameter values)• Compact models can be complex (> 100 parameter values)

• Parameters typically extracted from DC and S-pars Ironic for a nonlinear modelIronic for a nonlinear model– Some devices may not be able to be characterized under DC and static

operating conditions (power, temperature)– Advanced models may not be identifiable from only DC and

S-parameter data.– No direct evidence that these nonlinear models will reproduce large-

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p gsignal behavior

Norway #3 Transistor Modeling

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Device Requirements and Modeling Implications• Linearity: Harmonic & Intermod. Distortion; ACPR; AM-AM; AM-PM• Efficiency: PAE; Fundamental Output Power; Self-biasing

M Sl th l ff t l t i h• Memory: Slow thermal effects, slow trapping phenomena• Modeling Challenges from • Device physics (III V transport trapping dynamics)• Device physics (III-V transport, trapping dynamics)

Complex signals, multiple time-scale dynamicsAmplifier, switch, and mixer applicationsWide variety of device designs in many material systemsy g y y

• Accuracy required over • Bias, frequency, and temperature; power; • Different types of models may be required at different stages in the

development of a technology

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Physical Models to Circuit (compact) Models [16,17]

Q(VGS) Q(VGD)

( ( ))( ) ( ( ) ( ))DC GDdQ V tI t I V t V t ( ( ))( ) ( ( ), ( ))DC GDD D GS DS

QI t I V t V tdt

= −( ( )) ( ( ))( ) GS GD

GdQ V t dQ V tI t

dt dt= +

dt dt

( )( )3 32 2

2

2 2( , ) ( )3

DC DD GS DS DS DS GS GS

D

W qN aI V V V V V VL qN a

μ ε φ φε

⎛ ⎞⎡ ⎤= − + − − −⎜ ⎟⎢ ⎥⎜ ⎟⎣ ⎦⎝ ⎠

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( ) 2 ( ) (up to a constant)DQ V WL q N Vε φ= − −

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Norway #3 Transistor Modeling

Typical characteristics of real devices not ideal120 90

80

100

120

A)

50

60

70

80 Vgs=1.4V

(0.2V steps)

I d(m

A)

20

40

60

Ids

(mA

20

30

40

50

Vgs=-1.2V

2 4 6 80 10

20

0

Vds (Volts)

1 2 3 4 5 6 7 8 9 10 110 12

10

0

Vgs=-1.6VVgs=-2.0V

Vds (V)Vds (Volts)

pHEMTMESFET 3 temperatures

Typical Features of real device often not captured by

ds ( )

simple physics-based models

Non-zero, and sometimes negative, output conductanceDrain-voltage dependent “pinch-off voltage”

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Drain voltage dependent pinch off voltageHigher drain current at lower ambient temperature (near Vp)

May 7, 2010

Norway #3 Transistor Modeling

Measurement-Based (Empirical) Modeling “The Device Knows Best”The Device Knows BestElectrons know where to go, even if the modelers don’t!

Use device data as much as possible in the modelUse device data as much as possible in the modelUseful for circuit design when good measurements are available, and when no good (fast, robust, extractable) physical models are available•Empirical models (fitting closed-form functions to data) •Table-based models with spline interpolation•Neural-network based modelsExperiment Design:

measure the device I-V (and Q-V) Model Identification

fit the empirical expressions to data (parameter extraction)fit the empirical expressions to data (parameter extraction)or store data and interpolate

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Norway #3 Transistor Modeling

Empirical Models

The same dynamics (equivalent circuit topology) G( ( ))dQ V t ( )GS GSQ V ( )GD GDQ V( ( ))( ) ( ( ), ( ))DC GD GD

D D GS DSdQ V tI t I V t V t

dt= −

( ( )) ( ( ))( ) GS GS GD GDG

dQ V t dQ V tI t = +DS

( , )dcD GS DSI V V

Large Signal Equivalent Circuit

( )G dt dt

Large-Signal Equivalent Circuit

Modified Constitutive Relations for easy fitting (Curtice Cubic[7])

( )2 30 1 1 2 1 3 1( , ) ( )DC

D GS DS DSI V V A AV A V A V tanh Vγ= + + +

0( )GD GDQ V C V=1

0( ) 11

jGS

C VQ Vηφ

η φ

+⎛ ⎞

= − −⎜ ⎟+ ⎝ ⎠

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η φ⎝ ⎠

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Norway #3 Transistor Modeling

Experiment Design: Measure DC I-V curves

IDDC Vgs Vds,( ) A0 A1V1 A2V1

2 A3V13+ + +

⎝ ⎠⎛ ⎞ γVds( )tanh⋅=

Model Identification (1): minimize error

Guess Initial Coefficient Values in Fixed Constitutive Relations

D g( ) 0 1 1 2 1 3 1⎝ ⎠ γ ds( )

Simulate Circuit

Compare Simulation with MeasurementsCompare Simulation with Measurements

Good Fit?ModifyCoefficientGood Fit?

No

Yes

Done

CoefficientValues

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Done

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Norway #3 Transistor Modeling

Issues with parameter extraction

Optimization-based parameter extraction can be:

• Slow (simulate circuit and update parameters hundreds of times)• Sensitive to initial parameter values• Non-repeatablep• Can get stuck in local minima of optimizer cost function•Require user interaction• Good parameter values depend on good datap p g

•May never achieve good fit (constitutive relations may not be flexible enough)( y g )Changes to constitutive relations -> changes to extraction routines

© Copyright Agilent Technologies 2010

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Norway #3 Transistor Modeling

Parameter Extraction: What can go wrong

(Curtice Cubic example also see [30])

( )2 3( ) ( )DCI V V A AV A V A V tanh Vγ= + + +( )1 2 0 1 1 2 1 3 1 2( , ) ( )DI V V A AV A V A V tanh Vγ= + + +

I XX

VVp Vmax

X

XX

XX

V1Vp Vmax

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Norway #3 Transistor Modeling

Table-Based Models: Accurate and General [3,17,21]

Vertical Power Si MOSFET GaAs pHEMT

Measure, transform data, tabulate, interpolate, scale

[A][A]

0.3

ID

0.15

ID[A][A]

0.00 0 10 0VDS 0 0 5 0VDS

0.0

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Process and Technology Independent0.0 10.0VDS 0.0 5.0VDS

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Norway #3 Transistor Modeling

Table Models

C tit ti R l ti i t l t d f d tConstitutive Relations are interpolated from dataTable 1 Table 2

d gs ds d_dcI t Interpolate{Table1, [V t ,V t ,I ]}=( ) ( ) ( )

gs ds dInterpolate{Table2, [V t ,V t ,Q ]}ddt

+ ( ) ( )

Works well for dc S versus bias & freq med-high power signals

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Works well for dc, S versus bias & freq., med-high power signals

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Norway #3 Transistor Modeling

Warning: Interpolation algorithms may limit table models! [43]models! [43]

Original HPFET Model with ADS splines vs Measured25

Two-tone Intermodulation

-25

0

-75

-50

ower

(dB

m)

Fund

R h d

-125

-100

Out

put P

o

IM3

IM5

IM7

Fund

Spline-based Root Model

Rough and unphysical behavior

200

-175

-150Fund

IM3

IM5

IM7Measured

© Copyright Agilent Technologies 2010

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-200-50 -40 -30 -20 -10 0 10

Input Power (dBm)

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Norway #3 Transistor Modeling

Vgs 2 @ 100MH ( 1MH )

Naïve Splines Limit Distortion Accuracy [17, 8]

IP3(dBM)

0.2V

P=-10dBmVgs

-0.6 Si NJFET2-tones @ 100MHz (+1MHz)

Table Model

Vd

(a) Vg=-1V Power=-10dBmVds

-1.4

-1.0

IP3(dBM)

P=-20dBm

Voltage Swing

Vgs

-0.6

VdDataHPFET table modelCurtice analytic model

-1.4

-1.0

Voltage Swing

Vds0.06V(b) Vg=-1V Power=-20dBm

VdSimple Cubic Splines

•Third order derivative vanishes at symmetry points•Low order polynomial can’t predict high-order distortion at low amplitudes

© Copyright Agilent Technologies 2010

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p y p g pinterpolation model is better when signal size ~ data spacing

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Norway #3 Transistor Modeling

OutputsSpline Alternatives: Artificial Neural Networks

( )y F x x x=y1 y2

Outputs

yyjj = = Σ Σ VVjkjk Zkk

1 1 3( , , )i iy F x x x=

VjkHidden Neuron Output

k

Z1 Z2 Z3 Z4

Wki

Σ Σ WWki ki xiZk = tanh( = tanh( )

Wki

Parameters w = [WWkiki, V, Vjkjk]x1 x2 x3 Inputs

• Universal Approx. Thm: Can fit any nonlinear function of many variables• Infinitely differentiable: better for distortion than naïve splines

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y p• Easy to train (identify) using standard third-party tools (MATLAB)

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Norway #3 Transistor Modeling

NeuroFET: FET Model using ANNs [43]Constitutive Relations are ANNs!

80

90Vgs=1.4V ANN-based FET model (___ ) dcI

Constitutive Relations are ANNs!

50

60

70

(0.2V steps)

Measured device test data ( o ) dIANN

30

40

50

I d(m

A)

V =-1 2V

10

20

0

Vgs=-1.6VVgs=-2.0V

Vgs=-1.2V

Vgs Vds

1 2 3 4 5 6 7 8 9 10 110 12

Vds (V)

© Copyright Agilent Technologies 2010

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NeuroFET Distortion Validation (2-tone) [43]ANN-Based FET vs Measured

-25

0

25

-75

-50

-25

wer

(dB

m)

Fund

-125

-100

Out

put P

ow

Fund

IM3

IM5

IM7

Physically

correct behavior-175

-150Fund

IM3

IM5

IM7-200

-50 -40 -30 -20 -10 0 10Input Power (dBm)

IM7

Alternatives to ANNs are “Smoothing Splines” [5]

© Copyright Agilent Technologies 2010

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gbut they don’t have all the advantages

May 7, 2010

Norway #3 Transistor Modeling

Global Domains for Measurement-based Models

ANNs inside, Intelligent Extrapolation outside [44]Enables nonlinear simulation from discrete, bounded, measured data

Two orders of continuity at boundary Asymptotically ~ exponential

+ simpler algorithmx robust algorithm

© Copyright Agilent Technologies 2010

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Required for robust convergenceMay 7, 2010

Norway #3 Transistor Modeling

Guided Extrapolation Algorithm Compiled into Model

Improves DC convergence, HB, TA range of use [45]

Training Domain Training Domain

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Norway #3 Transistor Modeling

Presentation Outline

• Introduction• I-V modeling• Nonlinear Charge Modeling and Related Issues• Non Quasi-Static Effects & Dispersion Modeling• Electro-Thermal Modeling• Advanced Measurements for

Experiment Design & Model IdentificationExperiment Design & Model Identification• Symmetry Considerations • Summary & ConclusionsSummary & Conclusions

Artificial Neural Network applications given throughout© Copyright Agilent Technologies 2010

Page 25Page 25 D. E. RootD. E. Root

Artificial Neural Network applications given throughout

May 7, 2010

Norway #3 Transistor Modeling

Charge Modeling: Key to Distortion at high frequencies [4]

M d l A Sh kl M d l B St t ] M d l C HP/A il tFET ]

Gain/Phase vs. Pin IM3 vs. Pin

•All three models use the same DC analytical equations

Model A= Shockley Model B = Statz[32] Model C =HP/AgilentFET [33]

[4] J. Staudinger, M.C. De Baca, R. Vaitkus, “An examination of several large signal capacitance

© Copyright Agilent Technologies 2010

Page 26Page 26 D. E. RootD. E. Root

g , , , g gmodels to predict GaAs HEMT linear power amplifier performance,” Radio and Wireless Conference, Aug. 1998 pp343-346.

May 7, 2010

Norway #3 Transistor Modeling

Good Charge Model Required to Predict ACPR [4][ ]

M d l A Sh klModel A= Shockleyjunction capacitances

Model B = Statz/Raytheon gate terminal chargegate terminal charge conserving but not terminal charge conserving at drain

Model C =HPFETModel C =HPFET (Root model) terminal charge conserving model at both gate and drain by direct integration of measured admittances and spline interpolation

© Copyright Agilent Technologies 2010

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Norway #3 Transistor Modeling

Adjoint Neural Network Training for Qg

ωYIm

bias11 )(ω

YImbias12 )(Train Adjoint network on partial

derivative data derived from ω ω

Q E

derivative data derived from S (Y) parameters

Qg

gQf

)( w,V,Vf Q dsgsgQ

ANNg =bias

gs

QANNV

f g

∂∂

biasds

QANNV

f g

∂∂

Adjust wgQE

gdQ( )

gANN

f

ww

gQI (t)= g dt

V VV V

1Adjoint Neural

NetworkJianjun Xu, M.C.E. Yagoub, Runtao Dingand Q.J. Zhang,“Exact adjoint sensitivity analysis for neuralbased microwave modeling and design,”IEEE Transactions on Microwave Theory and

© Copyright Agilent Technologies 2010

Page 28Page 28 D. E. RootD. E. Root

Vgs VdsVgs VdsIEEE Transactions on Microwave Theory andTechniques, vol. 51, pp.226-237, 2003.

May 7, 2010

Norway #3 Transistor Modeling

Adjoint Neural Network Approach to Charge ModelingCharge Q obtained by Adjoint Training Methods [27 43]

Im(Y11)/ω and ∂Qg/∂Vgsx 10-12(F)Q ( C)

Charge Qg obtained by Adjoint Training Methods [27,43](Generate an ANN function given partial derivative data)

0 15

0.2

0.25

Vgs

Qg (pC)

0

0.1

0.2

0 2 4 6 8 10 12

0.1

0.15

x 10-12(F)-0.3

-0.2

-0.1

0.1

0.15 -Im(Y12)/ω and -∂Qg/∂Vdsx 10(F)

-0 7

-0.6

-0.5

-0.4

NeuroFET model ( __ ) Measured device data ( o )

0 2 4 6 8 10 120

0.05 Vgs -2 0 2 4 6 8 10 12-0.8

-0.7

Vds (V)

Measured device data ( o )

Another experimental validation of terminal

© Copyright Agilent Technologies 2010

Page 29Page 29 D. E. RootD. E. Root

0 2 4 6 8 10 12

Vds (V) charge conservation at the gate for GaAs pHEMT

May 7, 2010

Norway #3 Transistor Modeling

Advantages of Adjoint ANN over contour Integration

• More uniform approximation of terminal charges than implementations of contour integration

• Applies to scattered data. No gridding necessary.

• Results in infinitely differentiable charge function rather than finite-order spline representation

• More easily deals with complicated boundary of data domain

• More easily generalizes to higher number of terminals

© Copyright Agilent Technologies 2010

Page 30Page 30 D. E. RootD. E. RootMay 7, 2010

Norway #3 Transistor Modeling

Presentation Outline

• Introduction• I-V modeling• Nonlinear Charge Modeling and Related Issues• Non Quasi-Static Effects & Dispersion Modeling• Electro-Thermal Modeling• Advanced Measurements for

Experiment Design & Model IdentificationExperiment Design & Model Identification• Symmetry Considerations • Summary & ConclusionsSummary & Conclusions

Artificial Neural Network applications given throughout© Copyright Agilent Technologies 2010

Page 31Page 31 D. E. RootD. E. Root

Artificial Neural Network applications given throughout

May 7, 2010

Norway #3 Transistor Modeling

Dynamic electro-thermal (self-heating) model

( ) ( ( ) ( ), ( ), )d d dI t I V t V T tt=( ) ( ( ) ( ), ( ), )d d ds gsI t I V t V T tt( ) ( ( ) ( ), ( ), )g g ds gsQ t Q V t V T tt=

( )( ) ( ) ( ) ( )dT T R I t V t I t V tτ + Δ +

Temperature evolution equation based on dissipated power

( )( ) ( ) ( ) ( )TH D DS G GST R I t V t I t V tdt

τ + Δ = +

This example is a simplified to 1st order ODEp pHeat propagates via diffusion Eqn. (PDE)

. Alternatively estimate T(t) as linear filter in frequency domain [34]

© Copyright Agilent Technologies 2010

Page 32Page 32 D. E. RootD. E. Root

Trade off “fractional pole” response for nonlinearity

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Norway #3 Transistor Modeling

Dynamic electro-thermal (self-heating) model

Currents, Voltages, and Temperature calculated by the simulator self-consistently using coupled electrical and thermal equivalent circuits

G D

T T deltaT= +Thermal Equivalent CircuitS S

ambT T deltaT= +

( ( ), ( ), ( ))G GS DSQ V t V t T t( ( ), ( ), ( ))D GS DSI V t V t T t( ( ), ( ), ( ))D GS DSQ V t V t T t

( ( ), ( ), ( ))G GS DSI V t V t T tCan approximate distributednature of heat propagation

T=device junction temperatureT =device ambient (backside) temperature

Electrical Equivalent Circuit

atu e o eat p opagat oby many sections

External node allows coupling

© Copyright Agilent Technologies 2010

Page 33Page 33 D. E. RootD. E. Root

Tamb=device ambient (backside) temperature to other heat sources

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Norway #3 Transistor Modeling

ANN T-dependent constitutive relations

0 07

Ids

Blue: T =25 constant ambient temp

Given measured non-isothermal ambient temp. (T0 – dependence), one constructs isothermal (T – dependent) constitutive relations

0.06

0.07 Blue: T0=25 constant ambient tempRed: T=70 constant junction tempNeuroFET

T-dependent

0.04

0.05

Ids

dc I-V curves

0.02

0.03

0

0.01

© Copyright Agilent Technologies 2010

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0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5Vds

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Norway #3 Transistor Modeling

NeuroFET dynamic self-heating resultsFixed Vg

-2

0

2Ig

4

5

6Vd

-10

-8

-6

-4

-2

Ig.i,

uA

0

1

2

3

Vd,

V

1 2 3 40 5

-12

time, usec

1 2 3 40 5

-1

time, usec

Id 140

30

40

50

60

i, m

A

Id

80

100

120

140

T, V

1 2 3 40 5

0

10

20

-10

Id.i

1 2 3 40 5

40

60

20

T

© Copyright Agilent Technologies 2010

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time, usec1 2 3 40 5

time, usec

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Norway #3 Transistor Modeling

NeuroFET static self-heatingIds

0 06

0.07

O : Data __ : Model

pHEMT

0.05

0.06 T0: -65T0: -25T0: -5T0: 25

0 03

0.04

Ids

T0: 25T0: 55T0: 85T0: 115

0.02

0.03

0

0.01

© Copyright Agilent Technologies 2010

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0 1 2 3 4 5

0

Vds

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Norway #3 Transistor Modeling

Presentation Outline

• Introduction• I-V modeling• Nonlinear Charge Modeling and Related Issues• Non Quasi-Static Effects & Dispersion Modeling• Electro-Thermal Modeling• Advanced Measurements for

Experiment Design & Model IdentificationExperiment Design & Model Identification• Symmetry Considerations • Summary & ConclusionsSummary & Conclusions

Artificial Neural Network applications given throughout© Copyright Agilent Technologies 2010

Page 37Page 37 D. E. RootD. E. Root

Artificial Neural Network applications given throughout

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Norway #3 Transistor Modeling

Need for Advanced Characterization for empirical Modeling [21]Modeling [21]

True for neural network model too if built from dc + S-paramdatadata

© Copyright Agilent Technologies 2010

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Norway #3 Transistor Modeling

GaN Devices

1 mm 10 fingers

GaN on SiGaN on Si

fT ~ 30GHz

Pulse width 2usPulse width 2us

Slide courtesy J. Scott

Pulsed measurements provide much more datathan can be measured under static (DC) conditions

© Copyright Agilent Technologies 2010

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than can be measured under static (DC) conditions

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Norway #3 Transistor Modeling

Pulsed I-V characteristics at different quiescent points vs DC [1 21]points vs DC [1,21]

pHEMT device

© Copyright Agilent Technologies 2010

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Norway #3 Transistor Modeling

Nonlinear Vector Network Analyzer (NVNA) Measurements for Transistor Modeling:Measurements for Transistor Modeling:

• These measurements will compliment and eventually totally replace small-signal measurements for large-signal device model experiment design and model identification [36-38].Such systems are also useful for model validation.Such systems are also useful for model validation.• Stimulates device with more realistic signals• Reduce degradation of device characteristics from static

measurements• Less reliance on inferring large-signal dynamic behavior from

linear small- signal measurementsg• Some device properties may very different (breakdown, Ig, …)• Use to identify parametric (empirical) models or even train (generate)

data based models directly

© Copyright Agilent Technologies 2010

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data-based models directly

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Norway #3 Transistor Modeling

(1a) NVNA data for compact model validation

measuredsimulated

measuredsimulated

BSIM3 2 modelBSIM3.2 model

•Parameters extracted from DC and S-parameters (or CV)•BSIM3 model simulated in Harmonic balance (HB) analysis

© Copyright Agilent Technologies 2010

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Slide courtesy of Franz Sischka, data from [51]•Results compared with NVNA data

(1b) Model parameter extraction from NVNA Data [51]

NVNA data vs HB simulationusing initial parameter values extracted from DC + CV

Modify parameter values (optimize) to better fit large-signal NVNA data

• Get optimal parameter• Get optimal parameterset for given model

• trade-off DC, SP, fornonlinear performance

• App-dependent tuning

© Copyright Agilent Technologies 2010

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• App-dependent tuning• Explore model limits

Parameter extraction from NVNA data

© Copyright Agilent Technologies 2010

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Slide courtesy Franz Sischka

Examples of measured dynamic load-lines using NVNA for advanced FET model constructionNVNA for advanced FET model construction

Root et al INMMiC2010 [52]Xu et al IMS2010 [53]

• Entire operating range coveredp g g• Can measure into limiting operating regions• Get data under realistic operating conditions

© Copyright Agilent Technologies 2010

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Model I-V characteristics at different trap-statesI V t V t T ϕ ϕ( ( ) ( ) )

Ids (mA)

D gs ds j 1 2I V t , V t , T , , ϕ ϕ( ( ) ( ) )

Ids (mA) Ids (mA)

Xu et al IMS2010 [53]

120

140

160

180

120

140

160

180Ids (mA)

Ids

40

60

80

100

120

40

60

80

100

120(mA)

Vds (V) Vds (V)0 1 2 3 4 5 6

0

20

40

0 1 2 3 4 5 60

20

40

Vds (V)

Corresponds to drain-lag (knee walk-out) (intrinsic)Trap state

Static “Iso-thermal” intrinsic I-V

Measured and simulated extrinsic DC - IV

1 2 2 8ϕ ϕ= − = 1 2 65jVgs Vds Tϕ ϕ= = =

© Copyright Agilent Technologies 2010

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Bias-dependent small-signal admittances fit better everywhere

Nonlinear validation of advanced GaAs FET model(using NVNA data) X t l IMS2010 [53](using NVNA data) Xu et al IMS2010 [53]

Simulated (___ ) Measured data (symbols)

With NVNA, Nonlinear validation comes for free

© Copyright Agilent Technologies 2010

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Tradeoffs

Physical I i htInsight

Physics based

Physical TCADDevice Model

Abilit t

TableM d l

Physics-basedCircuit Model

Ability toGeneralize

ModelX-parameterBehavioral

Ease of Use / extraction

Accuracy

© Copyright Agilent Technologies 2010

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Conclusions

• Physical, Empirical, Table-based, and Behavioral models (e.g. X-parameters) of transistors all have their place in device p ) pmodeling

• Advanced characterization techniques and instruments (e.g. NVNA) will change the paradigm for nonlinear device modeling and validation. This is a key industry trend.

M d li i i d l G d lt• Modeling is a rigorous and complex process. Good results take time, expertise, good measurements, and care.

© Copyright Agilent Technologies 2010

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References

[1] A.E.Paker and D.E.Root “Pulse Measurements Quantify Dispersion in PHEMTs,” 1998 IRSI Symposium on Signals, Systems, and Electronics, Pisa, Italy, Sept. 29 - Oct. 2, 1998, URSI and IEEE, pp. 444-449.[2] Pirola,M., Root,D.E., Ghione,G., “Large-signal performance of measurement-based diode models for nonlinear circuit simula­tion: a comparison, 1995 European Microwave Conf. Technical Digest, Italy,[3] Root, D.E., Fan, S., Meyer, J. “Technology Independent Non Quasi-Static FET Models by Direct Construction from Automati­cally Characterized Device Data” 21st European Microwave Conf.Proceedings, Stuttgart,

Germany, Sept 1991, pp 927-932.[4] J. Staudinger, M.C. De Baca, R. Vaitkus, “An examination of several large signal capacitance models to predict GaAs HEMT linear power amplifier performance,” Radio and Wireless Conference, Aug. 1998 pp343-

346346.[5] V. Cuoco, M.P. van den Heijden, L.C.N de Vreede, “The ‘Smoothie’ data base model for the correct modeling of non-linear distortion in FET devices,” International Microwave Symposium Digest, 2002, Vol. 3, pp2149

– 2152[6] HP NMDG Group[7] Aarts, A.C.T.; van der Hout, R.; Paasschens, J.C.J.; Scholten, A.J.; Willemsen, M.; Klaassen, D.B.M.; “Capacitance modeling of laterally non-uniform MOS devices,” 2004 IEEE IEDM Technical Digest, 13-15 Dec. 2004

Page(s):751 - 754 [8] D.J.McGinty and D.E.Root, and J.Perdomo, “A Production FET Modeling and Library Generation System,” in IEEE GaAs MANTECH Conference Technical Digest, San Francisco, CA, July, 1997 pp. 145-148[9] Root, D.E. and Fan, S., “Experimental Evaluation of Large-Signal Modeling Assumptions Based On Vector Analysis of Bias-Dependent S-Parameter Data from MESFETs and HEMTs”, 1992 IEEE MTT-S International [9] Root, D.E. and Fan, S., Experimental Evaluation of Large Signal Modeling Assumptions Based On Vector Analysis of Bias Dependent S Parameter Data from MESFETs and HEMTs , 1992 IEEE MTT S International

Microwave Symposium Technical Digest, pp.255-259 [10] Agilent ADS manual[11] Parker & Rathmell IEEE Intl. Microwave Symp. Dig. 2004[12] Curtice, W.R.; Ettenberg, M.; “A Nonlinear GaAs FET Model for Use in the Design of Output Circuits for Power Amplifiers” IEEE Transactions on Microwave Theory and Techniques, Volume 33, Issue 12, Dec 1985

Page(s):1383 - 1394[13] Agilent ADS manual [14] S. Maas, “Ill conditioning in self-heating FET models,” IEEE Microwave & Wireless Comp. Let. 12, 3 Mar. 02 pp 88-89[15] A. Parker, Comments on" ill conditioning in self-heating FET models"., IEEE Microwave and Wireless Components Letters 12:99, 351-352, 2002[16] D.E.Root, “Nonlinear Charge Modeling for FET Large-signal Simulation and its Importance for IP3 and ACPR in Communica­tion Circuits,” Proc. of the 44th IEEE Midwest Symposium on Circuits and Systems, Dayton

OH, August, 2001, pp 768 - 772 (contact author for corrected version)[17] D.E. Root “Overview of Microwave FET Modeling for MMIC Design, Charge Modeling and Conservation Laws, and Advanced Topics,” 1999 Asia Pacific Microwave Conference Workshop Short Course on Modeling

and Characterization of Microwave Devices and Packages, Singapore, November, 1999[18] AE Parker and JG Rathmell, “Bias and Frequency Dependence of FET Characteristics, IEEE Transactions on Microwave Theory and Techniques vol. 51, no. 2, pp. 588--592, Feb. 2003. [19] Ouarch, Z.; Collantes, J.M.; Teyssier, J.P.; Quere, R.;

Measurement based nonlinear electro thermal modeling of GaAs FET with dynamical trapping effects 1998 IEEE MTT S International Microwave Symposium Digest Volume 2 7 12 June 1998 pp :599 602Measurement- based nonlinear electro-thermal modeling of GaAs FET with dynamical trapping effects, 1998 IEEE MTT-S International Microwave Symposium Digest Volume 2, 7-12 June 1998 pp :599 - 602[20] Webster, D.; Darvishzadeh, M.; Haigh, D.;“Total charge capacitor model for short-channel MESFETs,” IEEE Microwave and Guided Wave Letters, Volume 6, Issue 10, Oct. 1996 Page(s):351 - 353 [21] D.E.Root, 2001International Symposium on Circuits and Systems Tutorial/Short-Course and Special Session on High-Speed Devices and Modeling, Sydney, Australia, May, 2001, pp 2.3_1 - 2.3_7 and 2.7_1 - 2.7_8 [22] Schreurs, D.; Verspecht, J.; Vandenberghe, S.; Carchon, G.; van der Zanden, K.; Nauwelaers, B.; Easy and accurate empirical transistor model parameter estimation from vectorial large-signal measurements,” IEEE Intl

Microwave Symp. Digest, Volume 2, 13-19 June 1999 Page(s):753 - 756 vol.2 [23] Schreurs et al “Direct Extraction Of The Non-linear Model For Two-port Devices From Vectorial Non-linear Network Analyzer Measurements,” 27th European Microwave Conf. Sept ’97 921-926

[24] Curras Francos M C ; Tasker P J ; Fernandez Barciela M ; Campos Roca Y ; Sanchez E ; “Direct extraction of nonlinear FET Q V functions from time domain large signal

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[24] Curras-Francos, M.C.; Tasker, P.J.; Fernandez-Barciela, M.; Campos-Roca, Y.; Sanchez, E.; “Direct extraction of nonlinear FET Q-V functions from time domain large signal measurements,” IEEE Microwave and Guided Wave Letters Volume 10, Issue 12, Dec. 2000 Page(s):531 - 533

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References (2)[25] S. Haykin, Neural Networks: A Comprehensive Foundation (2nd Ed. ) Prentice Hall; 1998[26] Q.J.Zhang &.K.C.Gupta, Neural Networks for RF and Microwave Design, Artech House, 2000[27] Xu et al “Exact adjoint sensitivity analysis for neural-based microwave modeling and design,” IEEE Transactions on Microwave Theory and Techniques Volume 51, Issue 1, Part 1, Jan.

2003 Page(s):226 – 237[28] J. Verspecht & D. Schreurs, “Measuring transistor dynamic loadlines and breakdown currents under large-signal high-frequency operating conditions,” in IEEE Microwave Symposium

Digest, 1998 Vol 3, 7-12 June 1998 pages 1495-1498 vol. 3[29] Aarts, A.C.T.; van der Hout, R.; Paasschens, J.C.J.; Scholten, A.J.; Willemsen, M.B.; Klaassen, D.B.M.; “New fundamental insights into capacitance modeling of laterally nonuniform MOS

devices,”IEEE Transactions on Electron Devices, Volume 53, Issue 2, Feb. 2006 Page(s):270 - 278

[30] S. Maas, “Fixing the Curtice FET Model” Microwave Journal, March 2001[31] Parker, A.E.; Skellern, D.J.; “A realistic large-signal MESFET model for SPICE,” IEEE Transactions on Microwave Theory and Techniques Volume 45, Issue 9, Sept. 1997 Page(s):1563 -

1571 [32] D.E.Root, in 1999 Asia-Pacific Microwave Conference Workshop (WS2) Modeling and Characterization of Microwave Devices and Packages, Singapore, 1999[33] D.E.Root “Elements of Measurement-Based Large-Signal Device Modeling,” in 1998 IEEE Radio and Wireless Conference (RAWCON) Workshop on Modeling and Simulation of Devices

and Circuits for Wireless Communication Systems, Colorado Springs, August, 1998[34] AE Parker and JG Rathmell, “Broad-band Characterization of FET Self-Heating” IEEE Transactions on

Microwave Theory and Techniques, vol. 53, no. 7, pp. 2424--2429, Jul. 2005. [35] Filicori, F.; Vannini, G.; Monaco, V.A.; “A nonlinear integral model of electron devices for HB circuit analysis,” IEEE Transactions on Microwave Theory and Techniques, Volume 40, Issue [ ] , ; , ; , ; g y , y q , ,

7, July 1992 Page(s):1456 - 1465 [36] HPNMDG group[37] D.Schreurs, J.Verspecht, B.Nauwelaers, A.Van de Capelle, and M. Van Rossum, “Procedure to extract the nonlinear HEMT model from vectorial non-linear network analyzer

measurements,” International IEEE Workshop on Experimentally Based FET Device Modeling and Related Nonlinear Circuit Design, Kassel, Germany, pp. 20.1 - 20.7, July, 1997.[38] Martín-Guerrero et al “Frequency domain-based approach for nonlinear quasi-static FET model extraction from large-signal waveform measurements,” EuMICC Conf. 2006[39] V. Cuoco, “ Smoothie – A Model for Linearity Optimization of FET Devices in RF Applications,” Ph.D. Thesis Technical University of Delft, 2006[40] Lingquan Wang, “Investigation on High Frequency Terminal Current Non-conservation and its Physical Implications,” University of California at San Diego Class EE283 Final Project, 2005[41] Trew, R.J.; Yueying Liu; Bilbro, L.; Weiwei Kuang; Vetury, R.; Shealy, J.B.; “Nonlinear source resistance in high-voltage microwave AlGaN/GaN HFETs,” IEEE Transactions on Microwave

Theory and Techniques Volume 54, Issue 5, May 2006 Page(s):2061 - 2067 [42] A. Conway and P. Asbeck, To be published at IEEE 2007 International Microwave Symposium[43] Xu, J.; Gunyan, D.; Iwamoto, M.; Cognata, A.; Root, D.E.; “Measurement-Based Non-Quasi-Static Large-Signal FET Model Using Artificial Neural Networks,” IEEE MTT-S International

Microwave Symposium Digest June 2006 Page(s):469 - 472 [44] D.Root and J. Wood, “Simulator Requirements for Measurement and Simulation-based Black-Box Nonlinear Models,” 2004 IEEE International Microwave Symposium Workshop[45] Xu, J.; Gunyan, D.; Iwamoto, M, Horm, J,, Cognata, A.; Root, D.E.; “Drain-Source Symmetric Artificial Neural Network-Based FET Model with Robust Extrapolation Beyond Training Data,”

IEEE MTT-S International Microwave Symposium Digest June 2007IEEE MTT S International Microwave Symposium Digest June 2007 [46] Li, E.X.; Scheinberg, N.; Stofman, D.; Tompkins, W.; “An independently matched parameter SPICE model for GaAs MESFET's,” IEEE Journal of Solid-State Circuits, Volume 30, Issue

8, Aug. 1995 Page(s):872 - 880 [47] F.Filicori et al “Empirical Modeling of Low-Frequency Dispersive Effects Due to Traps and Thermal Phenomena in III-V FETs,” IEEE Trans. Microwave Theory Tech. Vol 43, No. 12, Dec.,

1995, pp.2972-2981[48] M. Iwamoto et al “Large-signal HBT model with improved collector transit time formulation for GaAs and InP technologies,” in 2003 IEEE MTT-S Int. Microwave Symp. Dig., Philadelphia,

PA, June 2003 pp.635-638[49] M. Iwamoto, D.E. Root, “Large-Signal III-V HBT Model with Improved Collector Transit Time Formulations, Dynamic Self-Heating, and Thermal Coupling,” 2004 International Workshop on

Nonlinear Microwave and Millimeter Wave Integrated Circuits (INMMIC) Rome Nov 2004

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Nonlinear Microwave and Millimeter Wave Integrated Circuits (INMMIC), Rome, Nov. 2004[50] Blockley et al 2005 IEEE MTT-S International Microwave Symposium Digest, Long Beach, CA, USA, June 2005.

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References (3)

[51] E. Vandamme et al, “Large-signal network analyzer measurements and their use in device modeling,” MIXDES 2002, Wroclaw, Poland.

[52] D. E. Root et al “Device Modeling with NVNAs and X-parameters,” IEEE INMMiC Conference, Gotenborg, Sweden, April, 2010

[53] J. Xu et al “Large-signal FET model with multiple time scale dynamics from nonlinear vector network analyzer data,” IEEE MTT-S International Microwave Symposium Digest, May, 2010

© Copyright Agilent Technologies 2010

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