This document is owned by Agilent Technologies, but is no longer kept current and may contain obsolete or

inaccurate references. We regret any inconvenience this may cause. For the latest information on Agilent’s

line of EEsof electronic design automation (EDA) products and services, please go to:

www.agilent.com/fi nd/eesof

Agilent EEsof EDA

niques will be presented in the devicemodelling flow section.

Some RF device models require spe-cial extensions to the intrinsic devicemodel, and modifications to the para-meter extraction methodology

Devices operating at GHz frequenciesbegin to see the effects of parasitics thatnormally do not impact the DC behav-iour. While many standard models offersome general RF parameters, they maynot fully address the device non-lineari-ties or high-frequency behaviour. Devicemodelling engineers often have to addRF extensions in the form of sub-cir-cuits as well as customise the extractionroutines.

■ Device non-linearities are notadequately modelled

Nonlinear models are typically ex-tracted and verified using only lineardata such as S-parameters. This dataonly includes small-signal informationabout the device at the excitation fre-quency. It does not include informationabout harmonics being generated by thedevice under large-signal conditions.This can lead to inaccurate results whenusing the model in a nonlinear frequencydomain (harmonic balance) simulation.At a minimum, nonlinear models shouldbe verified by comparing nonlinear sim-ulations to nonlinear measurement data.There are also new methods being pro-posed to extract certain model parame-

ters directly from nonlinear measure-ment data, which will be discussed laterin the article.

Device modelling flow■ Accurate modelling begins with

accurate measurementsEssential to obtaining a good RF modelis the accuracy of the measurements.The data must reflect the measurementof the intrinsic device without the effectsof the surrounding measurement envi-ronment.

Firstly, the measurement system mustbe well calibrated before any measure-ment can be made. Several advancedcalibration techniques have been devel-oped over the years to effectively correctthe system losses and bring the mea-surement reference plane up to the tip ofthe probes. The measurement data in-clude parasitic effects of device pads andinterconnects and must be de-embeddedto remove the embedded parasitics.

The pre-requisite for proper de-em-bedding is the availability of the dummytest structures, which include: OPEN,SHORT, THROUGH and DUT (deviceunder test) as illustrated with equivalentcircuit diagrams in Figure 2.

A commonly used technique is de-em-bedding from the OPEN and verifyingwith THROUGH. This method removesthe parallel circuit elements, which arecritical to the low frequencies. The S-pa-rameters of the device and the OPEN

test structure are transformed into Y-parameters. The removal of the parallelcircuits are performed as follows:

YDUT = Ytotal - Yopen

Convert Y- to S-parameters:

SDUT = S(YDUT)

The YDUT-parameters are convertedinto the S-Parameters, which representthe de-embedded S-Parameters of theintrinsic device. The advantage of thismethod is that only the OPEN test struc-ture besides the DUT is required. How-ever, the OPEN de-embedding is goodfor lower frequencies up to approxi-mately 5 - 10GHz, depending on the lay-out and the size of the test structures.

A more accurate de-embedding isOPEN-SHORT, which methodically re-moves both the parallel and series circuitelements. First, the parallel circuit ele-ments are removed from both theSHORT and the device test structures asfollows:

De-embed from OPEN:

YDUT/OPEN = Ytotal - YOPEN

YSHORT/OPEN = YSHORT - YOPEN

In the second step, the partially de-em-bedded Y-parameters are converted to Z-

22 DEVICE MODELLING

Microwave Engineering Europe ● December/January 2004 ● www.mwee.com

2RRP2

CC2

CCP3

1RRP1

CC1

RRP3

2RRs2R

RP2

CC2

LLs2

CCP3

LLs3

RRs3

LLs1

RRP3

RRs1

RRP1

1

CC1

2

RRs2R

RP2

LLs2

CC2

RRP3

RRs3

sBSIM4_NMOSMOSFET1

LLs3

CCP3

LLs1

RRs1

RRP1

CC1

RRP2

RRs2

2

LLs2

CC2

CCP3

TLINTL1Z=50.0 Ohm

LLs1

RRs1

RRP1

CC1

RRP3

Figure 2: Open, Short, Through, and DUT physical and schematic representations

DEVICE MODELLING 23

Microwave Engineering Europe ● December/January 2004 ● www.mwee.com

parameters, which are used to subtractthe influence of the series circuit ele-ments as illustrated below.

Convert Y- to Z-parameters:

ZDUT/OPEN = Z(YDUT/OPEN)

ZSHORT/OPEN = Z(YSHORT/OPEN)

De-embed from SHORT:

ZDUT = ZDUT/OPEN - ZSHORT/OPEN

Convert from Z- to S-parameters:

SDUT = S(ZDUT)

The fully de-embedded Z-parameterscan be converted into the S-parameters,which represent the S-parameters of theintrinsic device.

The final step is to verify the de-em-bedding results for both de-embeddingmethods with a THROUGH. If the de-vice is properly de-embedded, the S-pa-rameters of the THROUGH should rep-resent the behaviour of a transmissionline. The S11 and S22 of the THROUGHshould represent a physical characteris-tic impedance. With the measured S-pa-rameters properly de-embedded, thedata is ready to be used for extractingthe model parameters that affect the de-vice high-frequency behaviour.

■ Direct extraction methodologies yieldhighly physical, highly accurateresults

Direct extraction means that the modelparameter values are extracted from thephysical equations of the compactmodel. There are several advantages todirect extraction.

Firstly the model is more realistic be-cause the parameters are extracted di-rectly from a small set of relevant mea-sured data instead of globally fitted tothe entire data set. Secondly, extractionroutines enable the direct extraction ofmodel parameters from the equations ofthe intrinsic model, resulting in morephysical parameter values.

A good example is to look at thethreshold voltage model of a typical0.18µm CMOS process as a function ofgate length, using the BSIM4 model.Purely using optimisation, one canachieve an agreement between the mea-sured and simulated data as depicted inFigure 3(a). In this case, the model pa-rameters acted as fitting parameters,which sometimes have no physicalmeaning to the device model. However,when the parameters (i.e. LPE0,DVTP0, LPEB, DVT0, DVT1 & DVT2)were first extracted from the measureddata and followed by optimisation, theresult, in Figure 3(b) shows a much bet-ter fit and the parameter values werevery different.

■ Accurate RF model starts with anaccurate DC model

Having an accurate DC model para-meter set is essential to obtaining a goodRF model. For example, the startingpoints of the S21-parameters of a BSIM4model are determined by the DC modelparameters. Figure 4(d) shows the mag-nitude of S21 at the lowest frequency fordifferent gate biases. The very good fitbetween measured data (red) and simu-lated curves (blue) can be achieved withan excellent fit of the DC behaviour,mainly the output drain current and theoutput resistance Rout: see Figures 4(a)and 4(b). The good fit of the S-parame-ters cannot be achieved without the cor-rect starting point at the lowest fre-quency. This example shows the impor-tance of physically extracted DC modelparameters for further RF modelling.

Customise intrinsic model and extractionmethodologies for RF model

As discussed earlier, one of the chal-lenges for RF device modelling engineersis to be able to use the intrinsic modeland enhance its RF accuracy by addinghigh-frequency parasitics in the form ofsub-circuits. That requires an open soft-ware environment such as Agilent Tech-nologies Integrated Circuit Characteri-sation and Analysis Program (IC-CAP),which provides engineers with a flexibleplatform to create sub-circuit models

x xx

x

x

x xx

x

x

x x

x

x

x

xx

x

x

x

Plot BSIM4_DC_CV_Extract/Length_Scaling/Vth_L_low_Vd/Vth_Ldes (On)

Vth = f (Ldes, Vb) @ low Vd650.0

600.0

550.0

500.0

450.0

400.0

350.010-7 10-6 10-5

Ldes [LOG] Vth-scaling vs. channel lenght

xx

Vth_

L.m

Vth

_L.s

[E-3

}

x xx

x

x

x x

x

x

x

x x

x

x

x

xx

x

x

x

Plot BSIM4_DC_CV_Extract/Length_Scaling/Vth_L_low_Vd/Vth_Ldes (On)

Vth = f (Ldes, Vb) @ low Vd700.0

650.0

600.0

550.0

500.0

450.0

400.010-7 10-6 10-5

Ldes [LOG] Vth-scaling vs. channel lenght

xx

Vth_

L.m

Vth

_L.s

[E-3

}

Figure 3: Threshold voltage as a function of gate length for 18µm CMOS shows good agreement between simulated and measuredparameters, (a) globally optimised, and (b) directly extracted and optimised

and customised extraction routines usingParameter Extraction Language (PEL).PEL is a BASIC-like language that pro-vides engineers the power to createeverything from a single extraction rou-tine to a full extraction methodologywithin IC-CAP.

A sub-circuit model has been createdin the IC-CAP BSIM3 modelling packageby Advanced Modelling Solution to ad-dress the lack of an adequate RF modelin the intrinsic model. Important RF pa-rameters such as the gate resistance, thesubstrate resistance network, the overlapcapacitance, and other external induc-

tors, which are not incorporated in theintrinsic model, must be addressed forRF model accuracy. For example, thegate resistance significantly affects theinput reflection coefficient, S11. Simi-larly, the substrate resistance networkhas a significant contribution to the out-put reflection coefficient, S22. The macrocircuit model is added to the BSIM3model as depicted in Figure 5. A good fitbetween the measured S11 and S22 re-sults were obtained as the result of themacro model implementation and thequality of the model using direct extrac-tion methodology. It is also important to

note that the external capacitors, thefringing capacitance between the gateand the drain/source, were necessary toachieve the good results for the forwardand reverse transmission coefficients,S12 and S21.

Extracted parameters to be optimised forbetter fitThe first extraction of model parametersis usually followed by tuning and opti-misation to give better fitting. Manualtuning of parameters enables the engi-neers to visualise the effects of certainparameters. Optimisation can also be in-

24 DEVICE MODELLING

Microwave Engineering Europe ● December/January 2004 ● www.mwee.com

Figure 4: A good fit of the S-parameters (c), above, at the lowest frequency can be achieved with excellent fit on the DC drain current (a)and output resistance (b)

4.0

3.0

2.0

1.0

0.0

-1.00.0 0.5 1.0 1.5 2.0 2.5

vd [E+Ø]

id.m

id.s

[E-3

]

20.0

15.0

10.0

5.0

0.00.0 0.5 1.0 1.5 2.0 2.5

vd [E+Ø]

tout

.m

ro

ut.s

[E-3

]

Ø

Ø

Ø

Ø

Ø

Ø

Ø

Ø

Ø

Ø1

1

1

1

1

1

1

1

1

1

S_de

emb.

M.2

1

S_d

eem

b.S2

1

IM

AG C

E-

3.0

2.0

1.0

0.0

-1.0

-2.0

-3.0-3.0 -2.0 -1.0 0.0 1.0 2.0 3.0

REAL [E+Ø]

mag

(S_d

eem

b.M

.22

m

ag(S

_dee

mb.

S22)

[E+

e]Ø

Ø

1

1

Starting points of the S-parameter curve 1.00

0.98

0.96

0.94

0.92

0.90

0.881.4 1.6 1.8 2.0 2.2 2.4 2.6

vd [E+Ø]

26 DEVICE MODELLING

Microwave Engineering Europe ● December/January 2004 ● www.mwee.com

S_de

emb.

M.2

1

S_d

eem

b.S.

21

IM

AG C

E-

3.0

2.0

1.0

0.0

-1.0

-2.0

-3.0-3.0 -2.0 -1.0 0.0 1.0 2.0 3.0

REAL [E+Ø]

S_de

emb.

M.1

2

S_d

eem

b.S.

12

IM

AG C

E-

300.0

200.0

100.0

0.0

-100.0

-200.0

-300.0-300.0 -200.0 -100.0 0.0 100.0 200.0 300.0

REAL [E-3]

S_d

eem

b.M

.22

S

_dee

mb.

S.22

S_de

emb.

M.1

1

S_de

emb.

S.11

1.02.0

5.0

-5.0

-2.0-1.0

-0.5

-0.2

0.2

0.5

freq

0.2

0.5

1.0

2.0

5.0

1.02.0

5.0

-5.0

-2.0

-1.0

-0.5

-0.2

0.2

0.5

freq

0.2

0.5

1.0

2.0

5.0

Out

put

Pow

er

SaturatedPowerRegion

Compression region

Linear region(slope = small-signal gain)

Input Power

Out

put

Pow

er [

dBm

]A

mpl

itude

Input Power [dBm]

Harmonics

Out

put

Pow

er [

dBm

]A

mpl

itude

Input Power [dBm]

Harmonics

Figure 6: Gain compression and the generation of higher-order harmonics

DEVICE MODELLING 27

voked to further fine-tuning of the ex-tracted parameters. Using an optimisa-tion tool such as the IC-CAP Plot Opti-miser, the engineers can quickly select anoptimiser from the very robust optimi-sation algorithms, the model parame-ters, and the region(s) of optimisation.For example, if one would like to opti-mise certain critical regions on the plot,the plot optimiser allows the selection ofmultiple regions and automatically con-figures it in the optimisation strategy.

Advanced nonlinear device modellingwith harmonic balance simulationThe real-world device characteristics arenon-linear, meaning that the device willgenerate harmonics in addition to thestimulus signal. The contribution of thehigher-order harmonics becomes impor-tant when the input power is significant,such as in high-power amplifier designs.Higher harmonics become apparent atsignal compression level, i.e. 1dB com-pression point, as illustrated in Figure 6.

To model such device non-linearities,it requires accurate measurements of theamplitude and phase of the fundamentaland harmonics of the incident and re-flected waves or voltages and currents.This can be achieved with the use of aLarge Signal Network Analyser (LSNA)that can accurately measures the volt-ages and currents of a component underrealistic conditions. Such a LSNA wasoriginally developed by Agilent Tech-nologies and is now commercially avail-

able from Maury Microwave. The systemcan measure DC, CV, S-parameters andlarge signal characteristics of the DUT.The measured data can be converted into IC-CAP data format and importedinto the software, which can directly useHarmonic Balance simulation for ad-vanced non-linear device modelling.

Using Harmonic Balance simulationwithin IC-CAP, the model extracted fromthe S-parameters can be tuned and opti-mised toward the large signal measure-ments, as illustrated in Figure 7.

The result presented here was realisedby Agilent Technologies and NMDGEngineering. In this example, the BSIM3model parameters, Noff and Voffcv, wereoptimised. After optimising Noff and Voffcv, which have direct influence onthe gate capacitance model, there ismuch better agreement between themeasured and simulated output versusinput power results for the fist, secondand third harmonics. This demonstratesthe real advantage of having a simulatorworking together with a device-model-ling system to ensure that the extractedmodel is accurate in more advancedhigh-frequency circuit simulations.

Modelling packageThe new version, IC-CAP 2004, buildson the highly open and flexible softwarearchitecture for advanced RF devicemodelling with direct extraction method-ologies for most industry models. IC-CAP users can take advantage of its open

PortDrain

LLdrain

DiodeDjsb_perim

DiodeDjsb_area

RRsub2

RRsub3

RRsub1

PortBulk

MOSFET_NMOSBSIM3

DiodeDjdb_perim

DiodeDjdb_area

LLsource

PortSource

CCgd_ext

PortGate

LLgate

RR4

CCgs_ext

Figure 5: BSIM3 sub-circuit modelling of RFparameters (shown onfacing page) and plots ofS-parameters (right)showing good model fitwith measured data

IP68:Hermeticallyand pressure

tight worldwideknown speciality

of fischer

fischersealedconnectors

Swiss HeadquartersFischer Connectors SACH -1143 ApplesTel. +41 21 800 95 95Fax +41 21 800 39 24

A s i a Te l . + 8 5 2 2 2 6 8 6 8 3 7France Tel. + 3 3 1 5 5 7 8 2 5 7 8Germany Tel. +4 9 8 0 9 1 5 5 8 3 0I ta ly Tel . +39 039 321 275UK Tel . +44 2392 241 122U S A T e l . + 1 6 7 8 3 9 3 5 4 0 0

I n t e r n a t i o n a l S u b s i d i a r i e s

w w w . f i s c h e r c o n n e c t o r s . c hm a i l @ f i s c h e r c o n n e c t o r s . c h

➤ A sealed version of almost any standard connector

➤ Hermetically sealed (10-8 mbar l/s) and pressure tight for extreme environments and safety

➤ Meets and exceeds highest protection levels of IEC60529, BS5490, DIN40050

➤ Shell protecting sleeves and IP68 covers for mating faces available

➤ High performance O-ring seals made of VITON as standard

➤ Insulator-contacts sealed by3 component glass epoxy

InfoCard: Enter No: 9027Online: www.eelink.com

www.agilent.com/fi nd/emailupdatesGet the latest information on the products and applications you select.

www.agilent.com/fi nd/agilentdirectQuickly choose and use your test equipment solutions with confi dence.

Agilent Email Updates

Agilent Direct

www.agilent.comFor more information on Agilent Technologies’ products, applications or services, please contact your local Agilent office. The complete list is available at:www.agilent.com/fi nd/contactus

AmericasCanada (877) 894-4414 Latin America 305 269 7500United States (800) 829-4444

Asia Pacifi cAustralia 1 800 629 485China 800 810 0189Hong Kong 800 938 693India 1 800 112 929Japan 0120 (421) 345Korea 080 769 0800Malaysia 1 800 888 848Singapore 1 800 375 8100Taiwan 0800 047 866Thailand 1 800 226 008

Europe & Middle EastAustria 0820 87 44 11Belgium 32 (0) 2 404 93 40 Denmark 45 70 13 15 15Finland 358 (0) 10 855 2100France 0825 010 700* *0.125 €/minuteGermany 01805 24 6333** **0.14 €/minuteIreland 1890 924 204Israel 972-3-9288-504/544Italy 39 02 92 60 8484Netherlands 31 (0) 20 547 2111Spain 34 (91) 631 3300Sweden 0200-88 22 55Switzerland 0800 80 53 53United Kingdom 44 (0) 118 9276201Other European Countries: www.agilent.com/fi nd/contactusRevised: March 27, 2008

Product specifi cations and descriptions in this document subject to change without notice.

© Agilent Technologies, Inc. 2008

For more information about Agilent EEsof EDA, visit:

www.agilent.com/fi nd/eesof