Preliminary LumiCAL FEE Specification Presented by Alexander Solin NC PHEP [email protected] FCAL...
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Preliminary LumiCAL FEE SpecificationPresented by Alexander SolinNC [email protected] collaboration meeting, February 12-13, 2006,Krakow (INP PAS), Poland
February 12-13, 2006, Krakow A.Solin
ContentsPreliminary LumiCAL FEE SpecificationASICs for FCAL detectors prototypes (main parameters measurement setup, bench and beam tests)
February 12-13, 2006, Krakow A.Solin
Preliminary LumiCAL FEE Specification
February 12-13, 2006, Krakow A.Solin
Estimation of the pad Si-sensor capacitancies
February 12-13, 2006, Krakow A.Solin
295pF/1413 sq. mm
42pF/201 sq. mm
15 deg
15 deg
80 mm
280 mm
280 mm
80 mm
10 pads
22 pads
B
B
98pF/471 sq. mm
137pF/655 sq. mm
Cmax/Cmin=295pF/42pF=7
Rough segmentation parts
Fine segmentation part
Estimation of the strip Si-sensor capacitancies
February 12-13, 2006, Krakow A.Solin
30 deg
80 mm
280 mm
3 deg
80 mm
280 mm
64 concentric strips
120 radial strips
B
B
28pF/133 sq.mm
395pF/1885 sq. mm
For the bonded concentric strips: Cmin=168 pF, Cmax=571 pF
95pF/455 sq.mm
Cmax/Cmin=395pF/28pF=14
The large difference of capacitance is problem for a preamplifier noise optimization.
Estimation of the maximum Si-sensor charge collection(1-1000)MIP channel signal rangefrom B.Pawliks talk
February 12-13, 2006, Krakow A.Solin
1
Cfb=3.2pF
2V
CSP
1000MIP
LumiCal Si-sensor parameters
February 12-13, 2006, Krakow A.Solin
LumiCAL ASIC requirements
February 12-13, 2006, Krakow A.Solin
ASIC technologiesNext four pictures can help to estimate noises of frond end electronics. Calculations are done for Bi-JFET technology (see picture).
Same calculations can be done for other technologies. Preamplifier noises will be similar to the presented calculations.
February 12-13, 2006, Krakow A.Solin
Capacitance of Si-sensor vs its area 572pF28pF
February 12-13, 2006, Krakow A.Solin
ENC vs preamplifier power consumption 8000e
February 12-13, 2006, Krakow A.Solin
ENC vs shaping time8000e
February 12-13, 2006, Krakow A.Solin
ENC vs Si-sensor Capacitance572pF
February 12-13, 2006, Krakow A.Solin
ASICs for FCAL detectors prototypes(main parameters measurement setup, bench and beam tests)
February 12-13, 2006, Krakow A.Solin
Tetrode-BT, Tetrode-JFET ASICs1996 year, CMS ECAL
Two designs CSP were made in Minsk NC PHEP with slightly different circuits for amplifying of signals from Hamamtsu R2149 vacuum phototetrode:TETRODE-BT with bipolar input transistor;TETRODE-JFET with p-JFET input transistor.
February 12-13, 2006, Krakow A.Solin
Design requirements to Tetrode CSPsHamamtsu R2149 parameters:
CSP requirements:
February 12-13, 2006, Krakow A.Solin
CSP based on Tetrode JFETENC=320e+18e/pF, Tp=800ns
February 12-13, 2006, Krakow A.Solin
Wykres2
489.6891712957
326.3275571756
322.145457262
319.8688109209
ENC
Vsupply, V
ENC, e
ENC vs Vsupplies at Cd=0Tetrode JFET based CSP
ENC at Vsupplies=(6-9)V and 0pF
Cd=0
VccENCGainVsVn_stdVn_ICVn_cableQin, fCfC, eClCrTpTmeasure
6489.689171295725.7325.732.122.01595238040.65616250874
7326.327557175627.9527.951.61.45933683570.65616250838
8322.14545726228.128.11.591.44836597590.65616250804122682835
9319.868810920928.328.31.591.44836597590.65616250827
Cd=0
VccENCGainVsVn_stdVn_ICVn_cableQin, fCfC, eCrClTpTmeasure
0318.294210585928.4456.881.591.44836597590.65626250804122682804
11.222558.290952909328.16556.332.62.51588235020.65626250122698820
22.58691.909713481927.8355.663.153.08093557220.65626250122710832
47.881157.576105016627.03554.075.055.00721119990.65626250122741863
82.291806.650397594326.0252.047.557.52144693530.65626250122775897
ENC at Vsupplies=(6-9)V and 0pF
Gain
Vsupply, V
ENC, e
Gain vs Vsupplies at Cd=0
ENC
Vsupply, V
ENC, e
ENC vs Vsupplies at Cd=0Tetrode JFET based CSP
ENC
Cd, pF
ENC, e
ENC vs Cd at Vsupplies=+/-8VTetrode JFET based CSP
Wykres3
318.2942105859
558.2909529093
691.9097134819
1157.5761050166
1806.6503975943
ENC
Cd, pF
ENC, e
ENC vs Cd at Vsupplies=+/-8VTetrode JFET based CSP
ENC at Vsupplies=(6-9)V and 0pF
Cd=0
VccENCGainVsVn_stdVn_ICVn_cableQin, fCfC, eClCrTpTmeasure
6489.689171295725.7325.732.122.01595238040.65616250874
7326.327557175627.9527.951.61.45933683570.65616250838
8322.14545726228.128.11.591.44836597590.65616250804122682835
9319.868810920928.328.31.591.44836597590.65616250827
Cd=0
VccENCGainVsVn_stdVn_ICVn_cableQin, fCfC, eCrClTpTmeasure
0318.294210585928.4456.881.591.44836597590.65626250804122682804
11.222558.290952909328.16556.332.62.51588235020.65626250122698820
22.58691.909713481927.8355.663.153.08093557220.65626250122710832
47.881157.576105016627.03554.075.055.00721119990.65626250122741863
82.291806.650397594326.0252.047.557.52144693530.65626250122775897
ENC at Vsupplies=(6-9)V and 0pF
0
0
0
0
Gain
Vsupply, V
ENC, e
Gain vs Vsupplies at Cd=0
0
0
0
0
ENC
Vsupply, V
ENC, e
ENC vs Vsupplies at Cd=0Tetrode JFET based CSP
0
0
0
0
0
ENC
Cd, pF
ENC, e
ENC vs Cd at Vsupplies=+/-8VTetrode JFET based CSP
AS01PDA, AS01T ASICs2002 year, TESLA THCAL
Next AS01PDA ASIC were designed and manufactured in Minsk NC PHEP for amplifying of signals from photodetectors.The AS01PDA ASIC is a development of the Tetrode BT design line. It additionally contains a shaper and shaper gain control stage.
February 12-13, 2006, Krakow A.Solin
AS01PDA main parameters
February 12-13, 2006, Krakow A.Solin
AS01PDA block diagram
February 12-13, 2006, Krakow A.Solin
Box sizes with text.Hit to start anew line of text.
Preamplifier- Shaper- 50 Ohm Driver
Reference level (Vref)
Gain control(Gain_ctrl)
Signal input (In)
Ct 0.2pF
Test input (In_t)
Positive output (Op)
Negativeoutput(On)
Bias block
AS01PDA testsOctober, 2002 Output signals were digitalized with theTDS3032 scope.
February 12-13, 2006, Krakow A.Solin
AS01PDA noise curvesFebruary, 2006 Noise is measured with the Infiniium 54830B scope.
February 12-13, 2006, Krakow A.Solin
Wykres1
1270.6571341.511445.7471523.6441547.797
1277.2061366.4211468.3321527.2971550.699
1404.081451.1161524.0261587.7111612.332
1723.3331744.3981811.4871844.0821879.057
2068.2422097.6352120.3352130.5222152.839
4100.6024059.523940.5883899.0283884.099
5V
6V
7V
8V
9V
Trend line
Cd, pF
ENC, e
ENC vs Cd and Vcc
ENC = 14,123e/pF + 1000e
6V
CdENCGainVsVn_stdVn_ICVn_cableVn_oscQin, fCfC, e
01169.75304643553.074930.7490.7020.57549978280.4020.334106250
3.5671170.01940097733.074230.7420.7020.57549978280.4020.334106250
6.2261173.94958534233.070430.7040.7030.57671916910.4020.334106250
11.2221201.53360785283.069430.6940.7140.5900779610.4020.334106250
22.581275.59410736783.044130.4410.740.62128576360.4020.334106250
47.881481.84534450583.014430.1440.820.7146999370.4020.334106250
82.291872.76703766072.946129.4610.970.88277743510.4020.334106250
104.622286.46596016362.904329.0431.1361.06249329410.4020.334106250
212.23806.70999729842.627426.2741.651.60027997550.4020.334106250
346.90.4020.334106250
728.30.4020.334106250
1028.70.4020.334106250
0.4020.334106250
6V
0
0
0
0
0
0
0
0
0
ENC
Cd, pF
ENC, e
ENC vs Cd at Vcc=+6V
6V_diff
0
0
0
0
0
0
0
0
0
Gain
Gain
5V_int
CdENCGainVsVn_stdVn_ICVn_cableVn_oscQin, fCfC, e
01385.67106997278.67986.792.011.92419827460.5810.456106250
3.5671416.7133712578.67386.732.051.9659448110.5810.456106250
6.2261419.45853394298.6786.72.0531.96907287830.5810.456106250
11.2221448.91760465668.6686.62.092.0076202330.5810.456106250
22.581544.04289445258.63186.312.212.13226147550.5810.456106250
47.881769.83465652658.56585.652.4942.42538141330.5810.456106250
82.292177.89037341368.41784.172.992.93300852370.5810.456106250
104.622454.5173430648.31383.133.3163.26470442770.5810.456106250
212.23982.17892414597.6976.94.9344.89967294830.5810.456106250
346.90.5810.456106250
728.30.5810.456106250
1028.70.5810.456106250
0.5810.456106250
5V_int
0
0
0
0
0
0
0
0
0
ENC
Cd, pF
ENC, e
ENC vs Cd at Vcc=+6V
5V_diff_no signal
CdENC_5VENC_7VGainVsVn_stdVn_ICVn_cableVn_oscQin, fCfC, e
01050.2905771671118.1266.1861.81.191.03852732270.5810.456106250
6.2261052.50458357251143.1986.16761.671.191.03852732270.5810.456106250
11.2221065.31143666721160.4266.1661.61.21.0499709520.5810.456106250
22.581162.87040333811259.3486.1361.31.281.14054329160.5810.456106250
47.881363.32091414651387.2245.9459.41.421.29570019680.5810.456106250