LED Packaging: The Largest Opportunity For LED Cost … - Editorial... · Key Technology Trends in...

© 2012Copyrights © Yole Développement SA. All rights reserved.

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Webcast

LED Packaging: The Largest Opportunity For LED Cost Reduction

18/07/2012

© 2012 2Copyrights © Yole Développement SA. All rights reserved.

Agenda

• Why Cost Reduction of Packaged LED is Required?

• Key Technology Trends in LED Packaging & Associated Players

• Potential Impact of Cost Reduction on LED Value Chain and Markets

• Conclusion


Why Cost Reduction of Packaged LED is Required?


General LightingMain Drivers

1. Depending on geographical region ‐ Price listed is worldwide average

Comparison of Average Selling Price (ASP) of different technology of lampAll sources are ~ 800 lumens, warm White and tier-1 brand only

Incandescent< $1

Fluorescent~ $3-$5

LED~ $20-$401

Upfront Cost

Total Cost of Ownership (TCO) Energy Cost

Maintenance Cost

Upfront Cost

=


General LightingTypical Cost Structure of Lighting Products

LED packages represent nearly 30% to 60% off the total cost of LED‐based lighting products (depending on the application targeted).

Source: 2011 DoE Manufacturing Roadmap - Yole Développement


Cost Structure of Packaged LED

Packaging typically accounts for 20% to 50% (~35% in average) of the packaged LED Cost… And represents therefore one of the largest opportunity for cost reduction at the components level…

Source: 2011 DoE Manufacturing Roadmap

Source: 2011 Yole Développement


Key Technology Trends in LED Packaging & Associated Players


LED Manufacturing Process FlowBack‐End Level (From Epiwafer to Packaged LED)

Osram OslonSource: Osram

Epiwafer

Carrier wafer

Epitaxial substrate

Die

Lens

Carrier wafer


The Path to Cost Reduction

Consensus → Need for a cost reduc on of a factor > 10

Manufacturing Efficiency

LED Performance

COST =$

LUMEN

x5

x2-x3


10 Key Technologies & Research AreasRelative Impact on LED Cost of Ownership at Packaging Level

Die Singulation Increased

throughputs and yields

LED Performance

Manufacturing Cost

Current Droop

Source: Yole Développement

Thermal ManagementNew materials for packaging

Testing & BinningWafer level, Higher

throughputs

Encapsulation Materials and Optics

Ageing and optical properties

Wafer Level Packaging

Silicon TSV, Wafer level optics

PhosphorsConversion efficiency,Color Rendering, “IP

free” phosphors

PhosphorsQuantum dots

phosphorsSubstrate Separation

Laser lift off, Other separation techniques

Packaging Design


Details on Die Singulation, Testing & Binning, Substrate Separation, Current Droop and WLP (1/2)

Technology / Research

AreasDescription Cost Reduction

OpportunitiesAssociated

Players

Die Singulation

2 different types of process are currently used for LED die singulation (Dicing / Scribing & Breaking) → Critical parameters: Street width / Cutting speed / Cutting yields / Performance

Improving throughput by increasing speed, reducing street width and / or developing new techniques.

JPSA, QMC, ESI, ALSI,

Hamamatsu…

Testing & Binning

Each die and package is tested and sorted for at least 3 parameters (Luminous Flux / Color / Forward Voltage) → The industry still throws away > 50% of the dies.

Improve testing throughput / accuracy through improvement in visual inspection for assembly defects, electrical & optical testing, sorting and reliability testing.

Shibuya, Han*s Laser, ESI, Autec…


Details on Die Singulation, Testing & Binning, Substrate Separation, Current Droop and WLP (2/2)

Technology / Research

AreasDescription Cost Reduction

OpportunitiesAssociated

Players

Substrate Separation

Substrate separation technologies are used to bond the epiwafer to a carrier wafer with the desirable properties and removing the initial substrate → Development of vertical LED

Improving performance of LEDs by accessing to new structure more efficient in terms of light extraction.

JPSA, Ushio, QMC, NTT…

Current Droop

Current droop consists in a decrease of LED efficiency observed when the current density is increased beyond a certain threshold → Various explanations have been suggested but a consensus is yet to be found.

Improving performance of LED by being able to develop 100% droop free LED.

/


Details on Phosphors (1/2)

• How to make white light?

• Key requirements:– Excitation and emission wavelength.– Conversion efficiency.– Cost.– Intellectual Property.– Stability.– Compatibility with encapsulation material.

400 500 600 700nm

Blue Chip +

Yellow Phosphor

400 500 600 700nm

UV Chip + + 3 Phosphors

400 500 600 700nm

Blue Chip + Red Phosphor

Yellow Phosphor+


Details on Phosphors (2/2)

• Trends:– Development of new materials (→ Quantum

Dots), allowing adjustable size / composition totune absorption and emission wavelengths, andnarrowband emission.

– Development of new Phosphor depositionprocess (→ Conformal & Preform), allowinghighly uniform color, optically homogeneoussolid state material, precisely controlledphosphor absorption and tight control of colordistribution.

– Development of Remote Phosphors, allowingbetter control of phosphor temperature(reduced thermal quenching or shifting), goodcolor homogeneity and tighter control andreproducibility.

ConformalPhosphor Deposition

Process

Preform Phosphor Deposition

Process

LED Die

Phosphor coated lens

Remote Phosphor


Details on Wafer Level Packaging (1/2)

• Wafer Level Packaging consists in packaging several LEDs at wafer level, rather thanassembling the package of each individual unit after wafer dicing.

Overview of Chip to Wafer LED WLP processSource: Yole Développement

Solder / Metallization1) Wafer level

preparation of the package substrate

2) Chip to wafer 3) Wafer level interconnect, phosphor

deposition, encapsulation, optic

4) LED package separation

Packaging wafer

LED wafer

LED die

Mirror coating

Solder Bump

PhosphorWafer Level Optic

Note: in this example, the LED chips are singulated before being positioned onto the package wafer (=“Chip to Wafer” packaging)


Details on Wafer Level Packaging (2/2)

• Benefits:– Reliability: Monolithic assembly, Reduced wire interconnect and Good CTE match with

GaN– Small form factors, ultra‐thin, compact packages.– Wafer level testing.– Reduced cost: wafer level manufacturing.


Details on Thermal Management

• For LED, up to 40% of the energy turned into heat…• … However, LED DON’T like heat → Decrease of performance (Brightness, Efficiency

/ Lifetime…).• Trends:

Chi

p on

Boa

rd

PCB

LED Die

PCB (MCPCB, FR-4, CEM-3, Ceramic…)

Substrate OnlySi Submount

Substrate

Heat slug

Optek Lednium

Ceramic

Lumileds Luxeon Rebel

Silicon(Wafer Level Packaging)

Viscera Technology

Heat slug

Lumileds Luxeon

Ceramic

Cree-X-lamp


Details on Encapsulation Materials and Optics

• Main requirements:– Non‐yellowing / Durability.– Good refractive index .– Good thermo‐mechanical properties.– High and low temperature resistance.– Good adhesion.– Non‐porous.– Low cost.

• Trends:Process MaterialsPotting AcrylicsPrinting SiliconMolding (Transfer, Injection, compression) PolycarbonatesWafer Level Replication Cyclo Olefin Copolymer

Luxeon K2Source: Mu Analysis

Lens by compression molding on lead framesSource: ASM Pacific Technology

Gradient Index Flat Glass Wafer


Details on Packaging Design (1/2)

Single Large Die

Single or Multi “Jumbo Die”

Small / Medium COB Array

Multiple Large DieMiddle Power

Lumileds Cree Luminus DeviceEdison OptoLumileds

Single Die x 10

COB (Single Die)

Multi Die x 24


Details on Packaging Design (2/2)

• Small Die or Large Chips:

• Standardization can reduce cost– Lighting applications require high power packages, right?…– … Mid‐power LED have price decreased dramatically in 2011 under the combined effects

of “Package Standardization + Very large volumes + High level of competition (oversupply)”→ Highly competitive $/lumen ratio.

→Middle power packages crossing over from display to lighting!!!

Small Chips Benefits Higher binning yields / Increased thermal management (distributed heat load) / High Voltage packages

Small Chips Drawbacks Packaging complexity / Beam shaping / Larger package volume

2 Chip 5630 packagesSource: Seoul Semiconductor


Potential Impact of Cost Reduction on LED Value Chain and Markets


LED Lighting Value ChainOverview

Material /Substrate Die / Chip Packaged

LED

Module / Light

EngineLamp System /

Solution

• Assembly of LED package(s) on Printed Circuit Board (PCB)• Integration of optic, heat sink / thermal management, IC driver / power supply and case

• Enhancement of the lightingfixture by attaching externallighting control units

• Combination of module and ballast with afixture (additional optic, heat sink and case)

• Encapsulation and realization of contact• Add of thermal management• Coating with phosphor (for white LED)

• Growth of epilayer on wafer• Structuration and doping of the

substrate

Dis

trib

utor

s

Con

sum

ers

Lighting Fixture

• Combination of module with additional optic,heat sink and case


LED Lighting Value ChainImpact of Cost Reduction ‐ “Display Application” Model

Material /Substrate Die / Chip Packaged

LED

Module / Light

EngineLamp

System /

Solution

Lighting Fixture

1

• Commoditization of chip manufacturing.

• New entrants should professionalize the epitaxy process

• New Asian players should enter the business, especially for low- and middle-end applications Despite commoditization, profit can keep high with high-end applications

• Add of functionalities • Add of functionalities• New designing of

fixtures and improvement of system size should increase margin

Com

mod

itiza

tion

/ St

anda

rdiz

atio

n

Value Transfer

Integration

2

3Vertical Integration

Consolidation


Conclusion


Conclusion

• Technology improvements: efficiency + more lumens per chip.• Manufacturing improvements: dedicated LED tools, automation, inline

testing.• Economies of scale• Higher integration• Standardization

LED industry maturing and reaching critical mass to enable development of dedicated tools. Semiconductor “veteran” companies bring additional

expertise and “best practices”.

More than x6 cost reduction in packaged LEDs cost?Not easy but achievable through combination of different parameters

LED Packaging: The Largest Opportunity For LED Cost … - Editorial... · Key Technology Trends in...

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