Fabrication and Testing of Single Photon Avalanche

Detectors in the TSMC 0.18,um CMOS Technology

Miriam Adlerstein Marwick and Andreas G. AndreouDepartment of Electrical and Computer Engineering

Johns Hopkins UniversityBaltimore, MD 21218

Abstract-We report on the fabrication and preliminary testingof a single photon avalanche detectors (SPAD) fabricated inthe TSMC 0.18,u m standard CMOS technology (CM018). Thedetectors exhibit low dark count rate and robust geiger-modeoperation at room temperature.

I. INTRODUCTION

Optical sensors for extreme low-level light conditions mustconvert each incoming photon into a measurable electricalsignal. Single-photon detectors, as these sensors are called,can be employed in vision systems with 3D imaging andranging capability, for sensing at night or in caves, for lowdata rate intra- and inter-platform communications and formolecular sensing in bio-analytical fluorescence imaging. Sil-icon avalanche photodiodes operated above their breakdownvoltages have been shown to function as single-photon detec-tors [1], [2].

Photomultiplier Tubes (PMT), which have been prominentin these applications in the past, are bulkier, more easilydamaged, expensive, susceptible to magnetic fields, and re-quire a significantly higher voltage supply than avalanchephotodiodes. For a silicon avalanche photodiodes to operatein Geiger mode (i.e., above its breakdown voltage, wherea single incident photon can trigger an infinite amount ofphotocurrent) it must meet stringent dark current and noiserequirements, and must also guarantee that the p+/n junctionthat forms the multiplication region of the device can has thelowest breakdown voltage of any two abutting regions by a fairmargin. Furthermore, premature breakdown along any edgesor corners of the primary junction must be prevented. In thepast, specialized fabrication steps were needed to meet theserequirements, but in recent years, single-photon avalanchephotodiodes (SPADs) in foundry CMOS technologies havebeen demonstrated.When an avalanche photodiode is biased in Geiger mode,

any incident photon causes an avalanche of impact ionizationin which electron-hole pairs are generated at a rate that exceedsthe rate at which they can be collected by the external circuit.A quenching circuit is used to both limit the current to preventdamage to the device and reset the detector, putting it in a statefor detection of subsequent photons. When a standard CMOSprocess is used to fabricate the APDs, both the quenchingcircuitry and timing electronics can be integrated with thedevice, yielding a compact, high-density monolithic array ofsingle photon detectors.

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Fig. 1. Cross-section of the avalanche photodiode

The earliest approach to fabricating arrays of SPADs inCMOS consisted of using a custom process to devise thephotodetector array, and then integrating it with a compan-ion CMOS timing chip using backside bridge-bonding [3].This resulted in arrays limited in size to 32x32 pixels thatrequired significant post-processing to connect the readoutcircuitry. Advances in CMOS technologies, in particular theintegration of a lightly doped deep well module for highvoltage applications or for RF circuit isolation has openedopportunities for innovation in all CMOS SPAD arrays andprocessing electronics. The Charbon group at EPFL havereported integrated SPADs in high voltage CMOS processes(0.8,um) [4], [5]. (They have also reported SPAD arrays in a0.35,um process in [6], though it is not clear if the processis high-voltage or even commercially available.) Commercialhigh-voltage CMOS processes suffer from several salientreliability issues that impede the progress of the technologyto feature sizes competitive with standard low-voltage CMOS[7], therefore limiting the ultimate density of SPAD arraysfabricated in these processes. Fabrication steps that work toguarantee high breakdown voltages and eliminate latchup oftenintroduce leakage problems at crucial device interfaces.

To date, the only Geiger-mode CMOS APD reported in anon-high-voltage process is the shallow-trench isolated struc-ture described in [8]. This structure has a very high dark count,most likely a result of its use of an isolation oxide (availablein a limited number of standard fabrication processes) to formthe guard ring, creating a poor material interface at a cruciallocation inside the device. In this paper we present a single-

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photon avalanche photodiode fabricated in a standard 1.8Vdeep-submicron 0.18,um CMOS technology (TSMC CM018)which uses a retrograde well to form the guard rings thatsurround the periphery of the multiplication region as shownin Figure I, similar to those described in [9].By far the most notable trend in CMOS technology is the

constant push towards smaller features sizes [10]. When thedimensions of transistors are scaled down, any fabricationdefects and their effect on device performance becomes moresignificant. CMOS foundries are therefore forced to improvethe quality of their fabrication process just to maintain theiryield of reliable circuits at the deep submicron and nanometerscales. This is good news for the design of highly sensitivedevices such as the avalanche photodiode described herein,which exhibits extremely few dark counts even at roomtemperature, as well as excellent uniformity between devices-largely because of this phenomenon.

II. AVALANCHE PHOTODIODE

The scaling down of MOSFET transistors also brings in-creasing doping levels both in the contact (source and drain)and the channel regions. The avalanche photodiode, whichmakes use of these same fabrication layers, manifests theincrease in doping as a decrease in breakdown voltage, whichis measured at just under 1OV for the 0.18,u m process.Since the impact ionization in a device decreases with

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Fig. 2. Breakdown voltage of a 20,um diameter device measured across threedifferent temperatures

increasing temperature, we measured the breakdown voltagein a regulated temperature chamber at several temperaturesand found the device to be very stable, with a shift of only6.5mV per degree Celsius (Figure 2). The dark current in thedevice at small voltages and/or at decreased temperatures islower than the minimum detectable signal of the electrometerused in the experiment, and therefore does not show up in thelog plots of Figure 2. The measurement was set to current-limit at 50,uA to protect the device. When the APD is usedto detect single photons, it is biased anywhere from several

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Fig. 4. Responsivity of the avalanche photodiode biased below its breakdownvoltage for wavelengths ranging from UV to near IR

hundred millivolts to several volts above breakdown; therefore,the temperature in the device would have to drift by at least20 degrees to have any measurable effect on the dark countor photon detection probability. The device was also allowedto stay in the ON state for a stretch of several hours andshowed no degradation in performance. The detector was thenilluminated using calibrated light-emitting diodes of severaldifferent wavelengths to measure its responsivity and spectralcharacteristics. Figure 3 shows the measured responsivity ofthe device for illumination with a 565nm LED plotted onthe same graph as the signal-to-dark current ratio of thephotodiode with the same level of illumination. The results ofillumination across several different wavelengths are comparedin Figure 4 for the avalanche photodiode biased just belowbreakdown.

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III. SINGLE PHOTON AVALANCHE DETECTORS

A digital output buffer is integrated into the pixel to read outthe voltage pulses measured across the quenching device whenthe device is biased above breakdown. A thick-oxide, speciallydesigned PMOS transistor is used to quench the device in placeof a resistor. Figure 5 shows the schematic of the pixel. The

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Fig. 5. Schematic of the SPAD circuit

diameter of the active area of the photodetector is 1O,um, whilethe overall diameter of the SPAD is 22,um. This translates intoa fill factor of up to 18%, which is roughly double that ofany reported thus far. A photograph of an actual fabricatedSPAD is shown in Figure 6. A flaw in the mask design of the

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Fig. 7. Scope capture of single-photon events

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Fig. 6. Die photograph of the avalanche photodiode

digital buffer interfered with testing, and so the analog pulseswere also read out through a small external resistor placedin series with the photodetector to translate the current outputinto voltage pulses that were then displayed on an oscilloscope.The resulting single-photon events are depicted in Figure 7 inwhich a neutral density filter was used to limit the illuminationof the device to 0.1% of the room light. Figure 8 gives a closerlook at the shape and temporal characteristics for one of theSPAD output pulse.

Rise and fall times in these screenshots are limited by thecapacitances introduced by the oscilloscope. The shape of the

Fig. 8. Close-up view of a single event

pulses shows a very rapid onset of avalanche, followed bya fairly steep quenching of the pulse which then settles intoa slower recharge of the device to its waiting state. A darkcount rates of approximately 250 counts/s was measured atroom temperature. Silicon avalanche photodiodes can functionin Geiger mode when the impact ionization in response to an

incoming photon occurs with equal probability at any pointalong the the p+/n junction that forms the multiplication regionof the device. Hence, the critical electric field must also occur

uniformly across the junction. Premature breakdown along any

edges or corners of the primary junction must be preventedso that sensitivity to incoming light is preserved and darkcounts are minimized. Before fabricating the device, TCADsimulations were performed using the Taurus-Medici devicesimulator to predict the electric field distribution inside the

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Fig. 9. A simulated profile of the electric field across the photodiode. Themaximum electric field is designed to occur along the primary junction andto avoid premature edge breakdown at smaller voltages.

photodetector. Figure 9 shows a simulation of the electricfield inside the avalanche photodiode when biased at a highvoltage, demonstrating that the design is free of edge effectsthat could cause leakage and premature breakdown, and thatthe maximum field is uniformly distributed across the activeregion of the device. For comparison, results of dark countmeasurement of a test circuit incorporating a minimum-sizedavalanche photodiode with only a basic guard ring is shownin Figure 10. The frequency of dark counts is several timeshigher and the device does not appear to fully reset betweencounts.

IV. CONCLUSION

Single photon avalanche detectors were successfully fabri-cated in the 1.8V TSMC 0.18,um standard CMOS process.

A highly stable breakdown voltage of only 1OV is achievedwith low dark current and potential for high fill factor in thecontext of a fully integrated SPAD array. Further work on

the characterization of the dark count and photon detectionprobability is underway.

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Fig. 10. Dark counts in a SPAD designed for minimum area

ACKNOWLEDGMENTS

This work was supported by National Institutes of Healthgrant R21 RR17073-01 "Contact fluorescence imaging". M.A.Marwick is supported by a graduate fellowship from the JohnsHopkins University Applied Physics Laboratory. The deviceswere fabricated through the MOSIS foundry run T64H. Wethank Prof. Pamela Abshire for providing space on one ofthe designs in her lab to fabricate the test devices reported inthis paper. Beatriz Olleta assisted with the final layout of thedevices and test structures.

REFERENCES

[1] J. Jackson, D. Phelan, A. Morrison, R. Redfern, and A. Mathewson,"Characterization of geiger mode avalanche photodiodes for fluores-cence decay measurements," Proc. of SPIE, vol. 4650, no. 7, Jan. 2002.

[2] A. Rochas, A. Pauchard, P. Besse, D. Pantic, Z. Prijic, and R. Popovic,"Low noise silicon avalanche photodiodes fabricated in conventionalcmos technologies," IEEE Transactions on Electron Devices, vol. 49,no. 3, pp. 387-393, March 2002.

[3] B. Aull, A. Loomis, D. Young, R. Heinrichs, B. Felton, P. Daniels, andD. Landers, "Geiger mode avalanche photodiodes for three-dimensionalimaging," Lincoln Laboratory Journal, vol. 13, no. 2, pp. 335-345, 2002.

[4] A. Rochas, M. Gosch, A. Serov, P. Besse, R. Popovic, T. Lasser, andR. Rigler, "First fully integrated 2-D array of single-photon detectorsin standard CMOS technology," IEEE Photonics Technology Letters,vol. 15, no. 7, pp. 963-965, July 2003.

[5] M. Sergio and E. Charbon, "An intra-chip electro-optical channel,"IEDM Technical Digest, pp. 819-822, Dec. 2005.

[6] C. Niclass, M. Sergio, and E. Charbon, "A single photon avalanche diodearray fabricated in deep submicron technology," Design Automation andTest Europe Conference, Mar. 2006.

[7] G. Tao, "Reliability issues in advanced monolithic embedded highvoltage CMOS technologies," IEEE International Integrated ReliabilityWorkshop, 2004.

[8] H. Finkelstein, M. J. Hsu, and S. C. Esener, "Sti-bounded single-photonavalanche diode in a deep-submicrometer cmos technology," ElectronDevice Letters, vol. 27, no. 11, pp. 887-889, Nov 2006.

[9] S. Cova, M. Ghioni, A. Lacaita, C. Samori, and F. Zappa, "Avalanchephotodiodes and quenching circuits for single-photon detection," Appl.Opt., vol. 35, pp. 1956-1976, 1996.

[10] Y Taur, D. Buchanan, W. Chen, D. Frank, K. Ismail, S. Lo, G. Sai-Halasz, R. Viswanathan, H. C. Wann, S. WInd, and H. Wong, "CMOSscaling into the nanometer regime," Proceedings of the IEEE, vol. 85,no. 486-504, 1997.

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