EE 5340 Semiconductor Device Theory Lecture 25 - Fall 2010

EE 5340Semiconductor Device TheoryLecture 25 - Fall 2010

Professor Ronald L. [email protected]

http://www.uta.edu/ronc

L25 17Nov2010 2

Ideal 2-terminalMOS capacitor/diode

x

-xox

0SiO2

silicon substrate

Vgate

Vsu

b

conducting gate,area =

LW

tsub

0y

L

L25 17Nov2010 3

MOS surface states**p- substr = n-channel

VGS s Surf chg Carr Den

VGS < VFB < 0 s < 0 Accum. ps > Na

VGS = VFB < 0 s = Neutral ps = Na

VFB < VGS s > 0 Depletion ps < Na

VFB < VGS < VTh s = |p| I ntrinsic ns = ps = ni

VGS < VTh s > |p| Weak inv ni< ns < Na

VGS = VTh s = 2|p| O.S.I . ns = Na

L25 17Nov2010 4

Flat-band parametersfor n-channel (p-subst)

0nN

lnVq2

E

n

NNlnV

gate, Si-poly n a For

den chg Ox/Si the is 'Q ,x

'C

'C'Q

V :substratep

i

at

g2i

actms

sms

ssOx

OxOx

Ox

ssmsFB

L25 17Nov2010 5

Flat-band parametersfor p-channel (n-subst)

0nN

lnVq2

E

n

NNlnV

q

E gate, Si-poly p a For

den chg Ox/Si the is 'Q ,x

'C

change) (no 'C'Q

V :substraten

i

dt

g2i

dvtms

gsms

ssOx

OxOx

Ox

ssmsFB

L25 17Nov2010 6

Flat band with oxidecharge (approx. scale)

Ev

Al SiO2p-Si

EF

m

Ec,Ox

Eg,ox

~8eV EFp

Ec

Ev

EFi

'Ox

'ss

msOxmsFB

Ox

Oxc

Ox

'ss

x

ssm

ss

CQ

VV

xV

dxdE

q1Q

E

surface gate the on

is Q'Q' charge

a cond FB at then

bound, Ox/Si the at

is Q' charge a If

q(fp-ox)q(Vox

)q(m-

ox)

q(VFB

) VFB= VG-VB, when Si bands

are flat

Ex

+<--Vox-->-

L25 17Nov2010 7

Equivalent circuitfor accumulation• Accum depth analogous to the

accum Debye length = LD,acc = [Vt/(qps)]1/2

• Accum cap, C’acc = Si/LD,acc

• Oxide cap, C’Ox = Ox/xOx

• Net C is the series comb

Oxacctot 'C1

'C1

'C1

C’Ox

C’acc

L25 17Nov2010 8

Equivalent circuitfor Flat-Band• Surface effect analogous to the

extr Debye length = LD,extr = [Vt/(qNa)]1/2

• Debye cap, C’D,extr = Si/LD,extr



Oxextr,Dtot 'C1

'C1

'C1

C’Ox

C’D,extr

L25 17Nov2010 9

Equivalent circuitfor depletion• Depl depth given by the usual

formula = xdepl = [2Si(Vbb)/(qNa)]1/2

• Depl cap, C’depl = Si/xdepl



Oxdepltot 'C1

'C1

'C1

C’Ox

C’depl

L25 17Nov2010 10

Equivalent circuitabove OSI• Depl depth given by the maximum

depl = xd,max = [2Si|2p|/(qNa)]1/2

• Depl cap, C’d,min = Si/xd,max



Ox,mindtot 'C1

'C1

'C1

C’Ox

C’d,min

L25 17Nov2010 11

Differential chargesfor low and high freq

From Fig 10.27*

high freq.

L25 17Nov2010 12

Ideal low-freqC-V relationship

Fig 10.25*

L25 17Nov2010 13

Comparison of lowand high freq C-VFig 10.28*

L25 17Nov2010 14

Effect of Q’ss onthe C-V relationshipFig 10.29*

L25 17Nov2010 15

Approximation concept“Onset of Strong Inv”• OSI = Onset of Strong Inversion occurs

when ns = Na = ppo and VG = VTh

• Assume ns = 0 for VG < VTh

• Assume xdepl = xd,max for VG = VTh and it doesn’t increase for VG > VTh

• Cd,min = Si/xd,max for VG > VTh

• Assume ns > 0 for VG > VTh

L25 17Nov2010 16

MOS Bands at OSIp-substr = n-channel

Fig 10.9*

2q|p|

qp

xd,max

L25 17Nov2010 17

Computing the D.R. W and Q at O.S.I.

Ex

Emax

x

aSi

x Nq

dxdE

a

pSid qN

x

22

,max

parea 2

,max,max' dad xqNQ

L25 17Nov2010 18

Calculation of thethreshold cond, VT

Ox the across Q' induce to added

voltage the isV where V,VV

sub)-p sub,-(n xNqQ' is

charge extra the and x of value

the reached has region depletion

The inverted. is surface the when

reached is condition threshold The

d,max

FBT

d,maxBd,max

d,max

L25 17Nov2010 19

Equations forVT calculation

substr-n for 0 substr,- p for 0V

qN

22x ,xNqQ'

0nN

V 0Nn

V

C

Q2VV substrnp

da

npd,maxd,maxa,dd,max

i

dtn

a

itp

Ox

dnpFBT

,

,

',max

,

,ln,ln

':,

L25 17Nov2010 20

Fully biased n-MOScapacitor

0y

L

VG

Vsub=VB

EOx,x> 0

Acceptors

Depl Reg

e- e- e- e- e- e- n+

n+

VS VD

p-substrate

Channel if VG > VT

L25 17Nov2010 21

MOS energy bands atSi surface for n-channel

Fig 8.10**

L25 17Nov2010 22

Computing the D.R. W and Q at O.S.I.

Ex

Emax

x

aSi

x Nq

dxdE

a

SBpSid qN

VVx

)(22,max

)(2 SBp VVarea

,maxda,maxd xqNQ

L25 17Nov2010 23

Q’d,max and xd,max forbiased MOS capacitor

Fig 8.11**

xd,max

(m) )2-

d,max

(cm

q

Q'

L25 17Nov2010 24

Fully biased n-channel VT calc

0V ,

qN

VV22x

,xNqQ' ,0Nn

lnV

VV'C

'Q2VVV

VV :substratep

a

CBpd,max

d,maxad,maxa

itp

FBOx

,maxdpFBCT

Tthreshold at ,G

L25 17Nov2010 25

n-channel VT forVC = VB = 0

Fig 10.20*

L25 17Nov2010 26

Fully biased p-channel VT calc

0V ,

qNVV22

x

,xNqQ' ,0nN

lnV

VV'C

'Q2VVV

VV :substraten

d

BCnd,max

d,maxdd,maxi

dtn

FBOx

,maxdnFBCT

Tthreshold at ,G

L25 17Nov2010 27

p-channel VT forVC = VB = 0

Fig 10.21*

L25 17Nov2010 28

n-channel enhancementMOSFET in ohmic region

0< VT< VG

VB < 0

EOx,x> 0

Acceptors

Depl Reg

VS = 0 0< VD<

VDS,sate-e- e- e- e- n+

n+

p-substrate

Channel

L25 17Nov2010 29

Conductance ofinverted channel• Q’n = - C’Ox(VGC-VT)

• n’s = C’Ox(VGC-VT)/q, (# inv elect/cm2)

• The conductivity n = (n’s/t) q n

• G = n(Wt/L) = n’s q n (W/L) = 1/R, so

• I = V/R = dV/dR, dR = dL/(n’sqnW) WdV VVV'CdLI nTCG

L

0

V

VOx

D

S

L25 17Nov2010 30

Basic I-V relationfor MOS channel

2TGOxn

satDD

TGsatDSDS

satDSDD

nTGsatDSDS

TGDS2

DSDSTGOxn

D

VVL2CW

II

so VVVV for

,VI by given be I let so

Sat0LyQ' VVVV At

VVV VVVV2L2CW

I

'

.,

,'

,

,

,

,

L25 17Nov2010 31

I-V relation for n-MOS (ohmic reg)

2TGSOxn

sat,D

sat,DSDS

Lys,sat,DS

sat,DSTGDS

2DSDSTG

OxnD

VVLW

2'C

I

VV for const is

curr. channel that assume

0n' ,V At

physical.-non is result

,VVVV

for Note .VVVV2LW

2'C

I

ID

VDSVDS,sat

ID,sat

ohmic

non-physical

saturated

L25 17Nov2010 32

References

* Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997.

**Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986

EE 5340 Semiconductor Device Theory Lecture 25 - Fall 2010

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