EE 5340 Semiconductor Device Theory Lecture 15 – Spring 2011
EE 4345 – Semiconductor Electronics Design Project
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Transcript of EE 4345 – Semiconductor Electronics Design Project
EE 4345 – Semiconductor Electronics Design Project
Transistor Current Sources and Active Loads
Anuj Shah
Himanshu Doshi
Jayaprakash Chintamaneni
Nareen Katta
Nikhil Patel
Preeti Yadav
Current sources made by using active devices have come to be widely used in
analog integrated circuits as Biasing elements and as load devices for amplifier
stages
The use of current sources in biasing can result in superior insensitivity of circuit
performance to power supply variations and to temperature
Current Sources
A simple 2-transistor current source
Simple current source
Since Q1 and Q2 have the same base-emitter voltage.
Their collector currents are equal, Ic1=Ic2
Summing currents at the collector of Q1 gives,
Thus, For identical devices Q1 and Q2, the output and the reference
Currents are equal
02 11
f
ccref
III
21 21
c
f
refc I
II
R
onVVII beccrefc
)(2
Collector characteristics for an npn transistor
Norton equivalent representationOf a transistor current source
Thevenin equivalent Representation of a Transistor current source
Simple current source with current gain
The collector current Ic2 is different form the reference Current by a factor [ 1 + ( 2/ßf )]
The emitter current of the transistor Q3 is given by,
Summing currents at the collector of Q1,
Since Ic1 and Ic2 are equal,
Thus, the reference and the output current differ only by a factor of 1/ßf
2
f
c
f
c
f
c III
221 2
0)1(
2 21
ff
ccref
III
ff
refco
III
2
2 21
Widlar current source
Widlar current source
Assuming that the transistors are identical and that Vce2 is high enough
to allow Q2 to operate in the active region,The collector current of Q2
is given by,
T
besc V
VII 2
2 exp
S
cTbe I
IVV 2
2 ln
S
CTbe I
IVV 1
1 ln
Voltage equation around the base-emitter loop gives,
Solving for R2 gives
Neglecting the base currents,
2221 ebebe IRVV
2
1
22 ln
C
C
c
T
I
I
I
VR
1
11 R
VVII beccrefc
Design a widlar current source , given Vcc=15volts. Assume identical transistors.Also, design a 10uA current mirror and compare total resistance required in the two circuits.
Let Iref =1mA
Design of current mirror,
k
A
mA
I
IVR
c
cT 12
10
1ln025.0ln
2
12
MA
vv
I
VVR
ref
becc 45.110
5.015
kmA
vv4.14
1
6.015
Cascode current source with bipolar transistors
Performing a full small-signal analysis on this circuit, including the finite
small-signal resistance of Q1 and Q4
We obtain, Ro =ß0 r0/2
Bipolar Wilson current source
Conventional Differential Amplifier
T
cccmdm V
RIRgA
Resistors are used as load elements
Large Voltage Gain – requires large power-supply voltage and
large values of resistors
Example:
A voltage gain of 500 would require and , Rc would have to be
VRI cc 13
AIc 100 K130
Current Sources as Active Load
Common-Emitter Amplifier with Active Load
Emitter-Coupled Pair with Active Load
Input Offset Voltage of the Emitter-Coupled Pair with
Active Load
Common-Mode Rejection Ratio of the Emitter-Coupled
Pair with Active Load
Common-Source Amplifier with Active Load
]),[( 2121
12
21
BEcecccc
ceccce
cc
VVVII
VVV
II
Fig.Common-emitter amplifier with active load
Transistors NPN PNPInitially at Vi=0 at point 1 Off Saturates As Vi Increases at point 2 On On at point 3 On On at point 4 Saturated Saturated
Fig.npn collector characteristic with pnp Load line superimposed
AP
ce
T
besc
AN
ce
T
isc
V
V
V
VII
V
V
V
VII
2222
111
1exp
1exp
AP
onBE
T
BEscref V
V
V
VIII )(3
23 1exp
02
01
VVV
VV
ccce
ce
Large – Signal Model
]
exp
1[)]([1
)()(0ref
T
is
effAAPAN
ANonBEcc I
VV
I
VVV
VVVV
)(, )(APAN
APANeffA VV
VVVWhere
][][ )(0)( satCEsatCECC VVVV &
)]([ )(0APAN
ANonBECC VV
VVVV
Fig.dc transfer characteristics Of common-emitter Amplifier with active load
Typical values for voltage gain are 1000 to 2000 range.
21
1
021
1211 11)||(
mpnpmnpn
m
o
moomv gg
g
rr
grrgA
R0=(ronop+ropon)
Fig.Small-signal equivalent Circuit for common-emitter Amplifier with active load
Drawback:
The quiescent value of the common-mode output voltage is
very
sensitive to the value of the emitter-biasing current source and
the active-load current sources.
Fig.Emitter-coupled pair withActive load
Fig.Common-mode half-circuit for emitter-coupled pair with active load
Output voltage Voc is very sensitive to the voltage at the base of Q6,
which is influence by Iref2.
Example:
If Iref1 and Iref2 are different by 4% , the output voltage Voc will change by
about 2V.
The same change result from a 1mV mismatch between Q6 And Q7.
This circuit eliminates the common-mode problems but
provides
a single output with much better rejection of common-mode
Input signals.
Large signal behavior model
Load resistance is zero.
Vbias is adjusted in order to keep Q2 and Q4 in forward Active region.
Fig.Active-load stage with output connected to a voltage source
)1)((exp 333
AP
ce
T
besc V
V
V
VII )1)((exp 22
2AN
ce
T
besc V
V
V
VII
)1)((exp 444
AP
ce
T
besc V
V
V
VII
ccbebeccce VVVVV 131
)(3 onBEce VV
21 bebeid VVV
T
id
APAN
APAN
T
ideffA
BEcco
V
V
VV
VV
V
VV
onVVV
2tanh1
2tanh2
)()(
APAN
APANeffA VV
VVV
)(
T
ideffABEcco V
VVonVVV
2tanh2)( )(
)()( satCEonBEocc VVVV
where
Early factor is on the order of 2 * 10-4
AP
T
AN
TAPAN
APAN
TT
effAvd
VV
VVVV
VV
VV
VA
11)(
)(1
opnponpnmpnpnpn
vd llrrgA
A
T
V
VrEarlyFacto ,Where
Device Mismatch Effects:
Presence of Component mismatches within the Amplifier itself and drifts
of component values with Temperature produce differential voltages at the output that are indistinguishable from the signal being amplified.
For Transistor Differential Amplifiers the effect of mismatches is represented by two Quantities,the input offset voltage and the input offset current.
Circuit Containing Mismatches Equivalent Circuit with identically matched devices
1
2
2
1
s
s
c
cTOS I
I
I
IVV
Input Offset Voltage is given by the expression
where mVq
kTVT 26 at 300K
Is represents the Saturation Current
nCBBnA
nisn A
VWN
DqnI
2
where
Wb(VCB) is the base width of the function VCB
NA is the acceptor density in the base and A is the emitter Area
Input Offset Voltage of the Emitter Coupled Pair with Active Load
For a Resistive Load the Input Offset Voltage arises mainly due to the
mismatches in Is in the Input Transistors and from mismatches in the
collector load Resistors.
For an Active Load the input offset voltage results from mismatches in the input Transistors and load devices and from the base current of the load devices.
Emitter Coupled Pair with Active Load
Input Offset Voltage of the Emitter Coupled Pair with Active Load
21 cece VV 43 cece VV and
The Collector Current Ic4 is related to Ic3 by
3
434
s
scc I
III
The Collector Current Q2 is equal to (-Ic4) and thus
3
432
s
scc I
III
The Current Ic1 equals (-Ic3),plus the base currents in the pnp transistors
fcc II
2
131
The input offset voltage is given by
fs
s
s
sToc I
I
I
IVV
2
1ln1
2
4
3
In a Worst Case, the Offset Voltage is 0.2VT
These Circuits have significantly higher offset Voltage than the
Resistively loaded case
The offset Voltage can be reduced by inserting resistors in the Emitters of
Q3 and Q4.
Actively Loaded Emitter Coupled Pair for improved Offset
Common-Mode Rejection Ratio of the Emitter Coupled Pair withActive Load
CMRR is defined as the Magnitude of the ratio of differential to Common Mode Gain.
Provides conversion from a differential signal to a signal that is referenced to ground.This type of Conversion is required in all differential input,single-ended output amplifiers.
Simplest differential to single-ended converter is the resistively Loaded emitter coupled pair.
Differential to Single ended ConversionUsing resistively loaded Emitter coupled Pair
Differential to Single ended ConversionUsing actively loaded Emitter coupled Pair
CMRR
VV
AV ic
iddm
o
2
2The output is given by
1
121 EEmRgCMRR
Transistor Q3 operates at twice the current of Q1 and Q2
333
1
om rgCMRR
CMRR of the resistively loaded stage is the inverse of the of the current
source Transistor when a simple current source is used as a biasing element.
For an active-loaded case
In case of Resistively loaded case ,changes in the common Mode input will cause
changes in the bias current IEE because of the finite output resistance of the biasing
current source.This will cause a change in Ic2 and an identical change in Ic1.
Because of the active load ,the change in Ic1 will produce a change in the currents
flowing in the pnp load transistors ,which produces a change in the collecter current
of Q2.So the output does not change at all in response to common Mode Inputs.
Analytically
1
ic
os
cm
dm
V
V
A
ACMRR
Common-Source Amplifier with Active Load
Common Source Amplifier using an NMOS driver and PMOS activeload.
When M1 and M2 are forward active,the small signal gain is
21
1
oo
mv gg
gA
2
1
mb
mv g
gA
Gain for NMOS depletion-load transistor
Common-Source Amplifier with p channel transistorCurrent source load
Transfer Characteristic
I-V Characteristic of n-channel depletion mode load transistor
Common Source Amplifier with depletion mode transistor load and dc transfer characteristic
Common Source Amplifier with Enhancement-Mode load
2
1
2
1
/
/
LW
LW
g
gA
m
mv
Common-Source Amplifier with enhancement-mode load and transfer characteristic
Source Coupled Pair with Active load
42
1
oo
mv gg
gA
Widely used in CMOS Circuit Design
References:
Analysis and Design of Analog Integrated Circuits, 3rd Edition by Paul R.Gray and Robert G.Meyer.
Analog integrated circuit design,1st edition by David Johns and Ken Martin
Electronics,2nd Edition, by Allan R.Hambley