EE 5340 Semiconductor Device Theory Lecture 24 – Spring 2011 Professor Ronald L. Carter

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EE 5340 Semiconductor Device Theory Lecture 24 – Spring 2011 Professor Ronald L. Carter [email protected] http://www.uta.edu/ronc

description

©rlc L24-19Apr20113 Band models (approx. scale) EoEo EcEc EvEv q  ox ~ 0.95 eV metalsilicon dioxidep-type s/c q  m = 4.1 eV for Al EoEo E Fm E Fp EoEo EcEc EvEv E Fi q  s,p q  Si = 4.05eV E g,ox ~ 8 eV

Transcript of EE 5340 Semiconductor Device Theory Lecture 24 – Spring 2011 Professor Ronald L. Carter

Page 1: EE 5340 Semiconductor Device Theory Lecture 24 – Spring 2011 Professor Ronald L. Carter

EE 5340Semiconductor Device TheoryLecture 24 – Spring 2011

Professor Ronald L. [email protected]

http://www.uta.edu/ronc

Page 2: EE 5340 Semiconductor Device Theory Lecture 24 – Spring 2011 Professor Ronald L. Carter

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Ideal 2-terminalMOS capacitor/diode

x

-xox

0SiO2

silicon substrate

Vgate

Vsu

b

conducting gate,area =

LW

tsub

0y

L

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Band models (approx. scale)

Eo

Ec

Ev

qcox

~ 0.95 eV

metal silicon dioxide p-type s/c

qfm= 4.1 eV for Al

Eo

EF

mEFp

Eo

EcEvEFi

qfs,p

qcSi= 4.05eV

Eg,ox

~ 8 eV

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Flat band condition (approx. scale)

Ec,Ox

Ev

Al SiO2 p-Siq(fm-cox)= 3.15 eV

EF

m EFp

Ec

Ev

EFi

q(cox-cSi)=3.1eV

Eg,ox

~8eV

cond band-flat forVVV8.0

V

eV8.0EEThen

eV85.0EEIf

sgMS

fpfmFB

fpfm

fpc

f

ff

qffp= 3.95e

V

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Depletion for p-Si, Vgate> VFB

SiO2

p-type Si

Vgate> VFB

Vsub = 0

EOx,x> 0

x

-xox

0

tsu

b

x,OxSi

OxSi

SiSix,OxOxOxOx

x,Ox

E31E

39.37.11

EE

0xVE

AcceptorsDepl Reg

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Depletion forp-Si, Vgate> VFBFig 10.4b*

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Equivalent circuitfor depletion• Depl depth given by the usual

formula = xdepl = [2Si(Vbb)/(qNa)]1/2

• Depl cap, C’depl = Si/xdepl

• Oxide cap, C’Ox = Ox/xOx

• Net C is the series comb

Oxdepltot 'C1

'C1

'C1

C’Ox

C’depl

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Inversion for p-SiVgate>VTh>VFB

Vgate> VFB

Vsub = 0

EOx,x> 0

inversion for threshold above

E Induced depletes 0

E Induced

0xVE

Si

SiOxOx

x,Ox

Acceptors

Depl Reg

e- e- e- e- e-

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Inversion for p-SiVgate>VTh>VFBFig 10.5*

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Approximation concept“Onset of Strong Inv”• OSI = Onset of Strong Inversion

occurs when ns = Na = ppo and VG = VTh

• Assume ns = 0 for VG < VTh

• Assume xdepl = xd,max for VG = VTh and it doesn’t increase for VG > VTh

• Cd,min = Si/xd,max for VG > VTh • Assume ns > 0 for VG > VTh

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MOS Bands at OSIp-substr = n-channelFig 10.9*

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Equivalent circuitabove OSI• Depl depth given by the maximum

depl = xd,max = [2Si|2fp|/(qNa)]1/2

• Depl cap, C’d,min = Si/xd,max

• Oxide cap, C’Ox = Ox/xOx

• Net C is the series comb

Ox,mindtot 'C1

'C1

'C1

C’Ox

C’d,min

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MOS surface states**p- substr = n-channel

VGS fs Surf chg Carr DenVGS < VFB < 0 fs < 0 Accum. ps > Na

VGS = VFB < 0 fs = Neutral ps = Na

VFB < VGS fs > 0 Depletion ps < Na

VFB < VGS < VTh fs = |fp| I ntrinsic ns = ps = ni

VGS < VTh fs > |fp| Weak inv ni< ns < Na

VGS = VTh fs = 2|fp| O.S.I . ns = Na

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n-substr accumulation (p-channel)Fig 10.7a*

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n-substrate depletion(p-channel)Fig 10.7b*

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n-substrate inversion(p-channel)Fig 10.7*

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Values for gate workfunction, fm

V 17.5q/E :Si-poly pV 05.4 :Si-poly n

V 55.4 :W ,TungstenV 65.5 :Pt ,Platinum

V 6.4 :Mo ,MolybdenumV 1.5 :Au ,Gold

V 28.4 :Al ,umminAlu

gSim

Sim

mm

m

m

m

cf

cf

f

f

f

f

f

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Values for fms

with metal gate

02586.0V ,12.1E ,19E8.2N10E45.1n ,05.4 ,28.4

NNlnV :Si-n to Al

nNlnVq2

EnNNlnV :Note

nNNlnV :Si-p to Al

tgC

iSiAlm,

dCtSiAlm,ms

iat

g2i

aCt

2i

aCtSiAlm,ms

cf

cff

cff

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Values for fms

with silicon gate

ccf

ccf

idt

g

dCt

dCtSi

gSims

iat

g2i

aCt

2i

aCtSiSims

nNlnVq2

ENNlnV :Note

NNlnVq

E :Si-n to poly p

nNlnVq2

EnNNlnV :Note

nNNlnV :Si-p to poly n

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20Fig 10.15*

fms

(V)

NB (cm-3)

Typical fms values

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Flat band with oxidecharge (approx. scale)

Ev

Al SiO2 p-Si

EF

m

Ec,Ox

Eg,ox

~8eV EFp

Ec

Ev

EFi

'Ox

'ss

msOxmsFB

Ox

Oxc

Ox

'ss

x

ssm

ss

CQVV

xV

dxdE

q1QE

surface gate the onis Q'Q' charge

a cond FB at thenbound, Ox/Si the at

is Q' charge a If

ff

q(ffp-cox)q(Vox

)q(fm-

cox)

q(VFB

) VFB= VG-VB, when Si bands

are flat

Ex

+<--Vox-->-

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References* Semiconductor Physics & Devices,

by Donald A. Neamen, Irwin, Chicago, 1997.

**Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986