CMOS Process Integration
Transcript of CMOS Process Integration
FOR 28NM NODE LOGICCMOS Process Integration
One Day
This course presents a clear and technically current description of the 28nm node fabrication process for Logic as well as an introduction to 22nm FinFet processing.
Jerry Healey / Threshold Systems
[email protected] • 512-576-6404
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Learn about the fabrication and Process Integration challenges of the 28nm node.
COURSE OFFERING
Threshold Systems, Inc.
PO Box 1946
Austin, TX 78767
512-576-6404
© 2013 Threshold Systems. All rights reserved.
www.ThresholdSystems.com
FOR 28NM NODE LOGICCMOS Process Integration
1) To provide a detailed understanding of Silicon processing from an important perspective: a detailed step-by-step description of the IC manufacturing process for a 28nm planar Logic device
2) To present a detailed description of the unique structural characteristics and processing requirements for each module in a 28nm node front-end and back-end process
3) To present an introduction to the 22nm node and an examination of the Intel 22nm FinFet implementation
Designers, R&D, Product, Device, Test and Process engineers, managers and other personnel who desire a deeper understanding 28nm planar Logic and an introduction to 22nm FinFet fabrication.
Driving Forces:• The underlying technical forces driving the direction of microchip evolution
28nm Process Integration; the Front End:• Introduction to the basic modules• Shallow Trench Isolation• Ion implantation details: modern Extension, Halo and Contact implants• Double patterning and the maintenance of critical dimension control• Planar gate electrode formation - hard masks and double patterning• Gate-first integration methodology• Replacement gate (gate-last) integration methodology• High-k/metal gate integration strategies• Strained silicon using SiC and SiGe replacement Source/Drains
28nm Process Integration; the Back End:• Tungsten contact plugs, and tungsten trench contacts• The Dual Damascene process: metal masks, Ta/TaN barrier deposition,
Copper deposition and polish• New metal resistance modalities: surface and grain boundary scattering
An Introduction to 22nm FinFets:• An overview of the FinFet manufacturing process• The Intel 22nm FinFet implementation: choices, challenges and
compromises
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Threshold Systems, Inc.
PO Box 1946
Austin, TX 78767
512-576-6404
www.ThresholdSystems.com
The course content is presented in a clear, highly visual and easy-to-understand manner. It is taught by a world-class instructor who has over 20 years of hands-on experience in the field of silicon fabrication and who is an award winning public speaker.
The course notes are technically current, reproduced in high resolution color and profusely illustrated with high-quality graphics and TEMs of real-world devices.
© 2013 Threshold Systems. All rights reserved.