Zebrev Interface Trap Extraction MIEL May 2012

7/31/2019 Zebrev Interface Trap Extraction MIEL May 2012

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2828thth International Conference on MicroelectronicsInternational Conference on Microelectronics,, 1515 MayMay [email protected]@mephi.ru 0

GG.. I.I. ZebrevZebrev, E. A., E. A. MelnikMelnik,,

D.K.D.K. BatmanovaBatmanova

NATIONAL RESEARCH NUCLEAR UNIVERSITY MEPHINATIONAL RESEARCH NUCLEAR UNIVERSITY MEPHI

MOSCOW, RUSSIAMOSCOW, RUSSIA


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Introduction

Graphene fieldGraphene field--effect deviceseffect devices

- Interface Traps Problem is Unavoidable

Scourge of all Field-Effect Devices

- Interface Traps in FETs determine a shapeof:

- Transfer I-V transfer characteristics(transconductance and field-effectmobility)

- Low-frequency C-V gatecharacteristics

The purpose is characterization of interface trap

energy density based on low-freq C-V curves


4/112828thth International Conference on MicroelectronicsInternational Conference on Microelectronics,, 1515 MayMay [email protected]@mephi.ru 3

INTERFACE TRAPS

Cit=e2Dit

Interface Trap DOS

(localized carriers)

t

F

CQ=e2dnS/d F

Graphene DOS

(mobile carriers)

VNP

Defect

level

Reversible carrier exchangebetween graphene and interfacial

defects

EF

VNP

VG >VNP

EF

t t

VG < VNP

(a)

(a) (b)

++++++

-----------

VG

GRAPHENE



doxGATE OXIDE

GRAPHENE

eVG>0

F raphene

e gate graphene)

EF

EV

EC

S

F

const(x)

Ei

Chemical potential

INTERFACE TRAPS in GRAPHENE& Si-MOS FETs

Main Differences for graphene:

Main Similarity: Occupancy of Interface traps is controlledby the Fermi energy position at the interface

1. No depletion layer (stems from monolayer nature)

2. Huge role of quantum capacitance (stems from absenceof forbidden gap )



GATE and CHANNEL capacitance in FEDs

1

1 1GATEGG ox Q it

e NCV C C C

ox QSCH

G Q ox it

C Ce nCV C C C

1G it

CH Q

C C

C C

Gate Capacitance (from C-V exp-ts)

Channel Capacitance (fromI-V exp-ts )

Coincided at Cit = 0!

Similar but not the same!

1. Gate capacitance CG increases with Cit (Input capincreases)

2. Channel capacitance CCH decreases with Cit,

transconductance gm and field-effect mobility degrade ( )

0 1oxox

ox ox

Cd d

Gate Capacitance is the quantity immediately

measured from C-V experiments and not Cox!



COMPARISON OF CAPACITANCESIN GFET AND MOSFETS

Quantumcapacitance isahugeproblemingraphene

A.Geim2 S

Q

F

dnC e

d

Quantum capacitance CQsimilar to inversion layer cap in

Si-MOSFET which traditionally

ignored in Si electronics. Why?

CIT

CQin grapheneCinv in MOSFETs

Threshold in

MOSFETNo threshold inGFET

Cinv>> Cox

Cox

Cinv



BERGLUND TECHNIQUE in GRAPHENE

22

0

F

S

G NP it F

ox ox

e nee V V D d

C C

1Q F it F G

F ox

C CdVe

d C

1Git ox QF

dVC C C

d

1Git ox D

S

dVC C C

d

Si-MOS in subthreshold modeGraphene FET equivalent circuit

Berglund technique in Si-MOS

Depletion layercap

Quantum cap

Berglund technique in graphene



Fermi energy as function of gate bias extractedfrom low-frequency C-V curves

/

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G

NP

LFVG G

F G G

oxV

C VV dV

C

To obtain Cit one needs to know

F(VG)The F(VG) dependence extractedimmediately from experimentallow-freq C-V curve

The F(VG) is simply square of theshaded area

Numerical analysis yields:


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Results and Unresolved Problems

80( 1.0 10 / )QC v cm s

(exp)G

Q it G

F

dVC C Cd e

Self-consistent description of C-V date from two independentexperimental groups imposes limitation on the lower magnitude of v0 !

itC

80( 1.3 10 / )QC v cm s


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CONCLUSIONS

Low frequency C-V method of interface trap

density characterization in graphene field-

effect devices has been proposed

Similarities and differences between

graphene and silicon FETs are discussedIt was found that uncertainty in graphenevelocity numerical value directly influenceson uncertainty in interface trap densityspectrum

Zebrev Interface Trap Extraction MIEL May 2012

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