Vetri Main

8/13/2019 Vetri Main

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CHAPTER 1

INTRODUCTION

Embedded technology plays a major role in integrating the various

function associating with it.Finger print is the process of identification based on the

impression of the end of the fingers.Finger print is most important in places where

human identify is required.

The new method replaces the existing card system misuses of the

unauthorized person with help of the human finger as the AT card. A high

quality finger print scanner is used to scan the finger print !mage and chec" with

the existing database of the account holder#s han"$ if the account holder already

exists ban" activities are done. !f the account does not exist$ the person is unable to

do any ban"ing process any unauthorized person try to access the account$ a buzzer

will blow to alert the security system.

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CHAPTER 2

LITERATURE REVIEW

!n day today life the usage of AT center has been increased$ &o the people

are unable to bring the AT card everytime. !n our method they are provided

finger print method instead of pin number .!f the customer cant bring the AT

card they cant be able to axis the AT $their was the major drawbac" of the older

project.

'ut our project over come these disadvantage. we are providing finger print

instead of AT card every time. And also we provide the ban" code for

identification of the account. 'y using our methodology a handfree person can axis

the AT service for AT customer.

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CHAPTER 3

FINGER PRINT IDENTIFICATION TECHNOLOGY USED IN ATM

SYSTEM

This chapt! "a#s $ith %asic &p!ati&' &( th t!a's)itt! a'" !ci*!

scti&' +s" i' (i',! p!i't i"'ti(icati&' tch'&,- +s" i' ATM s-st).

3.1 /LOC0 DIAGRAM DESCRIPTION

!)*+

)+,T*+--E*

ey pad

'uzzer

!nterfacing

)ircuit

Finger /rint&canner

-evel

converter

-)0

1


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3.1.1 FINGER PRINT SCANNER

H&$ It W&!s.

The technology that powers the 0igital /ersona /ro has been developed over

the last decade by the leading experts in fingerprint biometric technology. The

0igital /ersona fingerprint algorithms have been used by over 23 million users

worldwide and power the fingerprint readers in the leading laptops in the mar"et

today. 0igital /ersona#s biometric technology is the leading solution in the

mar"etplace and provides the utmost accuracy while ensuring the highest4level of

user privacy protection.

T+!'i', Fi',!p!i'ts i't& P!& I"'tit- T)p#ats

!mage )apture !mage /rocessing TemplateEncrypted 'inary

Template

5hen users wish to authenticate 6for login$ secure communications$ multi4

factor authentication or transaction accountability7$ they touch the fingerprint

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reader. A template representing their fingerprint is created and compared against a

template established during user enrollment$ a simple procedure for users. !f the

templates match$ the 0igital /ersona /ro client software ta"es appropriate action$

such as writing an audit trail$ logging the user in or as"ing for other authentication

information such as a /!, 6depending upon policies set by the administrator7.

)lient4side caching of templates ensures that fingerprints can be used even when

the computer is not connected to the corporate networ".

Si)p# Dp#&-)'t &' Eisti', I'(!ast!+ct+!9

0igital /ersona /ro is designed to wor" with existing /)s$ servers$networ"s$ and applications without the need for extensive consulting or custom

programming. )lient software can be easily deployed wherever needed through

existing mechanisms for distributing standard &! files$ including Active

0irectory :roup /olicy +bjects 6:/+s7$ &&$ or other software distribution tools.

/ro;s +ne Touch &ign+n feature simplifies and secures access to

password4protected$ third4party software programs and 5eb sites.


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0igital/ersona /ro is certified by icrosoft to extend the Active 0irectory

schema to store biometric data in each user;s data records. 0igital/ersona /ro uses

the native user interface of Active 0irectory$ eliminating the need to learn new

tools. Administrators can use the Active 0irectory :roup /olicy Editor to create

:/+s for tailoring the behavior and functionality of 0igital/ersona /ro. This

familiar point4and4clic" interface ma"es it easy to configure or ma"e changes for

groups of users anywhere in the organization;s networ".

0igital/ersona /ro integrates tightly into 5indows security services to

ensure that all data and communication is encrypted and signed$ and that only the

appropriate security principles can read?write?access stored credentials in Active

0irectory. All events are logged via 5indows event log so that /ro events can

interoperate with standard intrusion detection and enterprise security audit

tools.For enterprise scalability$ 0igital/ersona /ro leverages the service

publication method of Active 0irectory and 0,&.

5hen each /ro authentication server is installed$ a service record is posted

in 0,& which provides a route for any client to find it in the networ". The

administrator does not need to configure each client individually. This

accomplishes both enterprise4class fault tolerance and linear scalability$ since the

client can automatically failover to another server if one has too much load or is

unavailable.

3.1.2 MICROCONTROLLER 4C51

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PIN DESCRIPTION6

VCC 7 &upply voltage. GND 7 :round.

PORT 86

/ort 3 is an D4bit open4drain bi4directional !?+ port. As an output port$ each

pin can sin" eight TT- inputs. 5hen %s are written to port 3 pins$ the pins can be

used as high impedance inputs. /ort 3 may also be configured to be the

multiplexed low order address?data bus during accesses to external program and

data memory. !n this mode /3 has internal pull4ups. /ort 3 also receives the code

bytes during Flash programming$ and outputs the code bytes during program

verification. External pull4ups are required during program verification.

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PORT 1

/ort % is an D4bit bi4directional !?+ port with internal pull4ups. The /ort %

output buffers can sin"?source four TT- inputs. 5hen %s are written to /ort % pins

they are pulled high by the internal pull4ups and can be used as inputs. As inputs$

/ort % pins that are externally being pulled low will source current 6!!-7 because of

the internal pull4ups /ort % also receives the low4order address bytes during Flash

programming and verification.

PORT 2

/ort ( is an D4bit bi4directional !?+ port with internal pull4ups. The /ort (

output buffers can sin"?source four TT- inputs. 5hen %s are written to /ort ( pins


/ort ( pins that are externally being pulled low will source current 6!!-7 because of

the internal pull4ups.

/ort ( emits the high4order address byte during fetches from external

program memory and during accesses to external data memory that uses %@4bit

addresses 6+G H 0/T*7. !n this application$ it uses strong internal pull4ups

when emitting %s. 0uring accesses to external data memory that uses D4bit

addresses 6+G H *!7$ /ort ( emits the contents of the /( &pecial Function

*egister. /ort ( also receives the high4order address bits and some control signals

during Flash programming and verification.

PORT 3

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/ort 1 is an D4bit bi4directional !?+ port with internal pull4ups. The /ort 1

output buffers can sin"?source four TT- inputs. 5hen %s are written to /ort 1 pins


/ort 1 pins that are externally being pulled low will source current 6!!-7 because of

the pull4ups. /ort 1 also serves the functions of various special features of the

ATD2)>% as listed belowB /ort 1 also receives some control signals for Flash

programming and verification.

Table 1.% /in )onfigurations +f /ort 1

RST

*eset input. A high on this pin for two machine cycles while the oscillator is

running resets the device.

ALE9PROG

Address -atch Enable output pulse for latching the low byte of the address

during accesses to external memory. This pin is also the program pulse input

6/*+:7 during Flash programming. !n normal operation A-E is emitted at a

constant rate of %?@ the oscillator frequency$ and may be used for external timing or

cloc"ing purposes. ,ote$ however$ that one A-E pulse is s"ipped during each

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access to external 0ata emory. !f desired$ A-E operation can be disabled by

setting bit 3 of &F* location DEC. 5ith the bit set$ A-E is active only during a

+G or +) instruction. +therwise$ the pin is wea"ly pulled high. &etting the

A-E4disable bit has no effect if the microcontroller is in external execution mode.

PSEN

/rogram &tore Enable is the read strobe to external program memory. 5hen

the ATD2)>% is executing code from external program memory$ /&E, is activated

twice each machine cycle$ except that two /&E, activations are s"ipped during

each access to external data memory.

EA9VPP

External Access Enable. EA must be strapped to :,0 in order to enable the

device to fetch code from external program memory locations starting at 3333C up

to FFFFC. ,ote$ however$ that if loc" bit % is programmed$ EA will be internally

latched on reset. EA should be strapped to )) for internal program executions.

This pin also receives the %(4volt programming enable voltage 6//7 during Flash

programming$ for parts that require %(4volt //.

:TAL1

!nput to the inverting oscillator amplifier and input to the internal cloc"

operating circuit.

:TAL2

+utput from the inverting oscillator amplifier.

%%


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OSCILLATOR CHARACTERISTICS

GTA-% and GTA-( are the input and output$ respectively$ of an inverting

amplifier which can be configured for use as an on4chip oscillator$ as shown in

Figure %. Either quartz crystal or ceramic resonator may be used. To drive the

device from an external cloc" source$ GTA-( should be left unconnected while

GTA-% is driven as shown in Figure (. There are no requirements on the duty

cycle of the external cloc" signal$ since the input to the internal cloc"ing circuitry

is through a divide4by4two flip4flop$ but minimum and maximum voltage high and

low time specifications must be observed.

OSCILLATOR CONNECTIONS6

Figure 3.; Osci##at&! C&''cti&'s

IDLE MODE

!n idle mode$ the )/< puts itself to sleep while all the on chip peripherals

remain active. The mode is invo"ed by software. The content of the on4chip *A

and the entire special functions registers remain unchanged during this mode.

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The idle mode can be terminated by any enabled interrupt or by a hardware

reset. !t should be noted that when idle is terminated by a hard ware reset$ the

device normally resumes program execution$ from where it left off$ up to two

machine

cycles before the internal reset algorithm ta"es control. +n4chip hardware

inhibits access to internal *A in this event$ but access to the port pins is not

inhibited. To eliminate the possibility of an unexpected write to a port pin when

!dle is terminated by reset$ the instruction following the one that invo"es !dle

should not be one that writes to a port pin or to external memory.

Fi,+! 3.5 Et!'a# C#&c D!i* C&'(i,+!ati&'

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Fi,+! 3.< /#&c Dia,!a) O( Mic!&c&'t!#! 4c51

%8


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The ATD2)>% provides the following standard featuresB 8 bytes of Flash$

%(D bytes of *A$ 1( !?+ lines$ two %@4bit timer?counters$ five vector two4level

interrupt architecture$ a full duplex serial port$ and on4chip oscillator and cloc"

circuitry. !n addition$ the ATD2)>% is designed with static logic for operation

down to zero frequency and supports two software selectable power saving modes.

The !dle ode stops the )/< while allowing the *A$ timer?counters$ serial port

and interrupt system to continue functioning. The /ower 0own ode saves the

*A contents but freezes the oscillator disabling all other chip functions until the

next hardware reset

POWER7DOWN MODE6

!n the power4down mode$ the oscillator is stopped$ and the instruction that

invo"es power4down is the last instruction executed. The on4chip *A and

&pecial Function *egisters retain their values until the power4down mode is

terminated. The only exit from power4down is a hardware reset. *eset redefines

the &F*s but does not change the on4chip *A. The reset should not be activated

before )) is restored to its normal operating level and must be held active long

enough to allow the oscillator to restart and stabilize.

PROGRAM MEMORY LOC0 /ITS6

+n the chip are three loc" bits which can be left unprogrammed 6


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PROGRAMMING THE FLASH

The ATD2)>% is normally shipped with the on4chip Flash memory array in

the erased state 6that is$ contents I FFC7 and ready to be programmed. The

programming interface accepts either a high4voltage 6%(4volt7 or a low4voltage

6))7 program enable signal. The low voltage programming mode provides a

convenient way to program the ATD2)>% inside the user#s system$ while the high4

voltage programming mode is compatible with conventional third party Flash or

E/*+ programmers. The ATD2)>% is shipped with either the high4voltage or

low4voltage programming mode enabled. The respective top4side mar"ing and

device signature codes are listed in the following table.

The ATD2)>% code memory array is programmed byte4by byte in either

programming mode. To program any nonblan" byte in the on4chip Flash emory$

the entire memory must be erased using the )hip Erase ode.

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PROGRAMMING ALGORITHM6

'efore programming the ATD2)>%$ the address$ data and control signals

should be set up according to the Flash programming mode table and Figures 1 and

8. To program the ATD2)>%$ ta"e the following steps.

!nput the desired memory location on the address lines.

!nput the appropriate data byte on the data lines.

Activate the correct combination of control signals.

*aise EA?// to %( for the high4voltage programming mode.

/ulse A-E?/*+: once to program a byte in the Flash array or the loc" bits.

The byte4write cycle is self4timed and typically ta"es no more than %.>ms.

*epeat steps % through >$ changing the address and data for the entire array

or until the end of the object file is reached.

DATA POLLING6

The ATD2)>% features 0ata /olling to indicate the end of a write cycle.

0uring a write cycle$ an attempted read of the last byte written will result in the

complement of the written datum on /+.. +nce the write cycle has been

completed$ true data are valid on all outputs$ and the next cycle may begin. 0ata

/olling may begin any time after a write cycle has been initiated.

READY9/USY6

The progress of byte programming can also be monitored by the *0J?'&J

output signal. /1.8 is pulled low after A-E goes high during programming to

indicate '


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PROGRAM VERIFY6

!f loc" bits -'% and -'( have not been programmed$ the programmed code

data can be read bac" via the address and data lines for verification. The loc" bits

cannot be verified directly. erification of the loc" bits is achieved by observing

that their features are enabled.

CHIP ERASE6

The entire Flash array is erased electrically by using the proper combination

of control signals and by holding A-E?/*+: low for %3ms. The code array is

written with all K%Ls. The chip erase operation must be executed before the code

memory can be re4programmed.

READING THE SIGNATURE /YTES6

The signature bytes are read by the same procedure as a normal verification

of locations 313C$ 31%C$ and 31(C$ except that /1.@ and /1. must be pulled to a

logic low. The values returned are as follows.

6313C7 I %EC indicates manufactured by Atmel

631%C7 I >%C indicates D2)>%

631(C7 I FFC indicates %( programming

631(C7 I 3>C indicates > programming

PROGRAMMING INTERFACE

Every code byte in the Flash array can be written and the entire array can be

erased by using the appropriate combination of control signals. The write operation

cycle is self timed and once initiated$ will automatically time itself to completion.

All major programming vendors offer worldwide support for the Atmel

microcontroller series. /lease contact your local programming vendor for the

appropriate software revision.

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SPECIAL FUNCTION REGISTERS

A map of the on4chip memory area called the &pecial Function

*egister 6&F*7. ,ote that not all of the addresses are occupied$ and unoccupied

addresses may not be implemented on the chip. *ead accesses to these addresses

will in general return random data$ and write accesses will have an indeterminate

effect.


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For example$ the following direct addressing instruction accesses the &F* at

location 3A3C 6which is /(7.

+ 3A3C$ Mdata

!nstructions that use indirect addressing access the upper %(D bytes of *A. For

example$ the following indirect addressing instruction$ where *3 contains 3A3C$

accesses the data byte at address 3A3C$ rather than /( 6whose address is 3A3C7.

+ H*3$ Mdata

,ote that stac" operations are examples of indirect addressing$ so the upper %(D

bytes of data *A are available as stac" space.

TIMER 8 AND 1

Timer 3 and Timer % in the ATD2)>( operate the same way as Timer 3 and

Timer % in the ATD2)>%.

TIMER 2

Timer ( is a %@4bit Timer?)ounter that can operate as either a timer or an

event counter. The type of operation is selected by bit )?T( in the &F* T()+,

6shown in Table (7. Timer ( has three operating modesB capture$ auto4reload 6up or

down counting7$ and baud rate generator. The modes are selected by bits in

T()+,$ as shown in Table 1. Timer ( consists of two D4bit registers$ TC( and

T-(. !n the Timer function$ the T-( register is incremented every machine cycle.

&ince a machine cycle consists of %( oscillator periods$ the count rate is %?%( of the

oscillator frequency.

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!n the )ounter function$ the register is incremented in response to a %4to43

transition at its corresponding external input pin$ T(. !n this function$ the external

input is sampled during &>/( of every machine cycle. 5hen the samples show a

high in one cycle and a low in the next cycle$ the count is incremented. The new

count value appears in the register during &1/% of the cycle following the one in

which the transition was detected. &ince two machine cycles 6(8 oscillator periods7

are required to recognize a %4to43 transition$ the maximum count rate is %?(8 of the

oscillator frequency. To ensure that a given level is sampled at least once before it

changes$ the level should be held for at least one full machine cycle.

CAPTURE MODE

!n the capture mode$ two options are selected by bit EGE,( in T()+,. !f

EGE,( I 3$ Timer ( is a %@4bit timer or counter which upon overflow sets bit TF(

in T()+,. This bit can then be used to generate an interrupt. !f EGE,( I %$ Timer

( performs the same operation$ but a %4to43 transition at external input T(EG also

causes the current value in TC( and T-( to be captured into *)A/(C and

*)A/(-$ respectively. !n addition$ the transition at T(EG causes bit EGF( in

T()+, to be set. The EGF( bit$ li"e TF($ can generate an interrupt.

AUTO7RELOAD =UP OR DOWN COUNTER>

Timer ( can be programmed to count up or down when configured in its %@4

bit auto4reload mode. This feature is invo"ed by the 0)E, 60own )ounter

Enable7 bit located in the &F* T(+0 6see Table 87.


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TIME IN CAPTURE MODE6

Fi,+! 3.? Ti) I' Capt+! M&"

Timer ( automatically counting up when 0)E, I 3. !n this mode$ two

options are selected by bit EGE,( in T()+,. !f EGE,( I 3$ Timer ( counts up to

3FFFFC and then sets the TF( bit upon overflow. The overflow also causes the

timer registers to be reloaded with the %@4bit value in *)A/(C and *)A/(-. The

values in Timer in )apture ode*)A/(C and *)A/(- are preset by software. !f

EGE,( I %$ a %@4bit reload can be triggered either by an overflow or by a %4to43

transition at external input T(EG.

This transition also sets the EGF( bit. 'oth the TF( and EGF( bits can

generate an interrupt if enabled. &etting the 0)E, bit enables Timer ( to count up

or down$ as shown in Figure 1. !n this mode$ the T(EG pin controls the direction of

the count. -ogic % at T(EG ma"es Timer ( count up. The timer will overflow at

3FFFFC and set the TF( bit. This overflow also causes the %@4bit value in

*)A/(C and *)A/(- to be reloaded into the timer registers$ TC( and T-($

respectively. -ogic 3 at T(EG ma"es Timer ( count down.

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The timer underflows when TC( and T-( equal the values stored in

*)A/(C and *)A/(-. The underflow sets the TF( bit and causes 3FFFFC to be

reloaded into the timer registers. The EGF( bit toggles whenever Timer (

overflows or underflows and can be used as a %th bit of resolution. !n this

operating mode$ EGF( does not flag an interrupt.

PROGRAMMA/LE CLOC0 OUT

A >3N duty cycle cloc" can be programmed to come out on /%.3$ as shown

in Figure >. This pin$ besides being a regular !?+ pin$ has two alternate functions. !t

can be programmed to input the external cloc" for Timer?)ounter ( or to output a

>3N duty cycle cloc" ranging from @% Cz to 8Cz at a %@ Cz operating

frequency. To configure the Timer?)ounter ( as a cloc" generator$ bit )?T(

6T()+,.%7 must be cleared and bit T(+E 6T(+0.%7 must be set. 'it T*(

6T()+,.(7 starts and stops the timer.

The cloc"4out frequency depends on the oscillator frequency and the reload value

of Timer ( capture registers 6*)A/(C$ *)A/(-7$ as shown in the following

equation

!n the cloc"4out mode$ Timer ( roll4overs will not generate an interrupt. This

behavior is similar to when Timer ( is used as a baud4rate generator. !t is possible

to use Timer ( s a baud4rate generator and a cloc" generator simultaneously. ,ote$

however$ that the baud4rate and cloc"4out frequencies cannot be determined

independently from one another since they both use *)A/(C and *)A/(-.

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UART

The ( operates the same way as the %.

INTERRUPTS

The ATD2)>( has a total of six interrupt vectorsB two external interrupts

6!,T3 and !,T%7$ three timer interrupts 6Timers 3$ %$ and (7$ and the serial port

interrupt. These interrupts are all shown in Figure @. Each of these interrupt

sources can be individually enabled or disabled by setting or clearing a bit in

&pecial Function *egister !E. !E also contains a global disable bit$ EA$ which

disables all interrupts at once. ,ote that Table shows that bit position !E.@ is

unimplemented. !n the ATD2)>%$ bit position !E.> is also unimplemented. /( of the

cycle in which the timers overflow. The values are then polled by the circuitry in

the next cycle. Cowever$ the Timer ( flag$ TF($ is set at &(/( and is polled in the

same cycle in which the timer overflows.

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CHAPTER ;

TRANSFORMER

A t!a's(&!)!is a device that transfers electrical energy from one circuit to

another through inductively coupled wires. A changing current in the first circuit

6the primary7 creates a changing magnetic fieldO in turn$ this magnetic field induces

a changing voltage in the second circuit 6the secondary7. 'y adding a load to the

secondary circuit$ one can ma"e current flow in the transformer$ thus transferring

energy from one circuit to the other. The secondary induced voltage VSis scaled

from the primary VPby a factor ideally equal to the ratio of the number of turns ofwire in their respective windingsB

'y appropriate selection of the numbers of turns$ a transformer thus allows

an alternating voltage to be stepped up 9 by ma"ing NSmore than NP or stepped

down$ by ma"ing it less.

A "ey application of transformers is to reduce the current before transmitting

electrical energy over long distances through wires. ost wires have resistance and

so dissipate electrical energy at a rate proportional to the square of the current

through the wire. 'y transforming electrical power to a high4voltage$ and therefore

low4current form for transmission. )onsequently$ transformers have shaped the

electricity supply industry$ permitting generation to be located remotely from

points of demand. All but a fraction of the world;s electrical power has passed

through a series of transformers by the time it reaches the consumer.

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Transformers are some of the most efficient electrical ;machines;$ with some

large units able to transfer 22.>N of their input power to their output.

Transformers come in a range of sizes from a thumbnail4sized coupling

transformer hidden inside a stage microphone to huge gigavolt4ampere4rated units

used to interconnect portions of national power grids. All operate with the same

basic principles$ though a variety of designs exist to perform specialized roles

throughout home and industry.

/ASIC PRINCIPLES

The transformer is based on two principlesB first$ that an electric current canproduce a magnetic field 6electromagnetism7 and$ second$ that a changing

magnetic field within a coil of wire induces a voltage across the ends of the coil

6electromagnetic induction7. 'y changing the current in the primary coil$ one

changes the strength of its magnetic fieldO since the secondary coil is wrapped

around the same magnetic field$ a voltage is induced across the secondary.

Figure 8.%B An ideal step4down transformer showing magnetic flux in the core

.

(@
http://en.wikipedia.org/wiki/Image:Transformer3d_col3.svg


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INDUCTION LAW6

The voltage induced across the secondary coil may be calculated from

Faraday;s law of induction$ which states that

5here VS is the instantaneous voltage$ NS is the number of turns in the

secondary coil and equals the total magnetic flux through one turn of the coil. !f

the turns of the coil are oriented perpendicular to the magnetic field lines$ the flux

is the product of the magnetic field strength Band the area Athrough which it cuts.

The area is constant$ being equal to the cross4sectional area of the transformer core$

whereas the magnetic field varies with time according to the excitation of the

primary.

&ince the same magnetic flux passes through both the primary and secondary

coils in an ideal transformer$ the instantaneous voltage across the primary winding

equals

Ta"ing the ratio of the two equations for VSand VPgives the basic equation

for stepping up or stepping down the voltage

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TYPES OF TRANSFORMERS

Transformers are constructed so that their characteristics match the

application for which they are intended. The differences in construction may

involve the size of the windings or the relationship between the primary and

secondary windings. Transformer types are also designated by the function the

transformer serves in a circuit$ such as an isolation transformer.

DISTRI/UTION TRANSFORMER

0istribution transformers are generally used in electrical power

distribution and transmission systems. This class of transformer has the highest

power$ or volt4ampere ratings$ and the highest continuous voltage rating. The

power rating is normally determined by the type of cooling methods the

transformer may use. &ome commonly4used methods of cooling are by using oil

or some other heat4conducting material. Ampere rating is increased in a

distribution transformer by increasing the size of the primary and secondary

windingsO voltage ratings are increased by increasing the voltage rating of the

insulation used in ma"ing the transformer.

POWER TRANSFORMER

/ower transformers are used in electronic circuits and come in many

different types and applications. Electronics or power transformers are

sometimes considered to be those with ratings of 133 volt4amperes and below.

These transformers normally provide power to the power supply of an electronic

device$ such as in power amplifiers in audio receivers.

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CLASSIFICATION

The many uses to which transformers are put lead them to be classified in a

number of different waysB

'y power levelB from a fraction of a volt4ampere 6A7 to over a thousand

AO

'y frequency rangeB power4$ audio4$ or radio frequencyO

'y voltage classB from a few volts to hundreds of "ilovoltsO 'y cooling typeB air cooled$ oil filled$ fan cooled$ or water cooledO

'y application functionB such as power supply$ impedance matching$ output

voltage and current stabilizer$ or circuit isolationO

'y end purposeB distribution$ rectifier$ arc furnace$ amplifier outputO

'y winding turns ratioB step4up$ step4down$ isolating 6near equal ratio7$

variable.

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CHAPTER 5

LCD

A #i@+i" c!-sta# "isp#a-6commonly abbreviated LCD7 is a thin$ flat display

device made up of any number of color or monochrome pixels arrayed in front of a

light source or reflector. !t is often utilized in battery4powered electronic devices

because it uses very small amounts of electric power.

O*!*i$

Each pixel of an -)0 typically consists of a layer of molecules aligned

between two transparent electrodes$ and two polarizing filters$ the axes of

transmission of which are 6in most of the cases7 perpendicular to each other. 5ith

no liquid crystal between the polarizing filters$ light passing through the first filter

would be bloc"ed by the second 6crossed7 polarizer.

The surfaces of the electrodes that are in contact with the liquid crystal

material are treated so as to align the liquid crystal molecules in a particular

direction. This treatment typically consists of a thin polymer layer that is

unidirectionally rubbed using$ for example$ a cloth. The direction of the liquid

crystal alignment is then defined by the direction of rubbing.

'efore applying an electric field$ the orientation of the liquid crystal

molecules is determined by the alignment at the surfaces. !n a twisted nematic

device 6still the most common liquid crystal device7$ the surface alignment

directions at the two electrodes are perpendicular to each other$ and so the

molecules arrange themselves in a helical structure$ or twist.

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'ecause the liquid crystal material is birefringent$ light passing through one

polarizing filter is rotated by the liquid crystal helix as it passes through the liquid

crystal layer$ allowing it to pass through the second polarized filter. Calf of the

incident light is absorbed by the first polarizing filter$ but otherwise the entire

assembly is transparent.

5hen a voltage is applied across the electrodes$ a torque acts to align the

liquid crystal molecules parallel to the electric field$ distorting the helical structure

6this is resisted by elastic forces since the molecules are constrained at the

surfaces7. This reduces the rotation of the polarization of the incident light$ and the

device appears gray. !f the applied voltage is large enough$ the liquid crystal

molecules in the center of the layer are almost completely untwisted and the

polarization of the incident light is not rotated as it passes through the liquid crystal

layer.

This light will then be mainly polarized perpendicular to the second filter$

and thus be bloc"ed and the pixel will appear blac". 'y controlling the voltage

applied across the liquid crystal layer in each pixel$ light can be allowed to pass

through in varying amounts thus constituting different levels of gray.The optical

effect of a twisted nematic device in the voltage4on state is far less dependent on

variations in the device thic"ness than that in the voltage4off state.

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'ecause of this$ these devices are usually operated between crossed

polarizer#s such that they appear bright with no voltage 6the eye is much more

sensitive to variations in the dar" state than the bright state7. These devices can

also be operated between parallel polarizer#s$ in which case the bright and dar"

states are reversed. The voltage4off dar" state in this configuration appears blotchy$

however$ because of small thic"ness variations across the device.

'oth the liquid crystal material and the alignment layer material contain

ionic compounds. !f an electric field of one particular polarity is applied for a longperiod of time$ this ionic material is attracted to the surfaces and degrades the

device performance. This is avoided either by applying an alternating current or by

reversing the polarity of the electric field as the device is addressed 6the response

of the liquid crystal layer is identical$ regardless of the polarity of the applied

field7.

5hen a large number of pixels is required in a display$ it is not feasible to

drive each directly since then each pixel would require independent electrodes.

!nstead$ the display is multiplexed. !n a multiplexed display$ electrodes on one side

of the display are grouped and wired together 6typically in columns7$ and each

group gets its own voltage source. +n the other side$ the electrodes are also

grouped 6typically in rows7$ with each group getting a voltage sin". The groups are

designed so each pixel has a unique$ unshared combination of source and sin". Theelectronics or the software driving the electronics then turns on sin"s in sequence$

and drives sources for the pixels of each sin".

1(


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Spci(icati&'s

I)p&!ta't (act&!s t& c&'si"! $h' *a#+ati', a' LCD )&'it&!6

*esolutionB The horizontal and vertical size expressed in pixels 6e.g.$

%3(8x@D7.


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Usi', th LCD M&"+# $ith a' 851 Mic!&c&'t!#!

The -)0 odule can easily be used with an D3>% microcontroller such as

the ATD2)(3>% included with the microcontroller beginner "it.

The -)0 odule comes with a %@ pin connector. This can be plugged into

the breadboard as shown below.

Fi,+! 5.1 -)0 odule

The pins on the %@ pin connector of the -)0 odule are defined below. The

table also shows how to connect each pin to the (3>% microcontroller. To connect

the -)0 odule to a standard 83 pin D3>%$ use the pin names listed below to find

the correct pin number on the D3>% microcontroller. The example programs below

do not need to be modified to wor" with a 83 pin D3>%.

18
http://www.iguanalabs.com/lcdbblrg.jpg


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-)0

)onnectorFunction

(3>%

/in ,umber P

,ame

-)0

)onnectorFunction

(3>%

/in ,umber P

,ame

% 0ata -ine @ %D$ /%.@ %@ -)0 *& $ /1.1

( 0ata -ine % %1$ /%.% %> 0ata -ine > %$ /%.>

1/ower 4

>0)%8

-)0

*ead?5rite@$ /1.(

8,ot

)onnected%1 0ata -ine 3 %($ /%.3

>0isplay

Adjust%( 0ata -ine 8 %@$ /%.8

@ 0ata -ine %2$ /%. %% -)0 Enable D$ /1.8

0ata -ine ( %8$ /%.( %3 0ata -ine 1 %>$ /%.1

D :round 2,ot

)onnected

Table >.( /in )onfigurations +f -)0 0isplay

The basic (3>% configuration is shown below. 'uild this circuit and then

you will be ready to add the -)0 odule.

1>


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Fi,+! 5.3 /in 0iagram +f (3>% -)0 0isplay

)onnect -)0 /in 1 to cc 6> olts7. )onnect -)0 /in D to :round.

)onnect a >%3 ohm resistor between -)0 /in > and ground. )onnect a (.(" ohm

resistor from -)0 /in ( and cc. )onnect a (.(" ohm resistor from -)0 /in %1 to

cc.

1@


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CHAPTER output voltage$ reliable operation

Availability of componentsB Easy to get$ uses only very common basic

components

0esign testingB 'ased on datasheet example circuit$ ! have used this circuit

successfully as part of many electronics projects

ApplicationsB /art of electronics devices$ small laboratory power supply

/ower supply voltageB mA

)omponent costsB Few dollars for the electronics components R the input

transformer cost

12


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CIRCUIT DESCRIPTION6

This circuit is a small R> power supply$ which is useful when

experimenting with digital electronics. &mall inexpensive wall transformers with

variable output voltage are available from any electronics shop and supermar"et.

Those transformers are easily available$ but usually their voltage regulation is very

poor$ which ma"es then not very usable for digital circuit experimenter unless a

better regulation can be achieved in some way. The following circuit is the answer

to the problem.

This circuit can give R> output at about %>3 mA current$ but it can be

increased to % A when good cooling is added to D3> regulator chip. The circuit

has over overload and therminal protection.

Fi,+!


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The capacitors must have enough high voltage rating to safely handle the

input voltage feed to circuit. The circuit is very easy to build for example into a

piece of ero board.

/inout of the D3> regulator !).

%. regulator !)

%33 uF electrolytic capacitor$ at least (> voltage rating

%3 uF electrolytic capacitor$ at least @ voltage rating

%33 nF ceramic or polyester capacitor

8%
http://www.tkk.fi/Misc/Electronics/circuits/7805.gif


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MODIFICATION IDEAS

MORE OUTPUT CURRENT

!f you need more than %>3 mA of output current$ you can update the output current

up to %A doing the following modificationsB

)hange the transformer from where you ta"e the power to the circuit to a

model which can give as much current as you need from output

/ut a heat sin" to the D3> regulator 6so big that it does not overheat because

of the extra losses in the regulator7

OTHER OUTPUT VOLTAGES

!f you need other voltages than R>$ you can modify the circuit by replacing

the D3> chips with another regulator with different output voltage from regulator

Dxx chip family. The last numbers in the chip code tells the output voltage.

*emember that the input voltage must be at least 1 greater than regulator output

voltage to otherwise the regulator does not wor" well.

8(


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CHAPTER ?

0EYPAD

A -pa"is a set of buttons arranged in a bloc" which usually bear digits

and other symbols but not a complete set of alphabetical letters. !f it mostly

contains numbers then it can also be called a '+)!ic -pa". eypads are found

on many alphanumeric "eyboardsand on other devices such as calculators$

combination loc"s and telephones which require largely numeric input.

A computer "eyboard usually contains a small numeric "eypadwith a

calculator4style arrangement of buttons duplicating the numeric and arithmetic"eys on the main "eyboard to allow efficient entry of numerical data. This number

pad 6commonly abbreviated to SnumpadS7 is usually positioned on the right side of

the "eyboard because most people are right4handed.

any laptop computershave special function "eys which turn part of the

alphabetical "eyboard into a numerical "eypad as there is insufficient space to

allow a separate "eypad to be built into the laptop;s chassis. &eparate plug4in

"eypads can be purchased.The "eypad of a calculatorcontains the digits 3 through

2$ together with the four arithmeticoperations$ the decimal pointand other more

advanced functions.

eypads are a part of mobile phones that are replaceable and sit on a sensor

board. &ome multimedia mobile phones have a small joystic" which has a cap to

match the "eypad.eypads are also a feature of some combination loc"s. This type

of loc" is often used on doors$ such as that found at the main entrance to some

offices.

81
http://en.wikipedia.org/wiki/Alphanumeric_keyboardhttp://en.wikipedia.org/wiki/Numeric_keypadhttp://en.wikipedia.org/wiki/Laptophttp://en.wikipedia.org/wiki/Calculatorhttp://en.wikipedia.org/wiki/Arithmetichttp://en.wikipedia.org/wiki/Decimal_pointhttp://en.wikipedia.org/wiki/Combination_lockhttp://en.wikipedia.org/wiki/Numeric_keypadhttp://en.wikipedia.org/wiki/Laptophttp://en.wikipedia.org/wiki/Calculatorhttp://en.wikipedia.org/wiki/Arithmetichttp://en.wikipedia.org/wiki/Decimal_pointhttp://en.wikipedia.org/wiki/Combination_lockhttp://en.wikipedia.org/wiki/Alphanumeric_keyboard


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Fi,+! ?.1 )ircuit 0iagram +f eypad

Fi,+! ?.2 /rocessing )ontrol 0iagram +f eypad

88


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CHAPTER

/UER

Fi,+! .1 )ircuit 0iagram +f 'uzzer

This novel buzzer circuit uses a relay in series with a small audio

transformer and spea"er. 5hen the switch is pressed$ the relay will operate via the

transformer primary and closed relay contact. As soon as the relay operates the

normally closed contact will open$ removing power from the relay$ the contacts

close and the sequence repeats$ all very quic"ly...so fast that the pulse of current

causes fluctuations in the transformer primary$ and hence secondary. The spea"ers

tone is thus proportional to relay operating frequency. The capacitor ) can be used

to StuneS the note. The nominal value is 3.33%uF$ increasing capacitance lowers the

buzzers tone.

8>


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CHAPTER 4

FEATURES


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CHAPTER 18

ADVANTAGES

Cigh security.

Avoid the usage of unauthorized person.

-ow cost.

ery sensitive.

ery simple to use.

8


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CHAPTER 11

CONCLUSION

This project KFi',! P!i't I"'ti(icati&' Tch'&,- Us" I'

ATM S-st)L deals with giving intelligence to the existing traditional system. !n

this system the human identity is carried out using a thumb impression. The

Fingerprint &canner is interfaced to the


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CHAPTER 12

/I/LIOGRAPHY

%. Federal 'ureau of !nvestigation. The &cience of FingerprintsB

)lassification and 627B %1@>4%1DD.

@. -in Cong. Automatic /ersonal !dentification


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APPENDI:

A. CODINGS

MincludeV*E:G>%.CW

MincludeVATD2x>%.hW

Mdefine "eyport /%

Mdefine col% /%X3 ??column %

Mdefine col( /%X% ??column (

Mdefine col1 /%X( ??column 1

Mdefine T*O ??register set

sbit rwI/1Y@O ??read?write

sbit enI/1YO ??enable..

sbit buzzerI/3Y3O

unsigned char i$"$l$p$s$"ey$"ey%$input%3U$xUISxS$yUISySO

void chec"67O

unsigned char adc$m$ds$st$wtO

void lcdXwrite6unsigned char 7O

void conv6unsigned char 7O

>3


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void write6unsigned char Zp7O

void cmd6unsigned char 7O

void delay6unsigned int 7O

void lcdXinit67O

void serial67O

void send6unsigned char Znam7O

void "eypadXinit67[

"eyport PI3x3FO

\

unsigned char get"ey67[

unsigned char iI3$j$"$"eyI3$tempO

"I%O

for6iI3OiV8OiRR7[

"eyport PI]63xD3WWi7O

temp I "eyportO

temp PI 3x3O

if6tempV7[

if6^col%7[

"ey I "R3O

while6^col%7O

return "eyO

\

if6^col(7[

"ey I "R%O

>%


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while6^col(7O

return "eyO

\

if6^col17[

"ey I "R(O

while6^col17O

return "eyO

\

jRRO

\

"RI1O

"eyport _I 3xD3WWiO

delay6%7O

\

return FA-&EO

\

unsigned char translate6unsigned char "eyval7

[

if6"eyvalV%37

return "eyvalR;3;O

else if6"eyvalII%37

return ;x;O

else if6"eyvalII%%7

return ;3;O

else if6"eyvalII%(7

return ;b;O

>(


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\

void main67

[

lcdXinit67O

"eypadXinit67O

"eyI3O

dsI3O

wtI3O

buzzerI3O

buzzerI%O

"ey%I3O

serial67O

while6%7

[

?? send6Px7O

cmd63xc37O

if6dsII37

write6SEnter code S7O

else if6dsII%7

write6SEnter pin S7O

else

cmd63x3%7O

>1


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cmd63xD37O

while6^6"eyIget"ey6777O

"ey% I translate6"ey7O

inputiUI"ey%O

if6"ey%II;x;7[

if6iII37

brea"O

i44O

cmd63xD3Ri7O

lcdXwrite6; ;7O

cmd63xD3Ri7O

\

else if6"ey%II;b;7

[

cmd63x3%7O

inputiUI;`3;O

??write6Pinput7O

if6dsII37

send6Px7O

else

send6Py7O

send6Pinput7O

dsRRO

stI%O

iI3O

\

>8


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else

[

cmd63xD3Ri7O

iRRO

if6dsII37

lcdXwrite6"ey%7O

if6dsII%7

lcdXwrite6;Z;7O

\

if6stII%7

[

while6*!II37O

[

mI&'


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iI3O

stI3O

cmd63x3%7O

\

brea"O

case ;A;B

[

cmd63xD37O

write6SA@


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case ;;B

[

cmd63xD37O

write6S5*+,: )+0ES7O

delay6@337O

buzzerI3O

delay6@337O

buzzerI%O

dsI3O

iI3O

stI3O

cmd63x3%7O

\ brea"O

defaultB

[

stI3O

continueO

\

brea"O

\

\

\

>


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\

\

void lcdXinit67

[

cmd63x1D7O ?? initialiation

cmd63x3c7O??cursor control

cmd63x3%7O??diplay clear

cmd63xD37O ??address of lcd

\

void serial67

[

T+0I3x(3O??timer modeBauto reload mode

TC%I3xF0O ??

&)+,I3x>3O

T*%I%O

*!I3O

T!I3O

\

void send6unsigned char Znam7

[

while6Znam^I;`3;7

[

&'D


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T!I3O

namRRO

\

\

void cmd6unsigned char h7

[

/(IhO

rsI3O

rwI3O

enI%O

delay6>7O

enI3O

chec"67O

\

void write6unsigned char Zp7

[

while6Zp^I;`3;7

[

lcdXwrite6Zp7O

pRRO

\

\

void lcdXwrite6unsigned char l7

[

/(IlO

rsI%O

>2


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rwI3O

enI3O

delay6(7O

enI%O

chec"67O

\

void chec"67

[

/(XI%O

rsI3O

rwI%O

enI3O

delay6(7O

enI%O

while6/(XII%7O

\

void delay6unsigned int c7

[

unsigned int i$jO

for6iI3OiVcOiRR7

for6jI3OjV%333OjRR7O

\

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