CHAPTER 1INTRODUCTION

1.1 HISTORICAL REVIEW

The history of electrical motors goes back as far as 1820, when Hans Christian

Oesterd discovered the magnetic effect of an electric current. One year later, Michael

Faraday discovered the electromagnetic rotation and built the first primitive D.C.

motor. Faraday went on to discover electromagnetic induction in 1831, but it was not

until 1883 that Tesla invented the A.C asynchronous motor. In 1882, Nikola Tesla

identified the rotating magnetic field principle, and pioneered the use of a rotary field

of force to operate machines. He exploited the principle to design a unique two phase

induction motor in 1883. In 1885, Galileo Ferraris independently researched the

concept. In 1888, Ferraris published his research in a paper to the Royal Academy of

Sciences in Turin. Introduction of Tesla's motor from 1888 onwards initiated what is

known as the Second Industrial Revolution, making possible the efficient generation

and long distance distribution of electrical energy using the alternating current

transmission system, also of Tesla's invention (1888).

Before the invention of the rotating magnetic field, motors operated by

continually passing a conductor through a stationary magnetic field (as in homo polar

motors). Tesla had suggested that the commutators from a machine could be

removed and the device could operate on a rotary field of force. Professor Poeschel,

his teacher, stated that would be akin to building a perpetual motion machine. This

classic alternating current electro-magnetic motor was an induction motor. In the

induction motor, the field and armature were ideally of equal field strengths and the

field and armature cores were of equal sizes. The total energy supplied to operate the

device equaled the sum of the energy expended in the armature and field coils. The

power developed in operation of the device equaled the product of the energy

expended in the armature and field coils. The main advantage is that induction motors

do not require an electrical connection between stationary and rotating parts of the

motor. Therefore, they do not need any mechanical commutator (brushes), leading to

the fact that they are maintenance free motors. Induction motors also have low weight

and inertia, high efficiency and a high overload capability. Therefore, they are

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cheaper and more robust, and less prone to any failure at high speeds. Furthermore,

the motor can work in explosive environments because no sparks are produced.

1.2 WORKING PRINCIPLE OF INDUCTION MOTOR:

As a general rule, conversion of electrical power into mechanical power takes

place in the rotating part of an electric motor. In D.C. motors, the electrical power is

conducted directly to the armature (i.e. rotating part) through brushes and

commutator. Hence this sense, a D.C. motor can be called a conduction motor.

Fig:1: Cross sectional view of an Induction motor

However, in a.c. motors the rotor does not receives electric power by conduction

but by induction in exactly the same way as the secondary of a 2- winding transformer

receives its power from the primary. That is why such motors are known as induction

motors. In fact, an induction motor can be treated as a rotating transformer i.e. one in

which primary winding is stationary but the secondary is free to rotate. Induction

motor is the most common type of AC motor used in the world. It can be single phase

or three phase. They are widely used for different applications ranging from small

induction motors in washing machines, household fans etc to vary large induction

motors which are capable of tens of thousands of kW in output, for pipeline

compressors, wind-tunnel drives and overland conveyor systems. Through

electromagnetic induction, the rotating magnetic field induces a current in the

conductors in the rotor, which in turn sets up a counterbalancing magnetic field that

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causes the rotor to turn in the direction the field is rotating. The rotor must always

rotate slower than the rotating magnetic field produced by the poly phase electrical

supply; otherwise, no counterbalancing field will be produced in the rotor. Induction

motors are the workhorses of industry and motors up to about 500 kW (670

horsepower) in output are produced in highly standardized frame sizes, making them

nearly completely interchangeable between manufacturers.

1.3 TYPES OF ROTORS USED IN INDUCTION MOTORS:

There are two types of rotors used in induction motors.

1.3.1 Squirrel Cage rotors:

Most common AC motors use the squirrel cage rotor, which will be found in

virtually all domestic and light industrial alternating current motors. The squirrel cage

takes its name from its shape - a ring at either end of the rotor, with bars connecting

the rings running the length of the rotor. It is typically cast aluminum or copper poured

between the iron laminates of the rotor, and usually only the end rings will be visible.

The vast majority of the rotor currents will flow through the bars rather than the higher

resistance and usually varnished laminates. Very low voltages at very high currents

are typical in the bars and end rings; high efficiency motors will often use cast copper

in order to reduce the resistance in the rotor.

In operation, the squirrel cage motor may be viewed as a transformer with a

rotating secondary – when the rotor is not rotating in sync with the magnetic field,

large rotor currents are induced; the large rotor currents magnetize the rotor and

interact with the stator's magnetic fields to bring the rotor into synchronization with the

stator's field. An unloaded squirrel cage motor at synchronous speed will consume

electrical power only to maintain rotor speed against friction and resistance losses; as

the mechanical load increases, so will the electrical load - the electrical load is

inherently related to the mechanical load. This is similar to a transformer, where the

primary's electrical load is related to the secondary electrical load. This is why, as an

example, a squirrel cage blower motor may cause the lights in a home to dim as it

starts, but doesn't dim the lights when its fan belt (and therefore mechanical load) is

removed. Furthermore, a stalled squirrel cage motor (overloaded or with a jammed

shaft) will consume current limited only by circuit resistance as it attempts to start.

Unless something else limits the current (or cuts it off completely) overheating and

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destruction of the winding insulation is the likely outcome. Virtually every washing

machine, dishwasher, standalone fan, record player, etc. uses some variant of a

squirrel cage motor.

1.3.2 Wound Rotor:

An alternate design, called the wound rotor, is used when variable speed is

required. In this case, the rotor has the same number of poles as the stator and the

windings are made of wire, connected to slip rings on the shaft. Carbon brushes

connect the slip rings to an external controller such as a variable resistor that allows

changing the motor's slip rate. In certain high power variable speed wound-rotor

drives, the slip-frequency energy is captured, rectified and returned to the power

supply through an inverter. Compared to squirrel cage rotors, wound rotor motors are

expensive and require maintenance of the slip rings and brushes, but they were the

standard form for variable speed control before the advent of compact power

electronic devices.

Transistorized inverters with variable-frequency drive can now be used for

speed control, and wound rotor motors are becoming less common. (Transistorized

inverter drives also allow the more-efficient three-phase motors to be used when only

single-phase mains current is available, but this is never used in household

appliances, because it can cause electrical interference and because of high power

requirements.) Several methods of starting a poly phase motor are used. Where the

large inrush current and high starting torque can be permitted, the motor can be

started across the line, by applying full line voltage to the terminals (Direction- line,

DOL). Where it is necessary to limit the starting inrush current (where the motor is

large compared with the short-circuit capacity of the supply), reduced voltage starting

using a series inductors, an autotransformer, thyristors , or other devices are used. A

technique sometimes used is star-delta starting, where the motor coils are initially

connected in wye for acceleration of the load, then switched to delta when the load is

up to speed. This technique is more common in Europe than in North America.

Transistorized drives can directly vary the applied voltage as required by the starting

characteristics of the motor and load. This type of motor is becoming more common

in traction applications such as locomotives, where it is known as the asynchronous

traction motor.

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1.4 Speed and slip

The speed of the AC motor is determined primarily by the frequency of the AC

supply and the number of poles in the stator winding, according to the relation:

Ns = 120F / p

Where

Ns = Synchronous speed, in revolutions per minute

F = AC power frequency

p = Number of poles per phase winding

Actual RPM for an induction motor will be less than this calculated synchronous

speed by an amount known as slip, that increases with the torque produced. With no

load, the speed will be very close to synchronous. When loaded, standard motors

have between 2-3% slip, special motors may have up to 7% slip, and a class of

motors known as torque motors are rated to operate at 100% slip (0 RPM/full stall).

The slip of the AC motor is calculated by:

S = (Ns −Nr) / Ns

Percentage slip = (Ns −Nr) / Ns * 100

Where

Nr = Rotational speed, in revolutions per minute.

S = Normalized Slip, 0 to 1.

For motoring action 0 <slip <1

For generator action slip > 1

For braking action slip < 0

As an example, a typical four-pole motor running on 60 Hz might have a

nameplate rating of 1725 RPM at full load, while its calculated speed is 1800 RPM.

The speed in this type of motor has traditionally been altered by having additional

sets of coils or poles in the motor that can be switched on and off to change the

speed of magnetic field rotation. However, developments in power electronics mean

that the frequency of the power supply can also now be varied to provide a smoother

control of the motor speed. A 3-φinduction motor is practically a constant speed

machine, more or less like a dc shunt motor. The speed regulation of an induction

motor (having a low resistance) is usually less than 5 % at full load. In the case of

induction motor when the load is increased then speed will decrease and the speed

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reduction is accompanied by a corresponding loss of efficiency and good speed

regulation. So it is quite difficult to build a good adjustable speed induction motor.

Different methods by which speed control of induction motor is achieved are as

follows

Control from the stator side-

By changing the applied voltage

By changing the applied frequency

By changing the number of stator poles

Control from the rotor side-

Rotor rheostat control

By operating two motors in concatenation or cascade

By injecting an emf in the rotor circuit

1.5 Sensorless Speed Control of Induction Motors:

In the past, DC motors were used extensively in areas where variable speed

operations were required. DC motors have certain disadvantages, however, which

are due to the existence of the commutator and the brushes. They require periodic

maintenance and thus they cannot be used in explosive or corrosive environments.

They have limited commutator capability under high-speed, high-voltage operational

conditions. These problems could be overcome by application of AC motors. AC

motors have simpler and more rugged structure, higher maintainability and economy

than DC motors. They are also robust and immune to heavy loading. Their small

dimension compared with DC motors allows AC motors to be designed with

substantially higher output ratings for small load, low speed operations. Progress in

the field of power electronics have made it possible to overcome difficulty of control of

AC motors and to apply AC drives for high performance applications where

traditionally only DC drives were applied.

In recent years, so-called sensorless control scheme for AC drives has been

one of the most popular research topics in this area. For direct control of AC motors,

information about its rotational speed (or rotational position) is crucial and in general

shaft-mounted tacho-generators and resolvers are used to measure them. The

elimination of those transducers has long been an attractive prospect, since the shaft

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transducers and the associated signal wiring are a significant source of failure,

additional cost, and additional weight. Numerous approaches have been proposed to

estimate the rotor velocity and/or position from the machine terminal properties, such

as the stator current or voltage. Sensorless speed control drives have reached the

status of a maturing technology in a broad range of applications ranging from low-cost

to high-performance systems. Eliminating the speed sensor on the motor shaft

represents a cost advantage, which combines favorably with increased reliability due

to the absence of this mechanical component and its sensor cable. This project

presents the mathematical principles and algorithm underlying a new sensorless

control strategy for a three phase squirrel cage induction motor.

Pulse width modulation is used in power converters to modulate a reference

signal into gating pulses, this conversion can be carried out using analog circuits or

digital circuits, such as DSPs and microprocessors. A more efficient and faster

solution is the use of field programmable gate arrays (FPGAs). So, a Xilinx based

FPGA is used as the controller in the project. The control algorithm is based on

Space Vector Modulation technique using which we generate a pulse width

modulated signal. The project aims to achieve the sensorless speed control of the

induction motor in order to achieve maximum efficiency which is not possible using

conventional speed control strategies. Smart power module (SPM) is another vital

component in the fabrication of the project. Speed control with great precision is being

targeted.

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CHAPTER 2

AIM AND SCOPE OF PRESENT INVESTIGATION

2.1 AIM OF THE PROJECT:

The aim of the project is to generate a PWM signal using which we trigger the

IGBT gates of an inverter which feeds the necessary supply to the motor. Thus the

speed control is planned to be achieved. Space vector modulation is the technique

that is evolved to generate this PWM signal. The controller thus evolved has greater

efficiency and precision compared to the conventional methods adopted for the speed

control of 3 phase Induction motors.

2.2 SCOPE OF THE PROJECT:

In recent years, so-called sensorless control scheme for AC drives has been

one of the most popular research topics in this area. For direct control of AC motors,

information about its rotational speed (or rotational position) is crucial and in general

shaft-mounted tacho-generators and resolvers are used to measure them. The

elimination of those transducers has long been an attractive prospect, since the shaft

transducers and the associated signal wiring are a significant source of failure,

additional cost, and additional weight. This project presents the mathematical

principles and algorithm underlying a new sensorless control strategy for a three

phase squirrel cage induction motor.

8

CHAPTER3

SPACE VECTOR PULSE WIDTH MODULATION

3.1 INVERTER MODULE:

Space vector modulation is the technique that is evolved to generate this PWM

signal. So let us consider an inverter module

Fig:2: Sample Inverter module

The rectifier or batteries are supplying DC voltage to the inverter. In between, a

large DC capacitor is placed to buffer energy. Typically the DC capacitors are placed

in proximity to the IGBTs (Insulated Gate Bipolar Transistors). The IGBTs act as

switches. By switching on or off the IGBTs with a high frequency a block wave is

generated. This block wave contains the base frequency (50 or 60Hz) and many

other higher frequencies. By filtering out the 50 or 60Hz sine wave with a low pass

filter the output sine wave is generated at the output.

Pulse Width Modulation is a method, generally used, to define how to switch

the IGBTs on and off in a UPS inverter. In case IGBT A is switched on, A’ is always

switched off and vice versa. In case A is switched on, VA0 equals Vdc. When A is

switched off (and A’ is switched on) : VA0 equals 0 (zero). So, by switching, we can

generate a block wave . Typically the frequency of such a block wave is around 5

kHz, so the period time is 0.2 ms.

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Fig:3: PWM Output.

In case the IGBT A is switched on, VA0 = VDC. If the IGBT is switched on 50%

of the time and switched off the other 50% of the time, the effective value of the

voltage: is: (50% * Vdc) + (50% * 0) = ½ Vdc

So by varying the time the IGBT is switched on the effective value of the output

voltage can be varied. If we need a 50 or 60Hz output voltage in a sine wave shape

we need to vary the switch on/off time , following the wave shape we want at the

output. This is called Pulse Width Modulation, PWM.

3.2 SPACE VECTOR MODULATION:

Space vector modulation is a means of generating a three phase variable voltage, variable frequency PWM output voltage.

The inverter comprises six solid state switches, two for each phase with one switch on each phase connecting to the positive rail and one switch connecting to the negative rail. By a combination of switching states of these output switches, we can create a sinusoidal output current.

In effect, there are eight states that define six output vectors and two NULL vectors.

S0 = 000 : NULL

S1 = 100 : Vector 1

S2 = 110 : Vector 2

S3 = 010 : Vector 3

S4 = 011 : Vector 4

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S5 = 001 : Vector 5

S6 = 101 : Vector 6

S7 = 111 : NULL

 

Fig:4: Space Vector switching positions.

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Fig:5: Space vector sector divisions with co-ordinates.

Maximum output voltage would be achieved by stepping through the 6 major

states in sequence. The output pattern would be S1, S2, S3, S4, S5, S6, S1 etc this

would result in maximum voltage and also quite a high level of distortion. The output

voltage at any vector angle can be reduced by PWM techniques. If we consider the

vector S1, we can reduce the voltage at this angle by switching between S1 and S0.

Half voltage would be with 50% time on S0 and 50% time on S1. Hence, we can have

a variable voltage ouput waveform that steps round the six vectors by using PWM

modulation with the apex vectors and the NULL vectors S0 and S7. Intermediate

vectors can be generated by using PWM techniques between the adjacent apex

vectors and the NULL vector. The angle is changed by the ratio between the apex

vectors and the voltage is reduced by increasing the NULL time. For example, a 90

degree vector at half voltage would be achieved by 50% time with NULL vector, 25%

time with an S2 vector and 25% time with an S3 vector.

Fig:6: Space Vector Sectors.

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Fig : 7: Resultant space vector.

If we consider the six non NULL voltage vectors v1 (= S1) to V6, then they

describe 6 sectors 1 to 6. Within each sector, we can derive any voltage vector Vs of

reduced voltage and an angle within the sector. There are a number of strategies for

generating the resultant vectors, each strategy has advantages and disadvantages,

affecting THD (Total Harmonic Distortion), switching losses and bearing currents in

motors.

Right Aligned Sequence: S0 - S1 - S2 - S7 - S0 - S1 - S2 - S7 etc.

The angle and magnitude of the vector is determined by the ratios of the periods

d0, d1 and d2.

Fig : 8 : Right Aligned Sequence

Symmetric Sequence: S0 - S1 - S2 - S7 - S2 - S1 - S0 - S1 - S2 - S7 - S2 - S1 - S0

etc.

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The angle and magnitude of the vector is determined by the ratios of the

periods d0, d1 and d2.

Fig:9: Symmetric Sequence.

The basic pattern construction is repeated for all six sectors. There are other

space vector modulation sequences that can be used to generate the required vector

patterns.

Fig:10: Inverter Module connected to the Motor

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15

3.3 ADVANTAGES OF SPACE VECTOR MODULATION:

Space Vector Modulation for a three phase inverter makes it possible to adapt

the switching behaviour to different situations such as: half load, full load, linear load,

non-linear load, static load, pulsating load, etc. In combination with a zig-zag three

phase transformer in the output this provides the following advantages:

• Very low values can be reached for the output voltage THD (<2% for linear loads.,

<3% for non linear loads)

• Robust dynamic response (<3% deviation at 100% load step, recovery time to <1%:

<20ms)

• The efficiency of the inverter can be optimized, for each load condition.

• Because of the strong regulation in combination with a zig-zag transformer the

inverter can accept a 100% unbalanced load and maintain the performance

• SVM enables more efficient use of the DC voltage (15% more than conventional

PWM techniques, so the inverter will accept a 15% lower DC voltage making full use

of the available battery energy)

• By applying special modulation techniques the peak currents in the IGBTs can be

reduced compared to similar inverters. This improves the MTBF of the inverter, since

there is less thermal stress on the IGBT chip.

• By changing the switching behaviour of the inverter, the audible noise can also be

influenced and therefore be minimized.

Space Vector Modulation provides excellent output performance, optimized efficiency,

and high reliability compared to similar inverters with conventional Pulse Width

Modulation.

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CHAPTER 4

EXPERIMENTAL ALGORITHM AND HARDWARE COMPONENTS

USED

4.1 BASIC BLOCK DIAGRAM FOR THE CONTROL SCHEME :

Fig :11: The block diagram of the sensorless control scheme

The complete sensorless induction motor control scheme includes a speed

controller, implemented on a FPGA and a Smart Power Module which provides the

necessary isolation and drives the inverter. The block diagram is as shown in Fig 1. In

the control strategy a 3-phase squirrel cage induction motor fed by a PWM inverter.

The power supply is divided into two parts each for the controller circuit and for the

smart power module. The FPGA controller needs a 5V supply. As no sensors are

used so the speed estimation is done by mathematical equations which are 17

developed based on the state space vector model of the 3-phase induction motor.

The design and simulation of the motor controller is carried out using two main

software resources Xilinx ISE 7.1 and modelsim which are the sophisticated tools for

the design, simulation and testing of FPGA implemented circuits. The VHDL

description of the complete motor controller includes the current control strategy and

the sensorless speed control algorithm. The VHDL code related to these blocks

utilizes generic parameters to define the size of the register, adders, subtractors,

buses and other elements involved, this allows recalling of the controller hardware

structure according to the calculation precision imposed by the available types of

FPGA circuits. The circuitry external to the functional block contains the induction

motor , SPM and PWM inverter.

4.2 POWER SUPPLY UNIT:

Fig :12 : Multi output Power Supply

The power supply unit employed in this project is a multi output power supply.

The schematic diagram is shown in the above diagram. Two such units are employed

in the project, one for the controller circuit and the other for smart power module. The

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FPGA controller needs a 5 V input which is provided by the 0-9 V tapping of the

transformer. The AC voltage is converted into pulsating DC by the bridge rectifier

which is further filtered using the capacitor filters shown in the figure. Three types of

regulators are employed in the supply unit. They are 7805, 7812 and 7912. 7805 is a

positive voltage three terminal regulator which regulates the voltage that is being

given to the controller and smart power module circuits.

4.3 FIELD PROGRAMMABLE GATE ARRAY (FPGA)

A field programmable gate array (FPGA) is a semiconductor device containing

programmable logic components and programmable interconnects. The

programmable logic components can be programmed to duplicate the functionality of

basic logic gates such as AND, OR, XOR, NOT or more complex combinational

functions such as decoders or simple math functions. In most FPGAs, these

programmable logic components (or logic blocks, in FPGA parlance) also include

memory elements, which may be simple flip-flops or more complete blocks of

memories. A hierarchy of programmable interconnects allows the logic blocks of an

FPGA to be interconnected as needed by the system designer, somewhat like a one-

chip programmable breadboard. These logic blocks and interconnects can be

programmed after the manufacturing process by the customer/designer (hence the

term "field programmable", i.e. programmable in the field) so that the FPGA can

perform whatever logical function is needed. FPGAs are generally slower than their

application-specific integrated circuit (ASIC) counterparts, can't handle as complex a

design, and draw more power. However, they have several advantages such as a

shorter time to market, ability to re-program in the field to fix bugs, and lower non-

recurring engineering costs. Vendors can sell cheaper, less flexible versions of their

FPGAs which cannot be modified after the design is committed. The development of

these designs is made on regular FPGAs and then migrated into a fixed version that

more resembles an ASIC. Complex programmable logic devices, or CPLDs, are

another alternative. To define the behavior of the FPGA the user provides a hardware

description language (HDL) or a schematic design. Common HDLs are VHDL and

Verilog. Then, using an electronic design automation tool, a technology-mapped

netlist is generated. The netlist can then be fitted to the actual FPGA architecture

using a process called place-and-route, usually performed by the FPGA company

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proprietary place-and-route software. The user will validate the map, place and route

results via timing analysis, simulation, and other verification methodologies. Once the

design and validation process is complete, the binary file generated (also using the

FPGA company's proprietary software) is used to reconfigure the FPGA.

4.3.1 FPGA design and programming:

In an attempt to reduce the complexity of designing in HDLs, which have been

compared to the equivalent of assembly languages, there are moves to raise the

abstraction level of the design. Companies such as Cadence, Synopsys and Celoxica

are promoting SystemC as a way to combine high level languages with concurrency

models to allow faster design cycles for FPGAs than is possible using traditional

HDLs. Approaches based on standard C or C++ (with libraries or other extensions

allowing parallel programming) are found in the Catapult C tools from Mentor

Graphics, and in the Impulse C tools from Impulse Accelerated Technologies.

Annapolis Micro Systems, Inc.'s CoreFire Design Suite and National Instruments

LabVIEW FPGA provide a graphical dataflow approach to high-level design entry.

Languages such as SystemVerilog, SystemVHDL, and Handel-C (from Celoxica)

seek to accomplish the same goal, but are aimed at making existing hardware

engineers more productive versus making FPGAs more accessible to existing

software engineers. There is more information on C to HDL and Flow to HDL on their

respective pages. To simplify the design of complex systems in FPGAs, there exist

libraries of predefined complex functions and circuits that have been tested and

optimized to speed up the design process. These predefined circuits are commonly

called IP cores, and are available from FPGA vendors and third party IP suppliers

(rarely free and typically released under proprietary licenses). Other predefined

circuits are available from developer communities such as OpenCores (typically

"free", and released under the GPL, BSD or similar license), and other sources. In a

typical design flow, an FPGA application developer will simulate the design at multiple

stages throughout the design process. Initially the RTL (register transfer level)

description in VHDL or Verilog is simulated by creating test benches to simulate the

system and observe results. Then, after the synthesis engine has mapped the design

to a netlist, the netlist is translated to a gate level description where simulation is

20

repeated to confirm the synthesis proceeded without errors. Finally the design is laid

out in the FPGA at which point propagation delays can be added and the simulation

run again with these values back-annotated onto the netlist.

The FPGA board used here is VPTB-05 by Vi-Microsystems.

The details of it are as follows.

Fig:13: FPGA Board VPTB-05

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4.3.2 Switches and LEDs:

Fig: 14 : Switches and LEDs

Power Switch:

The Spartan-3E Low Cost Kit has a slide power switch. Moving the power

switch Up for Power

On and down for power off.

Configuration Switch:

The Spartan-3E Low Cost Kit has a push button Switch to Configure the FPGA from

Xilinx Serial Flash PROM.

Input Switches:

The Spartan-3E Low Cost Kit has 8 way Dip switches for giving inputs to the FPGA

i/o lines.

Table 2: Dip Switch connections with FPGA

Output LEDs:

The Spartan-3E Low Cost Kit has 8 individual surface-mount LEDs. The LEDs are

Labelled L3 to L10.The cathode of each LED connects to ground. To light an

individual LED, drive the associated FPGA control signal High.

Table 3: LED connections with FPGA

4.3.3 Character LCD Display:

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The Spartan-3E Low Cost Kit prominently features a 2-line by 16-character

liquid crystal display

(LCD). The FPGA controls the LCD via the 8-bit data interface

Fig:15: LCD Display

Once mastered, the LCD is a practical way to display a variety of information

using standard ASCII and custom characters. However, these displays are not fast.

Scrolling the display at half second intervals tests the practical limit for clarity.

Table 4 : LCD Connections with FPGA

Voltage Compatibility:

The character LCD is power by +5V. The FPGA I/O signals are powered by

3.3V.However, the FPGA’s output levels are recognized as valid Low or High logic

levels by the LCD. The LCD controller accepts 5V TTL signal levels and the 3.3V

LVCMOS outputs provided by the FPGA meet the 5V TTL voltage level requirements.

The 390Ù series resistors on the data lines prevent over stressing on the FPGA and

Strata Flash I/O pins when the character LCD drives a High logic value. The

character LCD drives the data lines when LCD_RW is High. Most applications treat

the LCD as a write only peripheral and never read from the display.

4.3.4 PWM Generation:

Pulse Width Modulation (PWM) is a technique to provide a logic “1" and logic

“0" for a controlled period of time. Pulse Width Modulation is used in many

applications such as controlling the speed of a motor. This board also used for the

same application as user needs. PWM output is terminated in the Box type header.

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Fig:16 : 16 PIN FRC

Translator Features:

Translator device is used in-between FPGA I/O lines and Box type Header to

translate 3.3V to 5V and Vice-versa.

* Device used: SN74LVCC3245A

* Bidirectional Voltage Translator

* 2.3 V to 3.6 V on A Port and 3 V to 5.5 V on B Port

* Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage.

This 8-bit (octal) non inverting bus transceiver contains two separate supply

rails. The B port is designed to track VCCB, which accepts voltages from 3 V to 5.5 V,

and the A port is designed to track VCCA, which operates at 2.3V to 3.6 V. This

allows for translation from a 3.3-V to a 5-V system environment and vice versa, from

a 2.5-V to a 3.3-V system environment and vice versa. The SN74LVCC3245A is

designed for asynchronous communication between data buses. The device

transmits data from the A bus to the B bus or from the B bus to the A bus, depending

on the logic level at the direction-control (DIR) input. The output-enable (OE) input

can be used to disable the device so the buses are effectively isolated.

Table 5: Function Table

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Translator used in this board to convert 3.3V to 5V or vice-versa. Selection of

particular translator is to be achieved by the following signals,

Pin Details of Translator Selections:

Table 6: Terminations of DIR pins with FPGA

4.4 SMART POWER MODULE:

4.4.1 Features:

• UL Certified No.E209204 (SPM27-CA package)

• Very low thermal resistance due to using DBC

• 600V-20A 3-phase IGBT inverter bridge including control ICs for gate driving and

protectio• Divided negative dc-link terminals for inverter current sensing applications

• Single-grounded power supply due to built-in HVIC

• Isolation rating of 2500Vrms/min.

4.4.2 Applications:

25

• AC 100V ~ 253V three-phase inverter drive for small power ac motor drives

• Home appliances applications like air conditioner and washing

machine.

4.4.3 General Description:

It is an advanced smart power module (SPMTM) that Fairchild has newly

developed and designed to provide very compact and high performance ac motor

drives mainly targeting low power inverter-driven application like air conditioner and

washing machine. It combines optimized circuit protection and drive matched to low-

loss IGBTs. System reliability is further enhanced by the integrated under-voltage

lock-out and short-circuit protection. The high speed built-in HVIC provides opto-

coupler- less single-supply IGBT gate driving capability that further reduce the overall

size of the inverter system design. Each phase current of inverter can be monitored

separately due to the divided negative dc terminals.

Fig: 17: IGBT Inverter

Integrated Power Functions

• 600V-20A IGBT inverter for three-phase DC/AC power conversion

Integrated Drive, Protection and System Control Functions

• For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed

level shifting Control circuit under-voltage (UV) protection Note) Available bootstrap

circuit example is given.

• For inverter low-side IGBTs: Gate drive circuit, Short circuit protection (SC)

Control supply circuit under-voltage (UV) protection

26

• Fault signaling: Corresponding to a UV fault (Low-side supply)

• Input interface: 3.3/5V CMOS/LSTTL compatible, Schmitt trigger input

Fig:18: Structural Diagram

1. Inverter low-side is composed of three IGBTs, freewheeling diodes for each IGBT

and one control IC. It has gate drive and protection functions.

2. Inverter power side is composed of four inverter dc-link input terminals and three

inverter output terminals.

3. Inverter high-side is composed of three IGBTs, freewheeling diodes and three drive

ICs for each IGBT.

27

Table : 7 : Pin Details

28

4.4.4 Time Charts of SPMs Protective Function

a1 : Control supply voltage rises: After the voltage rises UVCCR, the circuits start to

operate when next input is applied.

a2 : Normal operation: IGBT ON and carrying current.

a3 : Under voltage detection (UVCCD).

a4 : IGBT OFF in spite of control input condition.

a5 : Fault output operation starts.

a6 : Under voltage reset (UVCCR).

a7 : Normal operation: IGBT ON and carrying current.

29

b1 : Control supply voltage rises: After the voltage reaches UVBSR, the circuits start

to operate when next input is applied.

b2 : Normal operation: IGBT ON and carrying current.

b3 : Under voltage detection (UVBSD).

b4 : IGBT OFF in spite of control input condition, but there is no fault output signal.

b5 : Under voltage reset (UVBSR)

b6 : Normal operation: IGBT ON and carrying current

(with the external shunt resistance and CR connection)

c1 : Normal operation: IGBT ON and carrying current.

c2 : Short circuit current detection (SC trigger).

c3 : Hard IGBT gate interrupt.

c4 : IGBT turns OFF.

c5 : Fault output timer operation starts: The pulse width of the fault output signal is set

by the external capacitor CFO.

c6 : Input “L” : IGBT OFF state.

30

c7 : Input “H”: IGBT ON state, but during the active period of fault output the IGBT

doesn’t turn ON.

c8 : IGBT OFF state

4.5 ISOLATION CIRCUIT(OPTO COUPLERS) :

There are many situations where signals and data need to be transferred

from one subsystem to another within a piece of electronics equipment, or from

one piece of equipment to another, without making a direct ohmic electrical

connection. Often this is because the source and destination are (or may be at

times) at very different voltage levels, like a microprocessor, which is operating

from 5V DC but being used to control a triac that is switching 240V AC. In such

situations the link between the two must be an isolated one, to protect the

microprocessor from over voltage damage.

Relays can of course provide this kind of isolation, but even small relays

tend to be fairly bulky compared with ICs and many of today’s other miniature

circuit components. Because they’re electro-mechanical, relays are also not as

reliable and only capable of relatively low speed operation. Where small size,

higher speed and greater reliability are important, a much better alternative is to

use an optocoupler. These use a beam of light to transmit the signals or data

across an electrical barrier, and achieve excellent isolation.

Optocouplers typically come in a small 6-pin or 8-pin IC package, but are

essentially a combination of two distinct devices: an optical transmitter, typically

a gallium arsenide LED (light-emitting diode) and an optical receiver such as a

phototransistor or light-triggered diac. The two are separated by a transparent

barrier which blocks any electrical current flow between the two, but does allow

the passage of light. The basic idea is shown in Fig.1, along with the usual circuit

symbol for an optocoupler. Usually the electrical connections to the LED section

are brought out to the pins on one side of the package and those for the

phototransistor or diac to the other side, to physically separate them as much as

possible. This usually allows optocouplers to withstand voltages of anywhere

between 500V and 7500V between input and output.

31

Optocouplers are essentially, digital or switching devices, so they’re best

for transferring either on-off control signals or digital data. Analog signals can be

transferred by means of frequency or pulse-width modulation.

Fig:19:Construction of Optocoupler

Fig:20:Pin Configuration

32

8

7

5

3

2

6PWM Input 1

20k

20K

4.70 k

+15V

LO1

HO7

HIN10

SHDN11

LIN12

VSS13 COM

2

VB6VCC

3 VDD9

VS5

U1

IR2110

10uf/63V

1

2

0.1uF

10uf/63V4

1

2

0.1uF 18V2

+15V

0

G1

10k

FR107

S1

PWM1 G2

18V20k

PWM2S2

PWM2

PWM1

FR107

10 k18V20k

8

7

5

3

2

6PWM Input 2

4.7k

1 2

14

7

U2A

4584

3 4

14

7

U2B

4584

20k1

20K2

+15V

4506

1 2

.01u

10uF / 63V

8

7

5

3

2

6PWM Input 3

20k

20K

4.70 k

+15V

LO1

HO7

HIN10

SHDN11

LIN12

VSS13 COM

2

VB6VCC

3 VDD9

VS5

U1

IR2110

10uf/63V

1

2

0.1uF

10uf/63V4

1

2

0.1uF 18V2

+15V

0

10k

FR107

PWM3

18V20k

PWM4

PWM4

PWM3

G3

S3

G4

S4

FR107

10 k18V20k

8

7

5

3

2

6PWM Input 4

4.7k

1 2

14

7

U2A

4584

3 4

14

7

U2B

4584

20k1

20K2

+15V

4506

1 2

.01u

10uF / 63V

33

8

7

5

3

2

6PWM Input 5

20k

20K

4.70 k

+15V

LO1

HO7

HIN10

SHDN11

LIN12

VSS13 COM

2

VB6VCC

3 VDD9

VS5

U1

IR2110

10uf/63V

1

2

0.1uF

10uf/63V4

1

2

0.1uF 18V2

+15V

G5

0

S5

10k

G6

FR107

S6

PWM5

18V20k

PWM6

PWM6

PWM5

FR107

10 k18V20k

8

7

5

3

2

6PWM Input 6

4.7k

1 2

147

U2A

4584

3 4

147

U2B

4584

20k1

20K2

+15V

4506

1 2

.01u

10uF / 63V

Fig:21:Optocoupler isolation.

20k

1

2

C

FR107

1

2

C

G1

S1

S2

G2

S3

G3

G4

S4 S6

G6

Q2IRF840

S5

G5

Q1IRF840

20k FR107

R

Y

B

20k

1

2

C

FR107

V1

Vdc

1

2

C

Q4IRF840

Q3IRF840

20k FR107

20k

1

2

C

FR107

1

2

C

Q6IRF840

Q5IRF840

20k FR107

Fig:22:Sample Power Module

34

4.6 OTHER COMPONENTS:

The other components used in the project include:

Diode –MIC4007 used in the bridge rectifier.

Capacitor Filter-2200 micro farad and 4700 micro farad.

Voltage regulators L7815 and L7915, 7805.

4.6.1 Quadruple 2- input AND gate

Fig:23:Pin Diagram of AND gate.

4.6.2 Dual JK flip flop:

35

Fig:24 : Pin Diagram of JK Flipflop

4.6.3 Quad Voltage comparator LM339-D:

36

Fig:25: Pin Diagram of LM339-D

Features

• Single or Split Supply Operation

• Low Input Bias Current: 25 nA (Typ)

• Low Input Offset Current: ±5.0 nA (Typ)

• Low Input Offset Voltage

• Input Common Mode Voltage Range to GND

• Low Output Saturation Voltage: 130 mV (Typ) @ 4.0 mA

• TTL and CMOS Compatible

• ESD Clamps on the Inputs Increase Reliability without Affecting

Device Operation

• NCV Prefix for Automotive and Other Applications Requiring Site

and Control Changes

• Pb−Free Packages are Available

CHAPTER 5

RESULT AND CONCLUSION

37

5.1 RESULT:

The VHDL code thus developed is downloaded onto the PROM IC of the FBGA kit

and the LCD is programmed in such a way that it displays the RPM of the motor.

300 RPM is set as minimum value and rated RPM 1500 is set as the maximum value.

The speed can be varied from minimum to maximum provided the rated voltage is

applied against the motor through the SPM. The PWM generated by the controller is

first sent to the AND gates so that only when the reference signal is high we get the

required output, i.e. the PWM is sent to the SPM where the DC is converted into AC.

The current sensor arranged will be connected in series with the SPM in order to

protect it from unwanted conditions such as short circuits. Fuses are arranged at

every stage in order to cut off the circuit in case of high currents. With the help of this

scheme a smooth and precise control over the Induction motor speed is successfully

achieved and verified using the hardware implementation.

5.2. CONCLUSION:

Sensorless position control of induction motors is a promising new technology though

in the early stage of development. Controlled induction motor drives without

mechanical sensors helps in reducing the losses due to mechanical stress and friction

between the motor shaft and the speed sensors (tachogenerators) generally used for

the purpose. The elimination of the speed sensors also reduces the cost of the overall

system as the extra wires used for the sensors are also not required. The current

sensorless control strategies uses microcontroller based DSP chips. The large

number of mathematical calculations involved in the estimation algorithms of the

system and the total requirement of the presented system easily surpass the

calculation power of such a chip , this approach also lacks parallelism and we have to

use different DSP chips for carrying out the calculations of different algorithms. This

increases the overall cost of the system and also the complexity of the system and

such a system is difficult to implement. A field programmable gate array (FPGA) is a

semiconductor device containing programmable logic components and programmable

interconnects. It has the ability to re-program in the field to fix bugs, and lower non-

recurring engineering costs. FPGAs architecture offer massive parallelism which

38

comes handy when used in the algorithms such as the one used in the present

system. That’s the reason why we are using FPGA chip instead of the conventional

DSP chips in the presented system as they take care of the massive and complex

mathematical calculations.

REFERENCES

1) Fratta, A. Vagati, and F. Villata. " vector control of induction

motor without the shaft transducers" conf. record of IEEE- power

electronics specialist conf.,April 1998.

2) Joachim Holtz “sensorless speed control and position control of

induction motor tutorial”, fellow, IEEE Wuppertal 42097 germany..

3) Motor control a reference guide www.st.com

4) Modelsim mentor graphics, model technology incoorporated,

tutorial

5) T. okuyama, N. huji moto and H. Hujii, "A simplified vector

control system without speed and voltage sensors", electrical engg.

in Japan, Vol110,

6) xilinx ISE tutorials http:// www.xilinx.com/support

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