Semiconductor Research Corporation

Semiconductor

Research

Corporation

COOPERATIVE RESEARCH

1990 Annual Report

Poster Sessions

Posters depicting results generated from SRC-sponsored research are prepared by graduatestudents to enhance their presentations at SRCevents. The poster sessions foster camaraderieand enthusiastic dialogue between the studentsand their audience of industry/governmentscientists and engineers.

On the left in the upper photograph, RobertMolyneaux is describing research at the Universityof Rochester. In the center of the lower photo-graph, Alan Mantooth is describing his project atthe Georgia Institute of Technology.

Semiconductor Research Corporation

Semiconductor

Research

Corporation


ContentsExecutive MessageMissionMembers/ParticipantsCorporate DevelopmentResearch OrganizationsThe SRC Research ProgramTechnology TransferFinancial Report

The Semiconductor Research Corpora-tion (SRC) plans and implements a programof applied research at leading U.S. universi-ties to strengthen the competitive ability ofthe U.S. semiconductor industry.

Its mission is to:

Identify the scientific and technologyneeds of the industry, develop a long-range strategy for meeting those needs,and carry out research that implementsthat strategy.

Enhance the semiconductor industry’smanpower resources.

Disseminate information and transfertechnology from the research program toSRC members on a priority basis.

Increase cooperation, provide technologyleadership, and advance and supportcompetitive responses.

248

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Semiconductor Research Corporation 1

Executive

Dr. Schwettmann

Message


Mr. Sumney

2 Executive Message

Since its formation in 1982, the Semiconductor Research Corporation has pioneeredcooperation in semiconductor technology at the research end of the technology chain.Today, the SRC is well positioned to continue its contributions to the competitiveness of theU.S. semiconductor industry.

Following the early success of the SRC, other cooperative ventures addressing technologyneeds were created and new programs are being discussed. As the value of cooperationbecomes more and more apparent, we will continue to examine the means by which we canincrease our effectiveness as an important part of these broader cooperative activities.

In 1990, the SRC had more than 100 contracts with 60 research organizations thatsupported approximately 250 faculty members and 700 graduate students. Every year, manyof these students complete their graduate education and, having an excellent background insilicon microelectronics, join the manpower base of the U.S. semiconductor industry. Duringthe year, the program generated 897 research reports and a variety of intellectual property,including 8 U.S. patents issued and 22 invention disclosures.

Our second general research conference, TECHCON ‘90, gave more than 550 attendeesa look at both the best results of the SRC Research Program and the technologies that willaffect the semiconductor industry and the program in the future.

The long-range research goals, originally written for the year 1994, have been extended tothe year 2001. This new goal set is now being used to define the SRC Research Program.The SRC is charged by its members with developing the long-range research strategy for theU.S. semiconductor industry, and the research goals were developed through an extensiveplanning process involving hundreds of people from our member companies and partici-pating government agencies.

The SRC’s membership base continues to expand. The number of small companiesparticipating in the research program as Affiliate Members more than doubled in 1990, andtwo national laboratories, Sandia and Los Alamos, became Associate Members. In a signifi-cant change in policy, the SRC opened membership opportunities to Canadian companiesfor the first time.

This Annual Report provides a picture of our cooperative program in 1990. As part of thisreport, we particularly want to thank the people from industry and government — some 700,in all — who served as members of the committees of our Technical Advisory Board and asmentors for individual research tasks. in large measure, the success of the SRC reflects theirefforts.

Frederic N. Schwettmann Larry W. Sumney

Chairman of the Board President

Executive Message 3

TECHCON ‘90

The photo above is an overhead view of theposter displays at the Technology Fair ofTECHCON ‘90, the SRC’s second community-wideconference that was held in San Jose, California,for three days in October.

Conference activities opened with a PlenarySession featuring leaders from industry, govern-ment, and academia who called for changes in thetrends that show a decline in the posture of theUnited States relative to international techno-logical leadership. During seventeen technicalsessions, SK-funded researchers presented 99papers describing their projects. A TechnologyFair, including more than 100 poster sessions andsoftware demonstrations that were prepared andconducted by SRC-funded graduate students,afforded the opportunity for one-on-one dialoguebetween the students and industry/governmentattendees. Eight invited papers given by industryscientists and engineers addressed future researchdirections and challenges.


TECHCON ‘90 surpassed TECHCON ‘88 instimulating interactive communication among themore than 550 participants. The exchange of ideascontinued during breaks between sessions, asshown in the picture on the facing page.

Mission

4 Mission

The Cooperative Research Mission

In nine years, the mission of the SRC hasnot changed, although it is often expressedin different ways and with differentemphasis:

... generic research in semiconductors,

... manpower with relevant skills,

... technology competitiveness

In whatever way the mission is described,it has been so successful that the expecta-tions to which the SRC must respond haveexpanded.

in silicon-device-related research inuniversities, the SRC’s efforts have rebuilt astrong community of researchers. Thisaccomplished, the effectiveness of thiscommunity must now be increased. TheSRC must be the source of knowledge thathelps industry meet its more immediateneeds and also serve the longer rangeimperative of providing the knowledge anddiscoveries that will enable the U.S. semi-conductor industry to lead the world adecade in the future.

This is a demanding challenge thatrequires radical changes in the researchestablishment. The SRC must search for themeans to catalyze the required changes,recognizing that this requires cooperationwith the many organizations participating inthis mission.

Mission 5

Technology Competitiveness

The SRC’s focus is on research andeducation, and these are important to thethird leg of the mission: technology competi-tiveness. Technology competitiveness ismuch more than just a research andeducation issue. Its achievement requiresmore in the way of resources and capa-bilities than the SRC or any other singleorganization can muster. For this reason, theSRC agenda includes cooperating withother organizations and with the federalgovernment and seizing opportunities asthey occur to promote the cause of semi-conductor technology competitiveness.

To this end, the SRC has ties and workingrelationships with industry associations andconsortia, with government and nationallaboratories, and with committees andcouncils concerned with technology andcompetitiveness. During 1990, the SRCparticipated in the new Technology Com-mittee of the Semiconductor IndustryAssociation, supported the planning effort ofthe National Advisory Committee on Semi-conductors for a long-range nationaltechnology initiative known as Micro Tech2000, established closer ties with two of theDepartment of Energy’s national labora-tories, and became more closely integratedwith the SEMATECH and MCC consortia.

The SRC Competitiveness Foundation,formed by the SRC in 1988, continued toexpand its education agenda. Both theGraduate Fellowship Program and theMicroelectronics Manufacturing EngineeringEducation curricula development program,which were developed by the SRC, weretransferred to the Foundation early in 1990.In addition, the Foundation’s innovativesummer program for high school math andscience teachers grew from a pilot programin 1989 to successful projects at three sites

Robert M. BurgerVice President

and Chief Scientist

in 1990. The importance of education at aillevels to the competitiveness of thesemiconductor industry dictates the con-tinuing close coordination of the program,resources, and people associated with boththe SRC and the Foundation.

The challenge to the semiconductorresearch community of the United Statescontinues. The members of this communitymust continue to evolve from competingamong themselves for limited resources tojoining together to address common goalsthat support the nation’s best interests. TheSRC accepts this challenge.

6 Mission

Toward 2001

Ten years ago, forecasts did not prepareus for the workstation-on-a-chip, one-halfmicrometer optical lithography, trenchtechnology, or prospects of a billion-dollarfab. Yet all of these are with us today. As wemove along our current trend lines, we mustbe constantly aware that a majority of signifi-cant advances follow from deviations fromthe trend, which some call paradigm shifts.

Many of the most successful industryproducts have resulted from bootleggedprojects as opposed to those that survivedthe endless round of reviews and secondguessing built into the system. Nowhere isthe pressure to avoid high-risk projectsgreater than in a cooperative researchenvironment when decisions are made byconsensus.

Looking to the future, the greatest chal-lenge to the SRC is to provide sufficientdirection to its research to maintain rele-vance while providing sufficient freedom toencourage exploration off the trend line. Bydoing this we may find how to get informa-tion into and out of single atom memorycells, to convert electron energy to photonscontrollably and efficiently, to fabricate theprogrammable interconnection substrate onwhich to applique our active chips, or todesign systems that are not replications of50-year-old relay logic.

In ten years, we almost surely will haverapid keyboard access to everything weneed to know — at least about semicon-ductors — and will be free to do more crea-tive work instead of literature searches. Andprobably we will have a less-costly way ofmaking chips, a/though we must recognizethe probability of limits beyond which thecosts of greater complexity exceed thebenefits of further integration.

Today, as it has every year since it wasfounded, the SRC is changing its researchagenda in response to semiconductor prog-ress and the search for the more ideal. It isseeking to provide sufficient utilizableproduct to maintain short-range viabilitywhile exploring the frontiers of knowledgefor the paradigm shifts — and all the whileremaining very much aware that the momen-tum of an enormous industry makeschanges very difficult.

Mission 7

Members as Mentors

In 1990, nearly 500 scientists and engineers whowork for companies belonging to the SRC partici-pated in the cooperative research program asIndustrial Mentors. Mentors establish direct con-tact with the faculty and students who carry outSRC research. They contribute guidance, exper-tise, and resources to the research effort andtransport new technology generated by theuniversities to practical applications in industry.

Shown above with rapid thermal processingequipment at North Carolina State University areSRC Mentor David Abercrombie of HarrisCorporation (foreground) and Professor J.J.Wortman, an SRC contract Principal Investigator.Mr. Abercrombie, who recently received an SRCOutstanding Mentor Award, first became involvedwith SRC research as a graduate student. Whenjoining the Harris staff, he was enthusiastic aboutcontinuing his association with SRC researchthrough the mentor program. He describesmentoring as being personally and professionallyrewarding, of major benefit to his company, and ofcritical importance to the overall success of theSRC.

Industry

Members

and

Government

Participants


8 IndustrylGovernment

Members

AT&TAdvanced Micro Devices, Inc.AlcoaControl Data CorporationDigital Equipment CorporationE.I. du Pont de Nemours & CompanyE-Systems, IncorporatedEastman Kodak CompanyEaton CorporationEtec Systems, Inc.General Electric CompanyGeneral Motors CorporationHarris CorporationHewlett-Packard CompanyHoneywell Incorpora tedIBM Corporationlntel CorporationLSI Logic CorporationMicron Technology, Inc.Motorola, IncorporatedNCR CorporationNational Semiconductor CorporationRockwell International CorporationTexas Instruments lncorporatedUnion Carbide CorporationVarian Associates, Incorpora tedWestinghouse Electric CorporationXerox Corporation

Associate Members

Los Alamos National LaboratoryMicroelectronics and Computer Technology

Corporation (MCC)Sandia National LaboratoriesSEMATECH, Incorporated

Affiliate Members

Advanced Technology Applications, Inc.Analogy Inc.Dawn Technologies, Inc.Epic Design Technology, Inc.Hestia Corporationlntegrated Silicon Systems, Inc.Intersonics, IncorporatedJamar Technology Co.Mission Research CorporationnChip, Inc.Peak Systems, IncorporatedQuanScan, Inc.Rapro Technology Inc.Sienna Technologies Inc.SlLVACO Data SystemsSolid State Equipment CorporationTechnology Modeling Associates, Inc.Techware Systems CorporationTyecin Systems Inc.Unit Instruments, Inc.WYKO CorporationXMR Inc.

Participating U.S.Government Agencies

Defense Nuclear Agency (DNA)National Institute of Standards

and Technology (NIST)National Science Foundation (NSF)National Security Agency (NSA)Office of Naval Technology (ONT)Wright Laboratory

Industry/Government 9

Research Reviews

The SRC had more than 700 contracts withresearch organizations in 1990. The studies beingperformed under these contracts included approxi-mately 250 research tasks. Contract renewal iscontingent upon the results of annual researchassessments performed by SRC corporate staffand the industrylgovernment representatives whomake up the committees of the Technical AdvisoryBoard. For efficiency and cost-effectiveness, theSRC has been holding an increasing number ofmultiple-contract reviews. The photo above showsa review team at MIT as they were assessingresearch results presented by faculty and graduatestudents from several single-task and multiple-taskcontracts.

Corporate

Development

and

Government

Relations


10 Corporate Development/Government Relations

Membership

Semiconductor industry organizationsbased in the United States and Canada canjoin the SRC in one of three categories:Members, Associate Members, and AffiliateMembers.

Members are semiconductor manufac-turers and users with semiconductor-relatedsales greater than $30-million/year. Thenumber of Members has grown from 11founding companies in 1982 to 28 com-panies in 1990, including almost all of thelargest manufacturers and users.

Associate Members are organizations thatparticipate in semiconductor R&D but do nothave a product for sale.

Affiliate Members are small companiesthat manufacture or supply equipment,materials, and software to the industry.

In 1990, seven teen organizations joinedthe SRC: two Members (Alcoa and EtecSystems), two Associate Members (SandiaNational Laboratories and Los AlamosNational Laboratory) and 13 AffiliateMembers (Advanced Technology Applica-tions, Analogy, Hestia, lntegrated SiliconSystems, Intersonics, Jamar Technology,Mission Research, nChip, QuanScan,Sienna Technologies, Techware Systems,Tyecin Systems, and WYKO). Affiliatemembership reached an all-time high thisyear.

The working body through which memberorganizations and participating governmentagencies influence the direction of SRCresearch is the SRC Technical AdvisoryBoard (TAB).

D. Howard PhillipsSenior Director,

Corporate Developmentand Government Relations

Government Relations

U.S. Government organizations have par-ticipated in the SRC since 1986 through aMemorandum of Understanding betweenthe SRC and the National ScienceFoundation.

A Government Coordinating Committee(GCC) serves as an advisory body to theSRC Board of Directors. Members of thiscommittee include, but are not limited to, thefederal agencies that fund SRC research.

Government Coordinating CommitteeChairperson:K. Speierman National Security Agency

Secretary:Richard D. LaScala SRC

Ray M. Bowen National Science FoundationRobert M. Burger SRCEdwin B. Champagne Wright LaboratoryLewis M. Cohn Defense Nuclear AgencyWilliam J. Edwards Wright LaboratoryC. Edward Ho//and, Jr. SRCHarold L. Hughes Naval Research LaboratoryNorman Kreisman U.S. Department of EnergyFrank F. Oettinger N/STD. Howard Philips SRC

Corporate DevelopmentlGovernrnent Relations 11

Technology Exchange

The SRC Research Program fosters inter-departmental and interdisciplinary cooperativeresearch within universities and providesopportunities for researchers to meet with theiroff-campus colleagues from other researchorganizations. In the photo above (left to right),Professors J.J. Wortman of NC State, A.F. Taschof Texas at Austin, and J.D. Plummer of Stanfordare sharing an informal discussion at an SRCevent on the Stanford campus.

Research

Organizations


1 2 Research Organizations

Research Organizations

University of ArizonaArizona State UniversityAuburn UniversityBoston UniversityUniversity of California at BerkeleyUniversity of California at IrvineUniversity of California at Los AngelesUniversity of California at Santa BarbaraUniversity of California at Santa CruzCalifornia Institute of TechnologyCarnegie Mellon UniversityCase Western Reserve UniversityClemson UniversityUniversity of Colorado at BoulderColorado State UniversityColumbia UniversityCornell UniversityDavid Sarnoff Research CenterDuke UniversityUniversity of FloridaFlorida Institute of TechnologyFlorida State UniversityGeorgia Institute of TechnologyUniversity of Illinois at Urbana/ChampaignLehigh UniversityLouisiana State UniversityUniversity of MarylandUniversity of Massachusetts at AmherstMassachusetts Institute of TechnologyMassachusetts Microelectronics CenterUniversity of MichiganMicroelectronics Center of North CarolinaUniversity of MinnesotaNew Jersey Institute of TechnologyUniversity of New MexicoUniversity of North Carolina at Chapel HillUniversity of North Carolina at CharlotteNorth Carolina State UniversityNortheastern UniversityThe Ohio State UniversityPrinceton UniversityPurdue UniversityRensselaer Polytechnic InstituteResearch Triangle institute

University of RochesterRochester Institute of TechnologyRutgers, The State UniversitySandia National LaboratoriesUniversity of South FloridaUniversity of Southern CaliforniaStanford UniversityState University of New York at AlbanyStevens Institute of TechnologyUniversity of Texas at AustinThe Texas A&M UniversityVanderbilt UniversityUniversity of VermontUniversity of VirginiaUniversity of WisconsinYale University

University Advisory Committee (UAC)

The SRC University Advisory Committee is anindependent body of university faculty thatprovides counsel on issues relative to theuniversity community. This body has animportant role in recommending policy for theresearch program.

Chairperson:Kensall D. Wise

Secretary:Cynthia L. Grotz

Jacob A. AbrahamJames F. FreedmanPaul GrayDavid V. Kerns, Jr.W. W. LindemannNoel C. MacDonaldNino A. MasnariCarlton OsbornR. Fabian PeaseJohn L. Prince IIIL. Rafael ReifRonald A. RohrerAl F. Tasch, Jr.

Michigan

SRC

Texas/AustinSRCUC/BerkeleyVanderbiltMinnesotaCornellNC StateMCNCStanfordArizonaM I TCarnegie MellonTexas/Austin

Research Organizations 13

Chocolate Drop?

This iridium-coated polysilicon stylus, with a tipdiameter of about 0.1 was produced usingprecision micromachining as part of a multi-channel surface profilometer being developed atthe University of Michigan. Such scan tips can beused in both contacting and non-contactingmodes and can be read out either optically orelectronically using on-chip circuitry. In the non-contacting mode, the polysilicon beam is driven atresonance; and the resonance shift produced bysurface forces is used in a closed feedback loop toessentially implement an atomic force microscope.The tip shown here was produced using a com-pletely dry etching process in an RIE whoseperformance these scan tips will eventuallymonitor. Additional research in machine vision isattempting to enhance the images such tipsproduce by deconvolving the stylus tip shapeagainst the measured surface profile to extract thetrue surface shape. These profilometers promise toallow the accurate determination of sub-0.1 surface features for the rapid feedback of infor-mation intended to assist in optimizing future VLSIetching processes.


Professor Ken D. WiseUniversity of Michigan

The

SRC

Research

Program

14 The SRC Research Program

Research Integration: The SRC Strategic Goals

The SRC Research Program is goaloriented. Goals are established through aclose working relationship between seniormembers of the SRC corporate staff andcommittees of the Technical AdvisoryBoard.

The strategic plan is used to guide, focus,and prioritize the projects and to provide abasis for measuring progress. The intent isto fund those technology areas that aremost important to the international com-petitive strength of the industry and that areappropriate candidates for universityresearch.

The research is executed principally inthe U.S. university system; and the SRC hasbeen able to foster a high degree of coopera-tion among industry, government, and aca-demia. Since most of the research requiresthe skills of several fundamental disciplines,the SRC has also catalyzed interdisciplinaryresearch within the university system.

To provide a research strategy thatreflects industry requirements for a 10-yeartime span, the SRC conducts technologytrend assessments. The SRC employs twoapproaches to increase the confidence levelof projections defining the technology vision.The first approach identifies the technologytrends over a period of the past, andextends these trends monotonically into thefuture (“technology push”). An alternatemethod involves envisioning the productapplications of the future and the technicalrequirements to produce these products(“product pull”). An examination of theresults of these two approaches identifiesareas where technology projections fallshort of meeting product requirements. This,in turn, identifies those research areaswhere new approaches are necessary.

James J. FreedmanVice President,

Research Integration

Technology assessments resulted in thespecification of the SRC 2001 TechnologyGoal Set. Since the SRC is only one ofseveral elements in the total technologychain, the SRC must coordinate its researchefforts with the other links in the chain. TheSRC 2001 Strategy accomplishes thislinkage.

Executive Committeeof the Technical Advisory Board (TAB)

Co-Chairpersons:James F. FreedmanEdward L. Hall

S e c r e t a r y :Cynthia L. Grotz

John D. BastianJohn R. CarruthersPallab ChatterjeeJames M. DaughtonLowell D. DeckardRichard C. DonovanJames DuleyEugene D. FeitWilliam R. GriffinSam HarrellThomas L. HaycockRandall IsaacStephen KnightTyler LowreyJohn M. PierceLlanda M. RichardsonCourt SkinnerJames N. SmithJack SolomonK. SpeiermanWilliam E. StarksBarry B. WhalenKensall D. WiseDonald L. Wollesen

S R CMotorola, Incorporated

S R C

Rockwell lnternational Corporationlntel CorporationTexas Instruments IncorporatedHoneywell IncorporatedNCR CorporationAT&THewlett-Packard CompanySEMATECHIBM CorporationSEMI/SEMATECHHarris CorporationIBM CorporationA T & TMicron Technology, Inc.National Semiconductor CorporationDigital Equipment CorporationNational Semiconductor CorporationMotorola, IncorporatedUnion Carbide Industrial Gases, Inc.National Security AgencyVarian Associates, IncorporatedM C CUniversity of MichiganAdvanced Micro Devices, Inc.

Research Strategy 15

Research Operations

The U.S. semiconductor industry dependson the SRC to conduct university-basedresearch that is forward-looking yet relevantto industry’s needs. As long-term industryresearch has been reduced, universityresearch has become increasinglyimportant.

The SRC is the first research cooperativein a high technology industry and is excep-tionally beneficial to all participants. Univer-sities benefit from the knowledge contrib-uted by the SRC’s industry partners. Industrybenefits from the increased relevance of theresearch. Students benefit from the higherquality of their educational experience. TheU.S. infrastructure benefits from a success-ful cooperative paradigm. The U.S. Govern-ment benefits from the availability of moreadvanced technology.

SRC-funded projects address challengesin integrated circuit design, in device andcircuit technology related to microstructurescience, in manufacturing processes andsystems, and in packaging. The division ofeffort is shown in the bar chart.

The objective of SRC Design Sciencesresearch is to strengthen the internationalcompetitiveness of the United States indesign technology leading to unsurpassedquality, minimum cost, and minimum time tomarket for technology-driven integratedcircuit and electronic system products. Theaim is to achieve a 30-fold increase indesigner productivity within the next decadewhile applying a methodology of single-passdesigns and a philosophy of correct-by-construction. Emphasis is currently shiftingfrom chip design to multichip modules andsystem design principles and to the explor-ation of new algorithms supporting con-current engineering philosophies.

16 Research Operations

Microstructure Sciences research isfocused on a 0.15 micron minimum featuresize technology. This will enable the produc-tion of single-chip integrated circuits withover 100 million active devices operating atclock rates exceeding 500 megahertz. Tothis end, emphasis is on device technologythat overcomes problems associated withthe “shrink path,” alternate process archi-tectures for high yields, and circuit elementsthat are tolerant of defects and variances.

Manufacturing Process Sciencesresearch emphasizes process technologieswith sufficient flexibility to produce thediversity of circuits required for futureproducts. Objectives are a reliability of0.1 FIT, a placement accuracy of 30 ang-stroms, and a manufacturing environmentwhere particle sizes are less than 300 ang-stroms with less than 0.05 killer defects persquare centimeter. Advanced lithography,deposition, and etch tools are key elements.X-ray lithography, feed forward processingtools operating in clusters, and configura-tions for minimum costs of manufacturing ina flexible environment are the elements ofthe research.

Manufacturing Systems Sciences dealswith factory environment and operations.Factory management systems with SQCanalysis and feedback, utilizing automatedtools with in-situ sensors and based onphysically derived process models, areenvisioned. Models are being developed tomaximize factory throughput for all loadingswhile operating at minimum unit cost.

Packaging research is focused on low-cost packaging while also investigatinginnovative system-level multichip concepts.Objectives are to provide at least 60-wattpower dissipation while maintaining a rise

William C. HoltonVice President,

Research Operations

C. Edward Holland, Jr.Director, SEMATECH

Centers-of-Excellence Program

time performance of 150 picoseconds withan input/output of 2000. Steps are under-way to organize Packaging Sciences as amajor research area in the SRC program.

An important and productive part of theSRC research program is funded throughSEMATECH. Although the elevenSEMATECH Centers-of-Excellence(SCOEs) are focused strongly on tech-nologies supporting wafer fabrication, theirresearch is integrated with the broader SRCresearch agenda in supporting industryneeds. SCOEs are identified in the budgetpie charts that follow.

Research Operations 17

SRC Research in Design Sciences

34%Design Synthesis/Verification

UC/BerkeleyUC/IrvineCarnegie MellonCase Western ReserveMassachusettsPrincetonSouthern CalVirginia

4.3%Factory

AutomationUC/BerkeleyFlorida SCOEPennsylvania SCOE

UC/Berkeley UC / Santa CruzCarnegie Mellon Illinois

Maryland NC State

Stanford 10.4% RutgersDesign Systems Texas/Austin

UC/BerkeleyCarnegie Mellon

The 1990 budget for research in Design Sciences was$6.1 million. The pie chart shows the percentage of thisbudget that was allocated to each major technologyarea.

The Design Sciences segment of the SRCResearch Program focuses on the issuesthat will enable designers of products toexploit the ULSl technologies being devel-oped in Microstructure Sciences, Manufac-turing Process Sciences, and ManufacturingSystems Sciences.

In the near term, Design Sciencesfocuses on synthesis of digital and analogcircuitry, generation of comprehensive testsequences for digital products, innovativecircuit design techniques, advanced designmethodologies, and product developmentenvironments. In the medium term, today’scapabilities will be enhanced to compre-hend large, multichip systems consisting ofcomplex analog and digital subsystems. Onthe farther horizon, Design Sciencesresearch strives for full automation of thedevelopment of complex, system-levelproducts.

The relative funding levels for the varioussegments of the Design Sciences agendaare based on priorities suggested by theDesign Sciences Committee and on theunique strengths of the various institutions.

New thrust areas and updated priorities insupport of the 2001 goal set have beendeveloped in cooperation with the DesignSciences Committee. In addition to theirefforts in developing the new goal set,members of this committee evaluated eachof the research projects during formalResearch Reviews and assessed a largenumber of new proposals.

18 Design Sciences

1990 Key Research Results

The ACACIA system has been improvedsignificantly. Synthesized analog functionswere demonstrated to occupy one-third ofthe area previously used.

A functional interface allowing differentTechnology CAD tools to access waferdata was released.

Major enhancements to the TimberWolfphysical design system were completed,including analog placement features andmajor performance and layout qualityimprovements.

A system generated complete test setsfor a 100,000 transistor video processorchip design supplied by an SRC member.

An oversampling modulator demonstrated12-bit resolution at a Nyquist Rate of 2 MHz.

1990 Events

The following events were sponsored byDesign Sciences in order to further theresearch agenda and to disseminate results.

Topical Research Conference on theSynthesis of Testable Designs

Workshop on System-Level CAD

Workshop on Designing for Quality

Technology Transfer Course on theiSPLICE3 Mixed Analog/Digital Simulator.

Technology Transfer Course on ACAClAAnalog Synthesis System.

Technology Transfer Course on theMIS-II Logic Synthesis System.

Jeffrey L. HilbertDirector,

Design Sciences

Industrial ResidentsJustin E. Harlow IllNational Semiconductor CorporationProgram Manager, Design Sciences

Kenneth L. Poceklntel CorporationProgram Manager, Design Sciences

Design Sciences Committeeof the Technical Advisory Board (TAB)

Chairperson:William R. Griffin

Vice-Chairperson:Jack Mullins

Anil AgarwalPaul J. AinslieLarry BashawHerbert S. BennettHenry BlumeChar/es T. BrodnaxBasant ChawlaBernie ChernLewis M. CohnW. Terry CostonManuel A. d’AbreuAntun DomicJames DuleyDavid FrancoIan GetreuDennis HeinbuchJohn W. HinesWilliam JohnsonRobert P. LarsenTeh-Hsuang LeeWilliam E. MossJoseph A. MuslinKenneth RayBill ReadGreg RobertsJames RutledgePeter W.J. VerhofsfadtVincent Zagardo

IBM Corporation

NCR Corporation

Alcoa Electronic Packaging, Inc.Delco Electronics CorporationHoneywell lncorporatedN I S TIntel CorporationE-Systems, lncorporatedAT&TNational Science FoundationDefense Nuclear AgencyHarris CorporationGeneral Electric CompanyDigital Equipment CorporationHewlett-Packard CompanyXerox CorporationAnalogy Inc.National Security AgencyWright LaboratoryTexas Instruments IncorporatedRockwell lnternational CorporationEastman Kodak CompanyAdvanced Micro Devices, Inc.Hughes Aircraft CompanyMotorola, lncorporatedM C CMicron Technology, Inc.SEMATECHNational Semiconductor CorporationWestinghouse Electric Corporation

Design Sciences 19

The 48-Hour Chip Layout

Product introduction cycles must becomeshorter each year, even as the complexityand performance requirements of theproducts increase exponentially. Thisproject has demonstrated what futuredesign technologies may offer. Theresearch team undertook the layout of aten-point Fourier Transform processor chipin under 48 hours, using USC’s develop-mental ADAM synthesis system in conjunc-tion with a commercial Silicon Compiler.Starting with a behavioral specification ofthe processing algorithms, the teamdebugged the design and produced a layoutin two working days. This effort resulted in achip just over 5 mm square that will producea new result every 210 nanoseconds. Thegroup has also developed a robot arm con-troller in less than a week and is continuingto push the synthesis technology toward“The 48 Hour Chip Layout” needed in futuredesigns.

Professor Alice C. ParkerUniversity of Southern California

This chip, synthesized by the ADAM system, implements anovelalgorithm which produces a new Fourier transform resultevery 210 nanoseconds. Specified in the VHDL language, thesynthesis and layout took only 48 hours.

Workstation image of the SpecSyn tool thatprovides for formal,yet simple, system behavior specification and possesses avariety of capabilities for rapid exploration of alternative chipimplementations.

The SpecSyn Tool

High-level system specifications are veryabstract about such information as com-munication protocols and transactionresponse rates. Traditionally, this infor-mation has been captured in the Englishlanguage and translated to various com-puter representations during system design.This research effort aims to capture thedesign knowledge of a complete system,potentially consisting of many chips, in anExecutable Specification. The SpecSyn tool,currently in development, provides powerfulsystem planning capabilities that can auto-matically partition the specification intochips, determine a good busing scheme,and synthesize interfaces for differentcommunication protocols with the goals ofmeeting constraints on chip cost andperformance.

Professor Daniel D. GajskiUniversity of California at Irvine

20 Design Sciences

On-Chip Automatic Tuning for Analog MOS ICs

Continuous-time analog ICs are natu-rally suited for high-speed applications inmixed analog/digital MOS VLSI systems.A crucial design issue in many high-performance analog ICs is the accurateon-chip implementation of circuit RCtime-constants. Although these analogICs use voltage-controlled MOS resistors,it is difficult to achieve accurate time-constants due to random variations inprocess parameters. A subtle circuitdesign solution to this problem is to use“master-slave” on-chip automatic tuning.The circuit shown in the schematic is anovel on-chip automatic tuning circuit“master” based on a switched-capacitorresistor in a gain control loop. It is used toautomatically adjust the time-constants ofmany analog ICs “slaved” on the samechip as long as they are at a closeproximity to the tuning circuit. The circuitwas built on a 2 CMOS p-well processto tune an amplitude equalizer filter. Thephotomicrograph shows the equalizer (lefthalf of the picture) and the tuning circuit(upper right-hand corner). It significantlyreduced the error in the center frequencyof the equalizer to less than 1% over atemperature range of -5°C to 70°C.

Photomicrograph of the equalizer circuit with on-chip automatictuning.

Professor Mohammed lsmailOhio State University

The automatic tuning circuit.

Design Sciences 21

SRC Research in Microstructure Sciences

The 1990 budget for research in MicrostructureSciences was $10.3 million. The pie chart shows thepercentage of this budget that was allocated to eachmajor technology area.

Microstructure Sciences is concernedwith the phenomena, structures, materials,and processes used to fabricate semi-conductor devices and integrating thesedevices into ULSI circuits. The mission is torealize ICs of increased density and per-formance, utilizing new active devices,submicron structures, new materials, andnovel processes.

Major near-term priorities include gateoxide processes and reliability, multilevelmetal enhancements, modeling of devicesand processes, improved understanding ofphysical and chemical phenomena, andCVD/epitaxial processes. Extended-termpriorities include selective deposition, 3Ddevice and 2D process simulators, powerICs, SOI, and Si-Ge processes and struc-tures. Longer range priorities include 3Dstructures, quantum structures, low-temperature operation, and interconnectparadigms. Exploratory concepts includeatomic layer doping, optoelectronics-on-Si,neural network structures, and quantumdevice functional blocks.

The Microstructure Sciences Committeestrongly supported SRC research in 1990 bytheir participation in several strategicplanning sessions and in nine muitiple-contract reviews. In addition, 150 highlyappreciated Industrial Mentors contributedguidance, samples, and equipment toMicrostructures research.

22 Microstructure Sciences


A self-limiting oxynitride gate dielectricproduced by rapid thermal processing inN2O ambient, with a large charge-to-breakdown, less charge trapping, andsignificantly reduced interface stategeneration.

A power modulation technique that canbe applied directly to industrial reactors todetermine dominant chemical reactions,including intermediates, and reactionrates.

A novel tungsten-containing DUV photo-resist which, after development and subse-quent oxidation and reduction treatments,produces a W seed layer for selectiveCVD or electroless plating.

A universal electron inversion layermobility model for SPICE circuit simula-tion, without requiring refitting of themodel parameters for any new ormodified process sequences.

1990 Events

The following three 1990 SRC eventswere sponsored by MicrostructureSciences. The total attendance forthese three events was 190.

Technology Transfer Course onIntegrated Technology Modeling forIntegrated Circuit Process and DeviceDesign

Topical Research Conference on Inter-connect Technology

Workshop on Integrated SemiconductorRepresentations for Technology CAD

William T. LynchDirector,

Microstructure Sciences

lndustrial Residents

John E. GraggMotorola, IncorporatedProgram Manager, Microstructure Sciences

Peter VerhofstadtNational Semiconductor CorporationProgram Manager, Microstructure Sciences

Microstructure Sciences Committeeof the Technical Advisory Board (TAB)

Chairperson:John M. Pierce

Vice-Chairperson:Michael Garner

Nara AnanthaHerbert S. BennettBob BlewerJames T. ClemensRon DasMarvin GarfinkelLen GruberTapan GuptaDennis HerrellThomas Y. HsiangJack S. T. HuangHarold L. HughesBrooke JonesWilliam J. LautenbergerDavid L. LoseeGayle MillerDavid E. MossYoshio NishiTimothy R. OldhamA.L. RivoliJames RutledgeLarry SchmitzRobert A. StehlinClarence J. TracyJames C. VeselyNancy WelkerRobert M. Werner

National Semiconductor Corporation

lntel Corporation

IBM CorporationNISTSandia National LaboratoriesAT&TAdvanced Micro Devices, Inc.Genera/ Electric CompanyDigital Equipment CorporationAlcoa Electronic Packaging, Inc.MCCNational Science FoundationHoneywell IncorporatedNaval Research LaboratoryRockwell International CorporationE.I. du Pont de Nemours & CompanyEastman Kodak CorporationNCR CorporationDelco Electronics CorporationHewlett-Packard CompanyHarry Diamond LaboratoriesHarris CorporationSEMATECHHughes Aircraft CompanyTexas Instruments IncorporatedMotorola, lncorporatedXerox CorporationNational Security AgencyWright Laboratory

Microstructure Sciences 23

PISCES Program Enhanced

Two-dimensional device simulation usingStanford’s PISCES program now providesenhanced usability and flexibility. TheSIMPL-IPX interface (see Figure 1a) hasbeen modified to incorporate PISCES dialogcommands and thereby initiate deviceanalysis automatically. New PISCES utilitiessupport generalized auto-gridding (seeFigure 1b) so that the user is relieved of thiscomplex and often tedious task. Interactivebias specification is provided so that theuser interacts with the program in a way thatemulates a real measurement system (i.e.,the HP 4145). In order to achieve efficient“curve tracer” mode simulations, PISCESnow includes new bias projection capabili-ties so that the program automatically andefficiently chooses bias points to obtainsmooth I-V curves.

Figure 1a. Cross section of device after process simulation

In contrast to simulators that are devicespecific, PISCES accommodates generalbias conditions (dc, ac and transient) andcomplex and non-planar geometries. Newcapabilities are being developed for multi-material systems, both silicon- andcompound-based heterojunction devices.Using a layout-based approach, PlSCEScan quick/y extract key technologydependencies of a wide variety of ICdevices (bipolar, MOS and parasitic effectssuch as latchup). Such flexibility is invalu-able both to technologists and IC circuitdesigners.

Figure1b. PISCES grid

Professor Robert W. DuttonStanford University

24 Microstructure Sciences

Blanket and Selective Copper CVD Program

This project is developing a manu-facturable chemical vapor deposition(CVD) process for selective andblanket copper for one-half micro-meter and smaller generations ofdevices.

In 1990, CVD of high purity copperwas achieved at low temperatures(150-350°C), using precursors in a cold wall reactorwith deposition rates greater than100 and with uniformities of±1% across a 125 mm wafer. Highquality films with resistivities of1.7 have been demonstrated.This chemical process is practicaland environmentally friendly.

Demonstrating the feasibility ofselective copper CVD and itsdependence on substrate type,morphology, and degree of inter-action with hydrogen has led toidentifying a mechanism for selec-tivity. This is being investigated, anda “four-step” process for selectivegrowth is being developed andtested.

Professor Alain E. KaloyerosState University of New York at Albany

SUBLIMATOR

NEEDLE VALVE

MASS FLOW CONTROLLER

NEEDLE VALVE

PRECURSORSOURCE

Schematic drawing of the customized 5” wafer cold-wallCVD reactor used for copper deposition.

Chemical structure of the precursors.RI and R2 represent radicals such as CH3 or CF3.

Research students Kirsten Belles and Chris Dundon settingup a CVD reactor for copper deposition.

Microstructure Sciences 25

SRC Research in Manufacturing Process Sciences

14%X-Ray LithographyWisconsin SCOELouisiana StateVanderbilt

19%Optical Lithography

13%Contamination

Control

California SCOEUC/Santa Barbara

ClemsonMinnesota

in High Vacuum,and Ellipsometry

North Carolina SCOE

New Mexico SCOEArizona State

Technology6%

Rapid ThermalProcessing,

Equipment Modeling,Metallization

NC State

The 1990 budget for research in Manufacturing ProcessSciences was $6.6 million. The pie chart shows thepercentage of this budget that was allocated to eachmajor technology area.

The Manufacturing Process Sciencesmission is to provide a basis for improvedunderstanding, control, and application ofsemiconductor fabrication processes and toextend their capability to the 0.15 microndevices of the next decade. Current empha-ses include both optical and X-ray lithog-raphy, etching, and deposition and sup-porting efforts in metrology, contaminationcontrol, and reliability.

Optical lithography research focuses onnew sources, system design to extend reso-lution, novel resist concepts, and dry devel-opment approaches for surface imagingresists. X-ray lithography addresses thecapabilities of proximity printing.

Etching explores excitation schemes thatgive the highest etch rate, maximumanisotropy and uniformity, and minimumdamage from ion bombardment.

Deposition research deals with processesand tools for the cluster environment.

Metrology encompasses techniques fortemperature measurement, critical designdimensions, pattern wafer profiles, filmcomposition, and properties in real time.

Contamination Control addresses thedetection, removal, or elimination ofparticles throughout the fabricationoperation and the understanding of therelationship between contaminationconcentrations and electrical defects.

Reliability studies relate to acceleratedtesting and modeling of major failure modesand to modeling the influence of designparameter and process variance on theaging of circuit performance.

26 Manufacturing Process Sciences


An optical technique to measuretemperature change with a resolutionbetter than 0.5°C.

An optical technique to measure latentimage during photoresist exposure.

Implementation of a solid-state deepultraviolet (DUV) source for lithography

Development of a 3D model of asimulation of X-ray proximity maskdistortions that would result from con-struction, mounting, and irradiation.

An O2 plasma-robust, DUV-sensitive,Novolac-based photoresist.

Low temperature remote plasma CVDoxides with properties superior to thermaloxides.

1990 Events

Four SRC events were sponsored during1990 to bring together participants from theSRC community. These included the fol-lowing Workshops and Topical ResearchConferences (TRC):

TRC on High Reliability Gate Dielectrics

Workshop on Temperature Measurementin Single- Wafer Processing

TRC on Metrology for SemiconductorManufacturing

TRC on Lithography

J. Richard BurkeDirector,

Manufacturing Process Sciences

Industrial Resident

Syed RizviTexas Instruments IncorporatedProgram Manager, Manufacturing Process Sciences

Manufacturing Process Sciences Committeeof the Technical Advisory Board (TAB)

Chairperson:William E. Starks Varian Associates, Incorporated

Vice-Chairperson:P.B. Ghate Texas Instruments Incorporated

Ken Bano Digital Equipment CorporationGrant A. Beske E.I. du Pont de Nemours & CompanyJulian Blake Eaton CorporationTom Bowers Advanced Micro Devices, Inc.Dennis F. Brestovansky Union Carbide lndustrial Gases, Inc.William Brodsky A T & TRaymond E. Cook National Security AgencyBilly Lee Crowder IBM CorporationRaymond T. Ford Harris CorporationGilbert Hawkins Eastman Kodak CompanyDennis Herrell MCCMary E. Kinsella Wright LaboratoryRay Kjar Rockwell International CorporationRonald P. Kovacs National Semiconductor CorporationLoren W. Linholm N / S TAndrew F. McKelvey NCR CorporationRichard W. McMahon Techware Systems CorporationC. Joseph Mogab Motorola, IncorporatedTom Mullikin E-Systems, IncorporatedPravin Parekh Honeywell IncorporatedSamuel Ponczak Westinghouse Electric CorporationRobert B. Reams Harry Diamond LaboratoriesJames Rutledge SEMATECHBaylor Bunting Triplett lntel CorporationBranimir von Turkovich National Science FoundationAlbert Wang Hewlett-Packard CompanyDouglas Weaver Sandia National Laboratories

Manufacturing Process Sciences 27

Photoresist Exposure Control

28

Light scatter (diffraction) tech-niques have been used to directlymonitor the dose in undevelopedphotoresist resulting from exposure.The latent image of a periodic struc-ture in the photoresist is illuminatedwith a laser, and the diffracted light isindicative of the resulting criticaldimension (CD) in the subsequentlydeveloped photoresist. The tech-nique is useful for controlling expo-sure when the optical properties ofthe substrate change, such as fromvariations in film thickness resultingfrom wafer processing. The graphshows the improvement in CD con-trol provided by the diffractiontechnique (indicated by “SimulatedClosed-Loop Control”) compared tothe present control technique (“FixedExposure Time”). CD variation isreduced by more than 2X for 0.7 lines and more than 3.7X for 1.0 lines. The technique has beenapplied to several photoresist types,including a chemically amplifieddeep UV resist. The technique canbe applied to periodic structures150 or smaller.

Professor J. Robert McNeilUniversity of New Mexico

0 . 7 1

0 . 7

0 . 6 9

0 . 6 8

0 . 6 7

0 . 6 6

0 . 6 5

0 . 6 4

SimulatedClosed-Loop

Control

Fixed Exposure Time = 0.0369

0 . 2 4 0 . 2 5 0 . 2 6 0 . 2 7 0 . 2 8 0 . 2 9

Poly-Si Film Thickness (microns)

Critical Dimension (CD) Uniformityfor Nominal 0.7 Lines

Manufacturing Process Sciences

X-Ray Lithography

The Wisconsin Center for X-ray Lithography(CXrL) is using radiation from the electronstorage ring, Aladdin, as a source of intense,well-collimated X-rays to develop a synchrotron-radiation X-ray lithography baseline process forsubmicron feature sized ICS. CXrL researchencompasses the design of manufacturing tools,X-ray mask standards, process-modeling CADtoo/s, and X-ray-sensitive photoresists. The goalis to develop the technology base for <0.25micron technology and to demonstrate deviceshaving these features sizes.

Research on understanding and controllingthe microscopic deformations occurring inmasks during normal use has led to NIST

SEM micrograph of 0.10 lines on silicon exposed atCXrL. Height of lines is 1.0

proposals for improved mask designs for use by U.S. industry. CXrL has designed with the Universityof Minnesota a test chip for a six-level NMOS process that includes process control monitors, para-metric test devices, and enhancement and depletion mode transistors in a ring oscillator circuit. Thischip also uses a novel submicron alignment scheme. Processing this chip is intended to be the firststep toward identifying any barriers impeding the use of X-ray lithography.

Professor Franco CerrinaUniversity of Wisconsin

Mask modeling. Figure (A) is a cross sectional view of the finite element model of an X-ray lithography mask. Figure (B) is a sideview of a kinematically mounted mask support ring displaced by gravity.

Manufacturing Process Sciences 29

SRC Research in Manufacturing Systems Sciences

36%PackagingArizonaAuburnCornellLehighOhio StatePurdueStanford

14.5%Rapid Learning

MichiganPennsylvania SCOEStanford

Automationand Control

StanfordTexas SCOE

26.5%Equipment/Process

Automation and ControlUC/BerkeleyCarnegie MellonMichiganStanford

The 1990 budget for research in Manufacturing SystemsSciences was $4.5 million. The pie chart shows thepercentage of this budget that was allocated to eachmajor technology area.

Manufacturing Sciences was divided intotwo new Science areas in 1990: Manufac-turing Process Sciences and ManufacturingSystems Sciences. The division was madeto accommodate the increase in the manu-facturing program resulting from the infusionof funds from SEMATECH and the impor-tance of the systems and packagingaspects of the semiconductor manufac-turing enterprise.

Manufacturing Systems Sciences islargely focused on the software support andassociated hardware required to manage anefficient semiconductor manufacturingoperation. The research falls naturally intotwo major segments: (1) the monitoringand control of the direct wafer manufac-turing process, and (2) the management ofthe manufacturing enterprise as a who/e,including lot scheduling and other factorsaffecting wafer cost and throughput time.

Research in semiconductor packagingwas included under Manufacturing SystemsSciences in 1990, and was increased bymore than 30% in recognition of its breadthand scope. Packaging research is dividedinto two segments: (1) the softwareaspects of package design, analysis, andsimulation, and (2) the aspects of materials,process, and measurements.

The distribution of the $4.5 million fundingin Manufacturing Systems Sciences for1990 is shown in the pie chart by the majorthrust areas described above. These majorthrust areas and more detailed subdivisionshave been identified and defined through asequence of interactions with members ofthe TAB Manufacturing Systems SciencesCommittee and Packaging Subcommitteewho have contributed greatly to the manage-ment of the program.

30 Manufacturing Systems Sciences


First version of the SPEEDIE plasma depo-sition and etch process model completed.

Diagnostic system demonstrated for low-pressure chemical vapor deposition(LPCVD) equipment.

A new generic cell controller devised.

New techniques demonstrated foranalyzing correlations within test results.

Highly sensitive microflow sensorsdemonstrated.

New techniques for in-process processmonitoring demonstrated.

System-level package partitioning andanalysis system enhanced.

Package electrical simulation softwareexpanded and demonstrated.

New transmission line thin film inter-connect structures characterized.

1990 Events

The fifth annual Workshop on Computer-Integrated Manufacturing (CIM) for the ICIndustry was held in August. This event isjointly sponsored by the SRC and DARPA.The workshop encourages close andcooperative interactions among universityresearch groups and provides a forum forindustry and university researchers toexchange views on the applicability of theresearch in meeting the industry’s needs.

Norman F. FosterDirector,Manufacturing Systems Sciences

lndustrial Resident

John H. KellyIBM CorporationProgram Manager, Manufacturing Systems Sciences

Manufacturing Systems Sciences Committeeof the Technical Advisory Board (TAB)

Chairperson:Richard C. Donovan AT&T

Grant A. Beske E.I. du Pont de Nemours & CompanyJeff Bukhman Motorola, IncorporatedRandy G Burdick Harris CorporationRobert W. Cashin Delco Electronics CorporationRaymond E. Cook National Security AgencyC. Richard Deininger Advanced Micro Devices, Inc.Stuart Denholm Eaton CorporationDennis Herrell M C CJoseph E. Johnson Westinghouse Electric CorporationMary E. Kinsella Wright LaboratoryRay Kjar Rockwell International CorporationDennis Krausman E-Systems, IncorporatedLoren W. Llnholm N I S TPravin Parekh Honeywell IncorporatedRobert B. Reams Harry Diamond LaboratoriesJohn T. RobInson Texas Instruments IncorporatedJames Rutledge SEMATECHAnthony Scribani Eastman Kodak CompanySteven Shaw National Semiconductor CorporationMarlin Shopbell Digital Equipment CorporationWilliam E. Starks Varian Associates, IncorporatedDean Toombs Intel CorporationBranimir von Turkovich National Science FoundationAlbert Wang Hewlett-Packard Company

Manufacturing Systems Sciences 31

Thermally Induced Strains in Electronic Packages

Due to the mismatch of thermal expan-sion coefficients in the components of anelectronic package, mechanical strains areinduced in the silicon chip under thermalload on the package. For determination ofthermally induced strains in an electronicpackage, this research team has beenapplying an experimental methodologycalled Fractional Fringe Moiré lnter-ferometry, which is enhanced by Digitalimage Processing.

Packages with chips of different sizes,both coated and uncoated, have beeninvestigated. The packages were slicedalong a plane selected to expose the chipand the lead frame. Crossed gratings with afrequency of 1200 lines/mm were replicatedon the specimen surface and the specimenwas placed into a special cooling device.To secure a virtual grating frequency of2400 lines/mm, corresponding to a sensi-tivity of 0.417 per fringe order, the appa-ratus and specimen were adjusted forproper optical alignment and orientation.After its null field patterns for each dis-placement component had been recorded,the specimen was cooled down to -50°C

while fringe patterns were continuouslyrecorded. Selected frames (typical exampleshown in the figure), representing deforma-tion fields at selected temperatures, wereanalyzed by image processing software. Thenet mechanical strains in the chip, whichwere due to the inequality in thermal expan-sion coefficients of the different materials inthe package, can be obtained after subtrac-tion of the free expansion strains.

Moire interferometry fills the gap in capa-bilities of other techniques, since it can beused for measurements in both the macro-mechanic and micromechanic domains. Fulldisplacement fields in the chip in electronicdevices subject to uniform cooling wererendered measurable by the method. Thestrains were computed from these field data.The effect of the chip sizes and coating onstrain /eve/s were successfully investigated.The experimental data obtained may pro-vide an important reference for packagedesign.

Professor Arkady S. VoloshinLehigh University

A typical moiré pattern of IC package deformation (fringes are contours of constant axial displacements).

32 Manufacturing Systems Sciences

SPEEDIE: A Profile Simulator for Etching and Deposition

A new physically based profile simulatorhas been developed for plasma etching andCVD processes. SPEEDIE calculates angu-lar and energy distributions of ions and fastneutrals using a Monte Carlo (MC) simulatorfor ion sheath transport. Fluxes at each pointon the profile can be calculated using eitherMC or analytical methods which consider3-D transport by molecular flow, surface dif-fusion and adsorption/r-e-emission. Etchrates are determined using a choice of etchmodels, while LPCVD and PECVD use asticking coefficient model. A modified stringalgorithm, which allows simultaneousetching and deposition, is used to move thesurface. The first version of SPEEDIE hasbeen recent/y released to SRC membercompanies.

Simulation of LPCVD Of SiO2 from silane on metal lines

Professors J.P. McVittieand K.C. SaraswatStanford University

Coherent Integrated Planning System (CHIPS)

An analysis and planning workstationcalled CHlPS (Coherent Integrated PlanningSystem), is being constructed to a/lowdiverse analysis tools to be brought to bearon the difficult problems associated with theprocessing, analysis, and implementation ofnew semiconductor manufacturing tech-nologies. CHIPS is a cohesive, data-drivenmodeling system for predicting factory per-formance. The manufacturing process flowis modeled as a sequence of “centers” withassociated queues, operators, processmachines, and tools (e.g. masks) requiredfor the process. A portion of a sequence of“centers” (process steps) is illustrated in thefigure with allowance made for rework loopsand scrapped product.

Professor Don PhillipsTexas A&M University

Manufacturing Systems Sciences 33

Technology

Transfer

Intellectual Property

In 1990, the SRC added to its intellectualproperty portfolio in packaging, sensors, metal-lization processes, and advanced technologydevices. Forty SRC Inventor Recognition Awardswere conferred to recognize faculty and graduatestudents participating in research leading to pa tentapplications and significant software development.


Gerold W. Neudeck (photo above) is a Professorof Electrical Engineering at Purdue University anda three-time, award-winning SRC inventor forquasi-dielectrically isolated bipolar transistors,self-aligned IC bipolar transistor with monocrystal-line contacts, and high performance SOI bipolartransistor structure. With SRC support, ProfessorNeudeck secured patent #4,829,016 for BipolarTransistor by Selective and Lateral EpitaxialOvergrowth and has four additional patentscurrently pending at the U.S. Patent Office.

34 Technology Transfer

Technology Transfer

The Industrial Mentor Program continuesto be one of the SRC’s most valuable com-munication links. Harris Corporation has oneof the most active mentoring teams amongthe SRC membership and has helped todesign an effective SRC mentoring coursefor presentation on site at other companies.Harris Semiconductor Sector President JonE. Cornell describes the benefits Harrisderives this way, “The SRC is ... the bestinvestment we have in terms of dollars inresearch and development; in terms of whatwe get back. It's an effective vehicle fortransferring information technology out ofacademe and into the industrial process tohelp Harris be more competitive.”

In the area of technology transfer, twenty-nine case histories of attempts to transferSRC research results to practical appli-cation in industry were analyzed. Findings ofthe study were compiled in a white paper topromote transfer efficiency and motivate themembership to make greater use of SRCresearch products. In addition, a “BestPractices” Workshop focused on improvingthe Industrial Mentor Program, student activi-ties, internal company issues, and communi-cations channels.

The largest SRC-sponsored event in 1990was TECHCON ‘90, a general conferenceshowcasing SRC research and bringingtogether more than 550 industry/government/university participants. Threeother SRC events were broadcast over theNational Technological University network.

Nearly 900 new technical documentsgenerated from SRC research were cata-logued into the SRC library in 1990, andmore than 12,000 copies of library docu-ments were distributed on request tomembership and government agency

Richard A. LucicDirector,

Technology Transfer

personnel. Tapes added to the SRC’s VideoLibrary expanded the resources foracquainting industry audiences with theproducts of SRC research.

The information Central database andelectronic mail facility continues to promotecommunications throughout the SRCcommunity.

Technology Transfer Committeeof the Technical Advisory Board (TAB)Chai rperson:James N. Smith

Vice Chairperson:Ken Van Bree

Robert DiMillaMark DurcanClaude ForeMohammed GhaziMar/o GhezzoThomas L. HaycockKen HerbSuzanne JohnsonJames R. KeyMahboob KhanShirley LainePhillip A. LutzLarry T. NovakWilliam E. PearceMichael R. PoponiakRobert I. ScaceJames F. SkalskiCourt SkinnerPaul A. SullivanAl F. Tasch, Jr.

Motorola, Incorporated

Hewlett-Packard Company

Alcoa Electronic Packagmg, Inc.Micron Technology, Inc.Defense Nuclear AgencyHughes Aircraft CompanyGenera/ Electric CompanyHams CorporationAT&TIntel CorporationControl Data CorporationAdvanced Micro Devices, Inc.Digital Equipment CorporationDelco Electronics CorporationSEMATECHRockwell International CorporationIBM CorporationN I S TWrlght LaboratoryNational Semiconductor CorporationMCCUniversity of Texas at Austin

Technology Transfer 35


'82 '83 '84 '85 '86 '87 '88 '89 '90Y e a r

Revenue History

Financial

Report

36 Financial Report

Board of Directors

AT&TC. Mark Me/liar-SmithDavid J. Lando*Advanced Micro Devices, IncorporatedWilliam T. SiegleDigital Equipment CorporationThomas F. GannonLlanda Richardson*E.I. du Pont de Nemours & CompanyJack F. StrangeDonald B. Rogers *Eaton CorporationStanley V. JaskolskiGeneral Motors CorporationWalter R. MclndooLinos J. Jacovides*Harris CorporationCharles J. NueseHewlett-Packard CompanyFrederic N. Schwettmann, ChairmanJack Anderson *IBM CorporationDonald F. ReillyDan J. Fleming*Intel CorporationGerhard Parker, Vice ChairmanMicron Technology, IncorporatedJoseph L. ParkinsonEugene H. Cloud*Motorola, IncorporatedOwen WilliamsW.J. Kitchen*NCR CorporationPhillip M. NechesJ.H. Van Tassel*National Semiconductor CorporationJames B. Owens Jr.Bami Bastani*Semiconductor Research CorporationLarry W. SumneyTexas Instruments IncorporatedG.R. Mohan RaoGregory J. Armstrong*Varian Associates, IncorporatedRobert HolzelRichard M. Levy*

Jonathan Greenfield, Legal Counsel(Ware & Freidenrich)

*Alternate Member

Mr. Sumney and Dr. Schwettmann fielding questions from thePlenary Session audience at TECHCON ‘90.

40 Board of Directors

SRC Corporate Officers


The Annual Report of the Semiconductor Research Corpora-tion is published each June to summarize the directions andresults of the SRC Research Program, present the formalfinancial report, and provide information on activities andevents of the SRC industry/government/university communityfor the previous calendar year. The highlight material containedin the research section and most of the illustrations used in thispublication are provided by the faculty and graduate studentsconducting SRC-sponsored research. The remaining text iswritten by the technical staff of the SRC.

Marian Regan, Editorial Coordinator

This report is available to any interested personby requesting SRC Publication Number S91014.

Typesetting and graphics by TYPESMITH, Cary, NCPrinted in Greensboro, North Carolina, U.S.A.,by Greensboro Printing Company.

Frederic N. SchwettmannChairman, Board of DirectorsLarry W. SumneyPresidentRalph E. Darby, Jr.Corporate Secretary

Senior Corporate Staff

Robert M. BurgerVice President and Chief ScientistJames F. FreedmanVice President, Research IntegrationWilliam C. HoltonVice President, Research OperationsD. Howard PhillipsSenior Director, Corporate Development

and Government RelationsJ. Richard BurkeDirector, Manufacturing Process SciencesJ. Paul Essex, Jr.Director, Corporate AffairsNorman F. FosterDirector, Manufacturing Systems SciencesJeffrey L. HilbertDirector, Design SciencesC. Edward Holland, Jr.Director, SEMATECH Centers-of-Excellence ProgramRichard A. LucicDirector, Technology TransferWilliam T. LynchDirector, Microstructure Sciences

Corporate Officers/Senior Staff


Semiconductor Research CorporationPost Office Box 12053

Research Triangle Park, NC 27709(919) 541-9400

SRC Publication No. S91014

Semiconductor Research Corporation

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