Document No. 001-98856 Rev *A Page 1 of 7

CYPRESS SEMICONDUCTOR CORPORATIONInternal Correspondence

TITLE: 128Mb to 512Mb KL-S/KS-S HyperFlash™ Families NPI

Last Updated: 08/19/2015

Frequently Asked Questions

Contents

ContentsProduct Family Features ................................................................................................. 2System Implementation/BOM.......................................................................................... 4Solution Capability........................................................................................................... 4Application Types............................................................................................................ 5Software/Tools/Drivers .................................................................................................... 5Hardware/Modules/Kits/Labs .......................................................................................... 5Competition/Positioning................................................................................................... 6Portfolio/Roadmap........................................................................................................... 6Support............................................................................................................................ 6

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Product Family FeaturesQ1. Is this product available in any grade other than “I”?A: Yes, in addition to the industrial temperature range (-40°C to +85°C), HyperFlashsupports the industrial-plus temperature range (-40°C to +105°C) and the extendedtemperature range (-40°C to +125°C). Each temperature range also will be qualified forAEC-Q100 with availability in Q1 of 2016.

Q2. Why does the 3-V HyperFlash have a bandwidth of only 200 MBps, comparedwith the 333-MBps bandwidth of the 1.8-V HyperFlash?A: Signal swings on the bus interface are reduced when operating with lower voltages.Therefore, HyperFlash products with a 1.8-V operating voltage range have a smallervoltage swing between logic states compared with 3-V HyperFlash products. Thisresults in shorter transition times for the 1.8-V products and translates into a higheroperating frequency.

Q3. Why does the 3-V HyperFlash have only one clock, compared to the 1.8-VHyperFlash, which has a differential clock pair?A: The higher operating frequency, enabled by the smaller signal swing, reduces theavailable clock period more than the shorter transition time improvements compensatefor the higher frequency. The differential clock signal used in 1.8-V HyperFlash productsdoubles the effective signal slew rate and helps to reduce clock duty cycle jitter for moreaccurate timing of the clock signal within the much shorter clock periods. This makes formore robust clock and data signal edge transition timing.

Q4. Why do we support the Data Center Aligned Read Strobe (DCARS) version ofHyperFlash, which requires an additional clock signal for the 3-V version and anadditional differential clock pair for the 1.8-V version if the HyperBus interface isonly 12 pins?A: The original intent was that HyperFlash would support only the 12-pin interface;however, during promotion of the HyperBus, Freescale requested support for anadditional clock on the 3-V HyperFlash and an additional differential clock pair on the1.8-V HyperFlash, which was being implemented on some of Freescale’s chipsets. Therequest was supported because it did not impact the design schedule, and Cypresswould be the only manufacturer that offered this high-performance solution.

Q5. Why do we support the Data Center Aligned Read Strobe (DCARS) version ofHyperFlash listed in a supplemental datasheet rather than in the standarddatasheet?A: Though we will actively support the DCARS version of HyperFlash, we view this as acustomized design opportunity and prefer to have one standard. As a result, we willcontinue to promote the 12-pin HyperBus interface to our ecosystem partners.

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Q6. Why does HyperFlash use a different command set compared to SPI?A. HyperFlash was envisioned as a replacement for parallel NOR Flash, combining thehigh performance of parallel NOR with a low-pin-count interface. Therefore, HyperFlashwas developed using the parallel command sets to provide a familiar command set todevelopers migrating from parallel flash interface memories to HyperFlash memories.

Q7. Why are we changing from a 1.2-mm-high BGA to a 1-mm-high BGA?A: The reason for the change was a request by some customers to reduce the packageheight for their applications. Because we are still developing the ecosystem andcustomer base, the change in package height should not affect customers.

Q8. What is the manufacturing part number matching from the 1.2-mm-high BGAto the 1-mm-high BGA?A: Please see table below.

Voltage Model Temp Sampling24-Ball BGA

1.2-mm Height

Production24-Ball BGA

1.0-mm Height

3 V Standard 85°C S26KL512SDABHI000S26KL256SDABHI000S26KL128SDABHI000

S26KL512SDABHI020S26KL256SDABHI020S26KL128SDABHI020

105°C S26KL512SDABHV000S26KL256SDABHV000S26KL128SDABHV000

S26KL512SDABHV020S26KL256SDABHV020S26KL128SDABHV020

1.8 V Standard 85°C S26KS512SDPBHI000S26KS256SDPBHI000S26KS12S8DPBHI000

S26KS512SDPBHI020S26KS256SDPBHI020S26KS12S8DPBHI020

105°C S26KS512SDPBHV000S26KS256SDPBHV000S26KS12S8DPBHV000

S26KS512SDPBHV020S26KS256SDPBHV020S26KS12S8DPBHV020

3 V DCARS 85°C S26KL512SDABHI010S26KL256SDABHI010S26KL128SDABHI010

S26KL512SDABHI030S26KL256SDABHI030S26KL128SDABHI030

105°C S26KL512SDABHV010S26KL256SDABHV010S26KL128SDABHV010

S26KL512SDABHV030S26KL256SDABHV030S26KL128SDABHV030

1.8 V DCARS 85°C S26KS512SDGBHI010S26KS256SDGBHI010S26KS128SDGBHI010

S26KS512SDGBHI030S26KS256SDGBHI030S26KS128SDGBHI030

105°C S26KS512SDGBHV010S26KS256SDGBHV010S26KS128SDGBHV010

S26KS512SDGBHV030S26KS256SDGBHV030S26KS128SDGBHV030

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System Implementation/BOM

Q9. Which chipsets currently support HyperFlash?A: Three chipsets have been publicly announced that support the HyperBus interface:the Cypress FM4 S6E2DH general-purpose MCU, the Cypress Traveo™ S6J324C andS6J326C automotive MCUs, and the Freescale MAC57D5xx Automotive DIS MCU.

We have a total of 22 chipset platforms from 6 partners that are committed to supportHyperBus/HyperFlash. They are sampling, in development, or committed to developingSOC platforms with the HyperBus/HyperFlash interface. Because most of the 22 chipsetplatforms have not yet been introduced to the market, we are not able to release theirnames. However, we encourage customers to raise the question with the major chipsetplayers in automotive and industrial markets and they will be able to communicateappropriately. Please note that most chipsets in mass production today will not haveHyperBus support because they were developed many years ago.

We will add more chipsets that support HyperFlash in the coming months.

Q10. What is Ecosystem Marketing?A: It is a group within the Flash Business Unit (FBU) that engages and evangelizes newCypress interfaces and products at the early stage of controller product definition anddevelopment to ensure compliance. The group works with partners to achievevalidation, qualification, and/or AVL status of Cypress products. In addition, EcosystemMarketing provides partner feedback to optimize new product definition at Cypress.Finally, the team establishes and maintains the security wall, processes and supportinfrastructure to protect confidential partner information and to position Cypress as aproven trusted partner.

Solution CapabilityQ11. Is HyperBus an industry standard, such as JEDEC or IEEE? If not, is there aplan to make HyperBus an open standard?A: HyperBus is not an industry standard. When HyperBus was developed, time-to-market was more critical to capitalize on the growing need for a new high-performance,low-pin-count interface that supports memory and peripherals. Due to the number ofyears required to ratify a new specification through an organization like JEDEC or IEEE,it was more beneficial to develop products with the HyperBus interface rather thanpropose it as an industry standard.At this time, there are no plans to take HyperBus to either JEDEC or IEEE.

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Q12. Have any companies licensed the HyperBus and/or HyperFlash™ IP?A: Yes. Multiple companies supporting different parts of the ecosystem have licensedHyperBus IP from Cypress. Chipset manufacturers have licensed register-transfer-logic(RTL) intellectual property (IP) blocks to include in their chipset memory controllers,third-party IP developers such as Mobiveil have licensed HyperBus to include in their IPcores, and other flash memory manufacturers have licensed HyperBus.

Application TypesQ13. What are the target applications for HyperFlash™?A: Target applications include advanced driver assistance system (ADAS), automotiveinstrument cluster, automotive infotainment, communications equipment and thehighest-performance consumer products. HyperFlash is suited for applications thatrequire the fastest, low-pin-count NOR Flash memory.

Software/Tools/DriversQ14. Where can customers get Linux low-level-drivers?A: Find a patch for Linux drivers on the website under the Software and Tools Tab.

Hardware/Modules/Kits/LabsQ15. Are there any HyperFlash demo boards available with the RTL memorycontroller integrated?A: The Register-Transfer-Language (RTL) memory controller design has been usedwithin the HyperFlash demo board and is loaded into a Xilinx Zynq 7000 FPGA. Alimited number of these boards can be sold to those that have licensed the RTL. Thereis also an Avnet ZED board demonstration that similarly uses the same RTL controller.Those boards can be acquired from Avnet, but the customer still needs to license theRTL itself.

Q16. Do we have RTL Verilog or VHDL for a HyperBus interface on an FPGA thatwe can provide to our customers?A: RTL intellectual property (IP) is available under license and provides the design of amemory controller that may be integrated into a host system ASIC to enable access toHyperBus memories.

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Competition/PositioningQ17. Are there any second sources for HyperFlash?A: Yes, Integrated Silicon Solution Inc. (ISSI) is developing HyperFlash products. ISSIsigned a licensing agreement in January 2015 that provides access to Cypress'sHyperFlash memory and HyperBus technology portfolio. They intend to developHyperFlash products for the automotive and industrial segments and plan to completeAEC-Q100 qualification on its products. This means ISSI will have a full productportfolio to address the same target markets as Cypress. The advantage to customersis that ISSI will offer a compatible HyperFlash family, making them a true second sourceto Cypress.

Q18. Are there any additional NOR Flash suppliers that are developing HyperBusproducts besides ISSI?A: As of now, ISSI is the only other NOR Flash supplier developing HyperBus products.As part of the new Cypress, we are now open to having HyperBus supported by ourprimary competitors. We are developing plans to engage and will have more to reportas progress is made in the coming months.

Portfolio/RoadmapQ19. Has the HyperFlash roadmap been released?A: Yes, the HyperFlash roadmap is included in the NOR Flash public roadmap.

SupportQ20. Will HyperFlash memory be added to the Long Term Memory List?A: Yes, HyperFlash will be added to the Long Term Memory List.

Q21. What is the best contact method to learn more about HyperFlash memory?A: If you have a question about HyperFlash, please email rysu@cypress.com.

Document History Page

Document Title: 128Mb to 512Mb KL-S/KS-S HyperFlash™ Families NPIDocument Number: 001-98856

Document No. 001-98856 Rev *A Page 7 of 7

Rev. ECNNo.

Orig. ofChange

Description of Change

** 4852882 RYSU New release*A 4889448 RYSU Updated Q9 under System Implementation/BOM section

Updated Q17 and added Q18 under Competition/Positioningsection