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April 2017 DocID030536 Rev 1 1/57

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RM0446Reference manual

STNRGPF01 digital controller for interleaved PFC

Introduction

This reference manual provides complete information for application developers on how to configure the STNRGPF01 digital controller.

STNRGPF01 devices are a part of the STNRG family of STMicroelectronics digital devices designed for advanced power conversion applications. In this case the STNRGPF01 has integrated a complete application for interleaved power factor corrections and it's able to drive up to three interleaved channels.

The STNRGPF01 device contains all the control functions for designing a high efficiency interleaved PFC with sinusoidal line current consumption.

It works in the CCM at fixed frequency with average current mode control and it implements mixed signal (analog/digital) control offering the advantages of very high-end digital solution without typical limits of analog ones.

The STNRGPF01 can be configured by a dedicated software tool (eDesignSuite) in order to be customized for a specific application. So the user has to open the software tool, enters the converter specifications and runs the configurator. The results will be: the schematic, BOM, and binary code.

The binary code can be downloaded into the STNRGPF01 through the available programming interface having a customized device that can be used like an analog device ready to use in the application.

In the following pages will be described how it's possible to customize the device using the eDesignSuite step by step.

www.st.com

http://www.st.com

Contents RM0446

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Contents

1 Reference document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2 Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 Control structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Device customization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 IPFC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

5.1 Mains . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

5.2 Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.3 Other Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

6 Design steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6.1 Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

6.1.1 Bridge info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6.1.2 EMI Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6.1.3 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6.1.4 Bridge Rectifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

6.2 Boost Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

6.3 Power Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6.4 Boost Diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

6.5 Output Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6.5.1 Output IPFC Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6.5.2 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6.5.3 Output Stage Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

6.6 Input Voltage Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6.6.1 IVS Resistor Divider Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6.6.2 Input Voltage Sensing Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

6.7 Input Current Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6.7.1 ICS Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6.7.2 ICS Op-Amp Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

6.7.3 Input Current Sensing Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

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6.8 Input Over Current Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

6.8.1 IOCP Resistors Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

6.8.2 IOCP RC-Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

6.8.3 Input Over Current Protection Results . . . . . . . . . . . . . . . . . . . . . . . . . . 30

6.9 Output Voltage Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.9.1 OVS Resistor Divider Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.9.2 Output Voltage Sensing Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

6.10 Output Current Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.10.1 OCS Resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.10.2 OCS Op-Amp Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.10.3 Output Current Sensing Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

6.11 Triangular Waveform Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.11.1 TWG Op-Amp Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.11.2 TWG Resistor Divider Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

6.11.3 Triangular Waveform Generator Results . . . . . . . . . . . . . . . . . . . . . . . . 35

6.12 Current control loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.12.1 Current loop specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.12.2 Op-amp compensator specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

6.12.3 Current Control Loop Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

6.13 Voltage Control Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

6.13.1 Voltage Loop Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

6.13.2 Digital PI Parameters Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

6.13.3 Voltage Control Loop Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

6.14 Additional Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

7 Design summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

7.1 PFC Specifications pane . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

7.2 Actuals pane . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

7.3 Schematic: annotated, interactive and hierarchical . . . . . . . . . . . . . . . . . 43

7.4 BOM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

7.5 Analysis diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

7.5.1 Power Losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

7.5.2 Current loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

7.5.3 Voltage loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

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7.6 Design commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

7.7 Firmware . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Firmware downloading *.hex file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

8 STNRGPF01 programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

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RM0446 List of figures

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List of figures

Figure 1. STNRGPF01 control scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8Figure 2. Device customization. Project creation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9Figure 3. Interleaved PFC Specifications. General window. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10Figure 4. Interleaved PFC Specifications. Mains selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11Figure 5. Interleaved PFC Specifications. Mains custom menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12Figure 6. Interleaved PFC Specifications. Mains limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13Figure 7. Interleaved PFC Specifications. Design mode selection . . . . . . . . . . . . . . . . . . . . . . . . . . 14Figure 8. Design Wizard. Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Figure 9. Design Wizard. Boost Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17Figure 10. Design Wizard. Boost Inductor warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18Figure 11. Design Wizard. Boost Inductor redesign . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19Figure 12. Design Wizard. Switch selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20Figure 13. Design Wizard. Switch searching results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21Figure 14. Design Wizard. Custom Switch Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Figure 15. Design Wizard. Custom MOSFET’s Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22Figure 16. Design Wizard. Boost Diode selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23Figure 17. Design Wizard. Boost Diode searching results. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24Figure 18. Design Wizard. Custom Boost Diode’s parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24Figure 19. Design Wizard. Output Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26Figure 20. Design Wizard for Input Voltage Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27Figure 21. Design Wizard. Input Current Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29Figure 22. Design Wizard. Input Over Current Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31Figure 23. Design Wizard. Output Voltage Sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32Figure 24. Design Wizard. Output Current Sensing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34Figure 25. Design Wizard. Triangular Waveform Generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36Figure 26. Design wizard. PI type II op-amp compensator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37Figure 27. Design Wizard. Current Control Loop. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38Figure 28. Design Wizard. Voltage controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39Figure 29. Design Wizard. Additional design Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40Figure 30. Design summary. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Figure 31. Design summary. The Specification pane . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41Figure 32. Design summary. The Actuals pane. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Figure 33. Design summary. The Actuals pane - detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42Figure 34. Design summary. Interactive and hierarchical schematic. . . . . . . . . . . . . . . . . . . . . . . . . . 43Figure 35. Design summary. Schematic of the Output Current Sensing . . . . . . . . . . . . . . . . . . . . . . . 43Figure 36. Design summary. Schematic of the Switch Driver circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 44Figure 37. Design summary. Battery Charger Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44Figure 38. Design summary. Converter Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45Figure 39. Design summary: BOM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46Figure 40. Design summary. Analysis diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46Figure 41. Design summary. Power Losses menu . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47Figure 42. Design summary. Power Losses Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47Figure 43. Design summary. Current open loop Bode diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48Figure 44. Design summary. Current open loop Bode diagram details . . . . . . . . . . . . . . . . . . . . . . . . 48Figure 45. Design summary. Voltage open loop Bode diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49Figure 46. Design summary. Voltage open loop Bode diagram details . . . . . . . . . . . . . . . . . . . . . . . . 49Figure 47. Design summary for design commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50Figure 48. Design summary. Save menu. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

List of figures RM0446

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Figure 49. Design summary. Download procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Figure 50. Design summary. Download confirmation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51Figure 51. Design summary. Saving *.hex file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52Figure 52. Adapter board - control board connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53Figure 53. Adapter board - FTDI cable connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Figure 54. STNRGPF01 programming: COM port selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54Figure 55. STNRGPF01 programming: *.hex file selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55Figure 56. STNRGPF01 programming. Download . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

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1 Reference document

For hardware information about the STNRGPF01 controller please refer to the product datasheet.

2 Acronyms

Table 1. Acronyms

Acronyms Description

IPFC Interleaved power factor corrector

CCM Continuous conduction mode

EMI Electro Magnetic Interference

IVS Input voltage sensing

ICS Input current sensing

IOCP Input overcurrent protection

OVS Output voltage sensing

OCS Output current sensing

TWG Triangular waveform generator

CL Current loop

VL Voltage loop

PI Proportional integral

BOM Bill of material

Control structure RM0446

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3 Control structure

The STNRGPF01 device performs cascaded control for voltage and current loops in order to regulate the output voltage by acting on the total average inductor current. Figure 1 shows the STNRGPF01 control scheme.

Figure 1. STNRGPF01 control scheme

The device implements mixed signal (analog/digital) control.

The difference between the output voltage feedback Vout_fb and reference Vout_ref is sent to a digital PI which calculates the peak of the total input average current ipk_ref (digital section, green line).

The PFC current reference is internally generated and comes out from the I/O FFD block as the PWM signal. After filtering it becomes the total average sinusoidal input current reference (itot_ref) for the inner current loop (analog section, red line).

The difference between itot_ref and the input current feedback itot_fb is sent to the external analog PI. So the master PWM signal is generated by comparing the analog PI output Vctrl and a triangular wave Vtriang at switching frequency. Finally the interleaving operation is performed and three PWM signals 120° phase shifted (180° for two channels only) are generated. Moreover the I/O FFD block performs an input voltage and load feedforwards in order to improve the PFC transient response.

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4 Device customization

In order to customize the device open the eDesignSuite and follow the following path:

Power Conversion

Power Supply

AC/DC

PFC Pre-regulation

STNRGPF01 CCM IPFC Controller

Figure 2. Device customization. Project creation

IPFC Specifications RM0446

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5 IPFC Specifications

In this section it's possible to insert the interleaved PFC Specifications by editing three subsections: Mains, Output, Other Parameters.

Figure 3. Interleaved PFC Specifications. General window

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5.1 Mains

Here the user has to select the range of the input voltage with a specified line connection, for this purpose six combinations are possible:

1. Wide range (115 - 230 V, 50/60 Hz), line-neutral connection

2. EU range 230 V (185 - 265 Vac, 50 Hz), line-neutral connection

3. US range 115 V (90 -140 Vac, 60 Hz), line-neutral connection

4. Wide range (115 - 230 V, 50/60 Hz), line-line connection

5. EU range 230 V (185 - 265 Vac, 50 Hz), line-line connection

6. US range 115 V (90 -140 Vac, 60 Hz), line-line connection

Figure 4. Interleaved PFC Specifications. Mains selection

Moreover it's possible to modify the values of the voltage directly in the text box, and the input custom range will appear automatically.


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Figure 5. Interleaved PFC Specifications. Mains custom menu

During this selection a red box will alert the user if the limits were exceeded.

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Figure 6. Interleaved PFC Specifications. Mains limits

5.2 Output

In the Output section six parameters can be selected (see eDesign help for more details):

1. Nominal Output Voltage: it's possible to set the DC bus voltage within the admitted range.

2. Maximum Power or Current: it's possible to define the output power or current.

3. Output Voltage Ripple: this parameter is used for output capacitor dimensioning.

4. Hold-Up Time: this parameter is used for output capacitor dimensioning.

5. Minimum Voltage after line drop: it's the minimum acceptable output voltage after a line interruption.

6. Maximum voltage: maximum admissible output voltage that the IPFC can reach in any condition. This voltage must be lower than the voltage rating of the output capacitor.


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5.3 Other Parameters

Other IPFC parameters have to be inserted:

1. Number of Interleaved Channels: two or interleaved configuration.

2. Switching Frequency or Period: it's possible to define the channel switching frequency or period.

3. Inductor Current Ripple Percentage: in the CCM IPFC the inductor current ripple must be defined taking into account the following equation:

Equation 1

where:

Iind = inductor current ripple

Itot = equivalent total input current ripple

NCH = number of interleaved channels

For example: if the total input current ripple is 20% and the number of channels is 3, the inductor current ripple according to Equation 1 is:

Equation 2

In this input field the user has to insert 60.

4. Expected Power Factor: expected PF calculated at nominal voltage and Rated Output Power.

5. Expected Average Efficiency: expected efficiency at the nominal voltage and rated output power.

6. Max. Local Ambient Temperature: maximum admissible ambient temperature. When the temperature exceeds this value the device will stop the switching activity.

Once specified all parameters, the user has three options (see Figure 7):

Figure 7. Interleaved PFC Specifications. Design mode selection

1. Custom Design: clicking on this box the Design Wizard will open and will be possible to complete the design in 15 steps.

2. Automatic Design: the design will be done automatically by default parameters.

3. Cancel: the tool will abort the current design.

Iind Itot NCH=

Iind 20 3 60= = %

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6 Design steps

For the complex circuit design, usually a step design approach is preferred.

Separating the circuit analysis in different sections, the tool can provide detailed information on parameters, which the user could customize, and their effects on the design. If one or more values exceed the specification, the tool shows an error message and stops the design process until errors are removed.

The design tool shows 15 different steps for the complete STNRGPF01 customization and board design. In the following pages, each design step is described.

6.1 Input Stage

In this section it's possible to customize the Input Stage.

Figure 8. Design Wizard. Input Stage

Design steps RM0446

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6.1.1 Bridge info

In this section it's possible to see the maximum RMS current calculated at maximum power and minimum input voltage specified in Section 5.1 on page 11. In this way it's easy to select the rated current for the bridge rectifier.

6.1.2 EMI Filter

In this section it's possible to estimate the losses in the common mode choke specifying the DC resistance of the winding.

6.1.3 Input capacitor

In this section it's possible to select the input capacitor Cin. For each design a default value will be displayed, but in any case this value can be customized.

6.1.4 Bridge Rectifier

In this section it's possible to estimate the losses in the input diodes. For the losses calculation the following parameter are considered:

Input current (Irms)

Diode dynamic resistance

Diode forward voltage

The user can evaluate the losses inserting the diodes dynamic resistance (if available) and the forward voltage drop.

For all sections when all parameters are inserted the user has the following choices:

Next.: the tool will go into the next window

Prev.: the tool will go into the previous window

Auto Complete: The tool will go into the final window

Cancel: the tool will abort the design

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6.2 Boost Inductor

In this section it's possible to customize the boost inductor value and verify if the current ripple is below the target.

Figure 9. Design Wizard. Boost Inductor

Looking to Figure 9 the design tool will display info on: the inductance value, maximum peak current and current ripple percentage.

The user can modify only the inductor value in µH and verify the actual current ripple percentage.

If the user enters an inductance value too low and the ripple percentage is higher than target a warning will appear - see Figure 10.

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Figure 10. Design Wizard. Boost Inductor warning

The warning “actual current ripple percentage differs too much from target” will stop the design and the user has two possibilities now:

1. To increase the inductor in order to have a ripple percentage within the specification.

2. To accept this value by clicking on “Redesign with actual target” see Figure 11. In this way the specification inserted in Section 5.3 on page 14 will be modified with the actual value.

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Figure 11. Design Wizard. Boost Inductor redesign

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6.3 Power Switch

In this section it's possible to select the power switch for each channel. The user has the possibility to select the MOSFET or IGBT. See Figure 12.

Figure 12. Design Wizard. Switch selection

As it's possible to see in Figure 12, the tool automatically will select a switch. The selection will be done on the minimum losses criteria and the losses estimation will be displayed. However the user can see the complete searching results window, by clicking on the displayed part number.

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Figure 13. Design Wizard. Switch searching results

In this case the window in Figure 13 will open and other switches can also be selected.

The user has two possibilities now:

To select a device by clicking on “Select”.

To insert a custom MOSFET by clicking on “Cancel” and come back to Figure 12.

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Figure 14. Design Wizard. Custom Switch Selection

Selecting “Define custom MOSFET” (Figure 14) a window will open. See Figure 15.

Figure 15. Design Wizard. Custom MOSFET’s Parameters

In this window the user has to insert few parameters and click OK.

The same procedure will be applied for the IGBT selection.

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6.4 Boost Diode

In this section it's possible to select the boost diode for each channel. The user has the possibility to include or not for automatic selection the SiC diodes. The automatic selection will be done on minimum losses criteria. The user has three choices - see from Figure 16 to Figure 18.

1. To evaluate the automatic selection.

Figure 16. Design Wizard. Boost Diode selection

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2. To select a diode from the proposed ST set.

Figure 17. Design Wizard. Boost Diode searching results

3. To insert a custom diode.

Figure 18. Design Wizard. Custom Boost Diode’s parameters

In this window the user has to insert few parameters and click OK.

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6.5 Output Stage

In this section, it is possible to sizing the output capacitor.

6.5.1 Output IPFC Specification

The first set of parameters defines the output voltage features.

Below the parameters that have to be specified:

Output voltage ripple (absolute value or percentage)

Hold-up time

Minimum voltage after line drop

6.5.2 Output capacitor

Number of parallel capacitors

Single capacitance

6.5.3 Output Stage Results

The second section shows the results on the following parameters:

Output capacitance

Actual output voltage ripple

Actual hold-up time

Single output capacitor current rating

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Figure 19. Design Wizard. Output Stage

Note: A message will indicate the minimum rated voltage of electrolytic capacitors.

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6.6 Input Voltage Sensing

In this section the user can design the voltage divider in order to the measure input voltage.

6.6.1 IVS Resistor Divider Specification

The first set of parameters defines the resistors divider:

Lower resistor (RL_IVS)

Number of upper resistors in series

Single upper resistance (RH_IVS)

6.6.2 Input Voltage Sensing Results

After the voltage divider specification the user can verify immediately the following parameters:

IVS Target Voltage (maximum applicable to the pin 31, VIN)

IVS power losses

IVS current

Figure 20. Design Wizard for Input Voltage Sensing

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6.7 Input Current Sensing

In this section the user can design the circuit to measure the input current for the current control loop and overcurrent protection.

6.7.1 ICS Resistor

The first set of parameters defines the sense, input and feedback resistors.

Sense resistor (R144)

6.7.2 ICS Op-Amp Resistors

Input resistors (R146, R147)

Feedback resistors (R148, R149)

6.7.3 Input Current Sensing Results

In the “Results” section the user can verify the following values:

ICS Target voltage

Maximum peak current on R144

RMS current on R144

ICS max output voltage (with selected resistors)

Max peak voltage on R144

Max power losses on R144

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Figure 21. Design Wizard. Input Current Sensing

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6.8 Input Over Current Protection

In this section the user can design the circuit to realize the overcurrent protection. The output voltage of sensing circuitry is connected to the OCP1 pin by a voltage divider and a low-pass filter.

6.8.1 IOCP Resistors Specification

The first set of parameters defines the circuit resistors.

IOCP target: maximum current admitted

Lower resistor (RL_OCP)

Upper resistor (RH_OCP)

6.8.2 IOCP RC-Filter

Filter resistor (RF_OCP)

Filter Capacitor (CF_OCP)

6.8.3 Input Over Current Protection Results


IOCP real

Maximum voltage on OCP1 pin

Cutoff frequency (IOCP filter)

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Figure 22. Design Wizard. Input Over Current Protection

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6.9 Output Voltage Sensing

In this section the user can design the circuit to measure the output voltage.

6.9.1 OVS Resistor Divider Specification

In this section the voltage divider resistors are defined.

Lower resistor (RL_OVS)

Upper resistor in series

Single upper resistance (RH_OVS)

6.9.2 Output Voltage Sensing Results


OVS Target Voltage (maximum applicable to the pin 34, VOUT)

OVS power losses

OVS current

Figure 23. Design Wizard. Output Voltage Sensing

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6.10 Output Current Sensing

In this section it is possible to customize the output current sense circuit.

6.10.1 OCS Resistor

In this section the output sensing resistor is defined.

Sense resistor (R9)

6.10.2 OCS Op-Amp Resistors

Input resistors (R25, R28)

Feedback resistors (R26, R36)

6.10.3 Output Current Sensing Result


OCS Target voltage (maximum applicable to the pin 33, IOUT)

Max peak current on R9

RMS current on R9

OCS max output voltage

Max peak voltage on R9

Max power losses on R9

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Figure 24. Design Wizard. Output Current Sensing

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6.11 Triangular Waveform Generator

In this section it's possible to customize the triangular waveform generator.

6.11.1 TWG Op-Amp Specification

The triangular generator hardware components that can be customized are:

Parallel capacitor (C56)

Feedback resistor (R137)

6.11.2 TWG Resistor Divider Specification

Moreover the triangular generator voltage divider can be customized.

Lower resistor (R142)

Higher resistor (R141)

6.11.3 Triangular Waveform Generator Results


Input resistor (R140)

TWG Target peak voltage

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Figure 25. Design Wizard. Triangular Waveform Generator

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6.12 Current control loop

In this section it's possible to customize the analog current compensator.

6.12.1 Current loop specification

The user has to insert the current open loop specifications:

Required CL bandwidth

Required CL phase margin

6.12.2 Op-amp compensator specification

Hardware components of the analog compensator can be specified:

Feedback capacitor (Cfz)

Input resistor (Ri)

Feedback resistor (Rf)

Feedback capacitor (Cfp)

Figure 26. Design wizard. PI type II op-amp compensator

The user can proceed in two ways:

Inserting the specification (bandwidth and phase margin) and obtaining the hardware components values.

Selecting hardware components (Ri, Rf, Cfz Cfp) and verifying the resulting bandwidth and phase margin.

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6.12.3 Current Control Loop Results

In the “Results” section the user can verify the current open loop specifications and resulting Bode Diagram (see Figure 27).

Figure 27. Design Wizard. Current Control Loop

6.13 Voltage Control Loop

In this section it's possible to customize the digital PI controller for the PFC output voltage regulation.

6.13.1 Voltage Loop Specification

The user has to define the voltage open loop specifications:

Required VL bandwidth

Required VL phase margin

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6.13.2 Digital PI Parameters Specification

In this case digital parameters are:

Digital Kp (proportional gain)

Digital Ki (integral gain)

The user can proceed in two ways:

Selecting voltage loop specifications (bandwidth and phase margin) and obtaining parameters Kp and Ki

Selecting Kp and Ki and verifying the bandwidth and phase margin

6.13.3 Voltage Control Loop Results

In the “Results” section the user can verify the voltage open loop specifications as well as the Bode Diagram.

Figure 28. Design Wizard. Voltage controller

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6.14 Additional Features

In this section it's possible to configure the following features (see the STNRGPF01 datasheet):

TINRUSH: inrush current limiter time (pin 21)

Min power for fan: the power level able to start the fan or an other cooling system (pin 20)

Max power switch 1 -> 2 channels: the transition power level from one to two channels operations

Max power switch 2 -> 3 channels: the transition power level from two to three channels operations

Max power startup: the maximum resistive load that can be connected at the start-up (see eDesign help)

Min voltage burst: the minimum level of the output voltage during the burst operation

Max voltage burst: the maximum level of the output voltage during the burst operation

Figure 29. Design Wizard. Additional design Features

Once all parameters have been inserted, when the user clicks on the OK button, the design is completed.

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7 Design summary

At the end of the design steps tool it's possible to have a summary of the entire project.

Figure 30. Design summary. Overview

7.1 PFC Specifications pane

The PFC Specifications pane provides a summary of the selected high-level specification.

Figure 31. Design summary. The Specification pane

Click on “Change Specifications” to modify design specifications and generate an updated design.

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7.2 Actuals pane

The Actuals pane displays (Figure 10 on page 18) the predicted performance of the design based on the I/O operating conditions you can select using the icon.

Figure 32. Design summary. The Actuals pane

Figure 33. Design summary. The Actuals pane - detail

A warning icon appears if some values do not match the design target, and these values are displayed in red.

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7.3 Schematic: annotated, interactive and hierarchical

This pane (Figure 34) shows the full schematic of your design. The schematic is annotated with the values for each element of the circuit.

Figure 34. Design summary. Interactive and hierarchical schematic

By interacting with the schematic, you can customize components (identified by the light blue script) and the subnetwork (identified by icon), or to go into the subnet on the block which shows the hand cursor.

Figure 35. Design summary. Schematic of the Output Current Sensing


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Figure 36. Design summary. Schematic of the Switch Driver circuit

For example, if the user clicks on VCC (Figure 36) a new design for the auxiliary power supply will start.

Figure 37. Design summary. Battery Charger Specifications

In this case the ALTAIR05T-800 device is used.

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Figure 38. Design summary. Converter Specifications


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7.4 BOM

The bill of materials (BOM) view provides an effective user interface (table format) for all circuit components and their characteristics (Figure 15 on page 22). You can customize the design by interacting with the BOM view.

Figure 39. Design summary: BOM

7.5 Analysis diagrams

Based on the selected operating conditions, analysis diagrams will display the following entities.:

Losses

Bode diagram from analog current control loop

Digital voltage control loop

Figure 40. Design summary. Analysis diagrams

Click on the enlarge icon to display more details about the selected analysis diagram.

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7.5.1 Power Losses

In the analysis diagram menu the user has the possibility to evaluate the losses in the main circuital parts.

Figure 41. Design summary. Power Losses menu

By clicking on the icon the tool will display more details about the losses and an estimation of the system efficiency.

Figure 42. Design summary. Power Losses Details

By clicking on the icon of the Schematic window the design summary page will be displayed (see Figure 30 on page 41).


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7.5.2 Current loop

In the analysis diagram menu the user can analyse the current open loop Bode diagram.

Figure 43. Design summary. Current open loop Bode diagram

By clicking on the icon the tool will display Bode diagram details.

Figure 44. Design summary. Current open loop Bode diagram details


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7.5.3 Voltage loop

In the analysis diagram menu the user can analyse the voltage open loop Bode diagram loop design.

Figure 45. Design summary. Voltage open loop Bode diagram

By clicking on the icon the tool will display Bode diagram details.

Figure 46. Design summary. Voltage open loop Bode diagram details



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7.6 Design commands

Near the eDesignSuite logo the tool offers a set of commands to manage the design.

Figure 47. Design summary for design commands

Redesign button: opens the first design step

Save button: opens a drop down menu

Figure 48. Design summary. Save menu

Save: allows saving the current design project on the ST server

Save As: allows saving the current design project with a different name on the ST server

Export to File: allows exporting the current design project on a local system file

Export BOM as XML: allows exporting the bill of materials as an XML file

Export to PSpice: allows exporting the current design project for the PSpice simulation (command available only for some designs)

Print button generates a printable report of the current design project

Disclaimer button displays the STMicroelectronics disclaimer

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7.7 Firmware

Each time the user creates or redefines a design, the tool generates a customized firmware, which can be saved on a remote PC in a *.hex file format.

Firmware downloading *.hex file

The firmware button placed into the IC box starts the downloading process by clicking on the Firmware icon.

Figure 49. Design summary. Download procedure

Confirm the downloading operation.

Figure 50. Design summary. Download confirmation

Select the folder and file name.


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Figure 51. Design summary. Saving *.hex file

Figure 51shows the window opened after the downloading confirmation. Please select the folder name, the output file name and by clicking on the “Save” icon save locally the personalized firmware.

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8 STNRGPF01 programming

To complete the process described in Section 7.7, STMicroelectronics offers an additional hardware and software utility to download the *.hex file into the STNRGPF01.

Warning: The programming procedure described below must be performed only when the interleaved PFC is NOT CONNECTED TO THE MAINS.

Insert an FTDI cable into the USB port of the PC.

Insert the adapter board into the programming ports PTX and PRX of the STNRGPF01 (see Figure 52).

Figure 52. Adapter board - control board connection

Connect the adapter board with the FTDI cable (see Figure 53).

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Figure 53. Adapter board - FTDI cable connection

As soon as the adapter will be connected with the cable FTDI, the LED on the top will be lit.

Open the STNRGPF01 loader utility

Select the PC COM port

Figure 54. STNRGPF01 programming: COM port selection

Open the file folder and select the *.hex file.

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Figure 55. STNRGPF01 programming: *.hex file selection

Click on the “Download” button.

Figure 56. STNRGPF01 programming. Download

Now the programming procedure is completed.

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Table 2. Document revision history

Date Revision Changes

21-Apr-2017 1 Initial release.

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IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

© 2017 STMicroelectronics – All rights reserved

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