PIC Part6 RealTimeClock

8/10/2019 PIC Part6 RealTimeClock

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REAL-TIME CLOCK


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CpE 112 : Klinkhachorn

Real-Time Clock The device is not a clock!

It does not tell time! It has nothing to do with actual or real-time!

The Real-Time Clock is no more than

an interval timer connected to the

computer I/O interface so that the

computer can be informed each time aparticular interval of time has gone by.*

* Real-Time Computing, edited by Duncan A. Mellichamp, Van Nostrand Reinhold


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Real-Time Clock (Continued)Computer must be programmed to use the

information correctly! Example

If clock interval is 1 second, a counter within the computer can be set

equal to time, one could easily program a routine to give the time on a

12 or 24-hour basis



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Line Clock Simple form of Real-Time Clock

Use 60Hz from line to generate 1/60 second clock


60hz

Half-Wave rectifier

60 Hz Pulse


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Programmable Clock (primitive)


XTAL

OSC

Divide

by 10

Divide

by 10

Divide

by 10

Divide

by 10

Divide

by 10

Multiplexer

1s..1s10ms.

Interrupt to CPU

Or connect to I/P

1MHz or 10MHz



Programmable Timer/Counter

Presetable UP or Down N-bit CounterClock

CPU DATA Bus

RD,WR, CS Overflow

output




Example:

8 bit Up Counter (0-255)

clock input =1MHz or 1us. wanted to interrupt the CPU after 200us.

If one load the counter with (256-200) = 56,

after 200 clocks ----> output =1 on overflow!

Therefore cpu can be interrupted after 200us.




Typically

Timer:---> known clock input (Internal)

Counter: --> unknown clock (External)



TIMERs/COUNTERs

PIC16F877Timer0

Timer1Timer2



Timer0 Module

8-bit timer/counter

Readable and writable

8-bit software programmable prescaler

Internal or external clock select

Interrupt on overflow from FFh to 00h

Edge select for external clock



Timer0/WDT Block diagram



Timer0 - Prescaler Assignment



Watch Dog Timer

Run on internal RC

If enable during SLEEP mode, WDT will

continue running and will be able to wake upthe processor on Time-out!

With Prescaler (Post) set to 1:128, typical

maximum delay time can be approximately

18*128 ms or over 2 seconds!


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Timer0 - TMR0 - Register All instructions writing to the TMR0 will clear

the prescaler count, but not change theprescaler assignment!

i.e. clrf TMR0, movwf TMR0, .etc.

The TMR0 interrupt is generated when the

TMR0 register overflows from FFh to 00h

TMR0 interrupt cannot awaken the processorfrom SLEEP (the timer is off during the

SLEEP)


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Timer0 - Registers associated


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Example: Timer0 and Rotary Encoder

ObjectiveSet time (minute/second) for the clock

(Lab Assignment)* Fast turning will set the Minutes* Slow turning will set the seconds

Use Timer0 to distinguish fast turningfrom slow turning of the rotary encoder


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Recall


Rotary Encoder: Example

Phase Difference

One cycle

ON/OFFdetermines CCW/CW


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Recall


INT_EXT Interrupt : ExampleMain Program

.

. . .enable_interrupts(int_EXT);

enable_interrupts(global);

. . .


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Recall


INT_EXT Interrupt : Example

#int_ext

EXT_INT_ISR()

{// one interrupt per cycle

// determine direction by reading the another bit

// do what is necessary

// exit

}

Note: CCS will reset INTE flag and re-enable GIE.

These do not applied to #int_Global!


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Example: Timer0 and Rotary Encoder (continued)

Assume Rotary Encoder generates 32 pulse per revolutionOne of the outputs of the encoder connects to

Rb0/INT

Maximum rate of turning is one turn in 0.5

second. i.e. Generates interrupt up to 32*1/2 = 64 times a

second or every 1/64 = 15.625 milliseconds.


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Assume Timer0 will be used to detect Fast/Slow turning Set prescaler to divide input freq. by 256 (or input

period *256) Use internal clock (4MHz/4 or 1us)

The TMR0 will increment every 1* 256 = 256us or about 1/4

of ms. TMR0 will count through its 256 counts in 256*256 or about

66 ms.


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#int_ext

EXT_INT_ISR(){

// one interrupt per cycle

// determine direction by reading the another bit

// clears INTF

// checks the T0IF flag to see if TMR0 has gone through 256

// counts since the last RB0/INT.

// if so ----> increment/decrement second

// else ----> increment/decrement minute

// clear TMR0 and T0IF

// exit}


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Timer1 Module 16-bit timer/counter (TMR1H,TMR1L)

Readable and writable (both)

Internal or external clock select

Interrupt on overflow from FFFFh to 0000h

Reset from CCP module trigger

Programmable Prescaler (1,2,4, and 8)

Sync and Asyn Counter mode


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Timer1Block diagram


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Timer1 - T1CON - Control Register


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Timer1 Oscillator Low power Oscillator rated upto 200kHz

Primary intended for a 32kHz

Will run during SLEEP


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Timer1and Sleep ModeWhen PIC is in SLEEP mode, internal clock

stop (reducing power consumption)

Timer1 includes the pins and oscillator circuit

to allow a 32,768-Hz crystal to serve as itsexternal clock source (by pass the synchronizer)

TMR1 will overflow at 2, 4, 8, or 16-seconds

depending on prescaler value used) and the CPU wake up, initiates the startup of the internal clock

which may take as long as 1000 internal clock cycles

before the next instruction is executed!


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Timer1and Sleep Mode


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Example: Timer1and Sleep Mode PIC16F877 is waiting for an external event to occur, it

goes into the sleep mode for 16 seconds at a time. Wake up only to check the event and to increment a variable to

keep track of time then go back to sleep again

4MHz clock maximum supply current is 4mA

Maximum supply current on sleep mode is 42uA

If CpU is asleep roughly 15.99 S out of 16.00 S

Then the average current is

42(15.99/16)+4000(.01/16) = 44.5 uA!


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Timer2 Module 8-bit timer (TMR2)

8-bit period register (PR2)

Readable and writable (both)

Interrupt on TMR2 match of PR2

Programmable Prescaler (1,4, and 16)

Programmable postscaler (1 to 16)

Can be use as the PWM time-base for PWM mode of theCCP module

SSP module optional use of TMR2 output to generate clock

shift


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Timer2 Block diagram


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Timer2 - T2CON - Control Register


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Timer2 - TMR2 The prescaler and postscaler counters are

cleared when any of the following occurs:A write to the TMR2

A write to the T2CON

Any device reset

TMR2 is not cleared when T2CON is written


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CAPTURE/COMPARE/PWM MODULES

PIC16f877 has two Capture/Compare/PWM

(CCP) modules (CCP! & CCP2)

Each CCP module contains a 16-bit register which

can operate as a: 16-bit Capture register

16-bit Compare register

PWM master/slave Duty Cycle register


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CCP MODULES

Both the CCP1 and CCP2 modules are identical in

operation, with the exception being the operation ofthe special event trigger


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CCP1 MODULE

Capture/Compare/PWM Register1

(CCPR1) is comprised of two 8-bitregisters: CCPR1L (low byte) and

CCPR1H (high byte)The CCP1CON register controls the

operation of CCP1

The special event trigger is generated by a

compare match and will reset Timer1.


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CCPxCON Registers

CCP1CON REGISTER/CCP2CON REGISTER (ADDRESS: 17h/1dh)


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CAPTURE MODE

In Capture mode, CCPR1H:CCPR1L captures the 16-bit

value of the TMR1 register when an event occurs on pinRC2/CCP1. An event is defined as:

Every falling edge Every rising edge

Every 4th rising edge Every 16th rising edge An event is selected by control bits CCP1M3:CCP1M0 (CCP1CON)

When a capture is made, the interrupt flag bit CCP1IF (PIR1) is set

The interrupt flag must be cleared in software. If anothercapture occurs before the value in register CCPR1 is read,

the old captured value will be lost.


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CAPTURE MODE : RC2/CCP1

In Capture mode, the RC2/CCP1 pin should

be configured as an input by setting theTRISC bit

Note: If the RC2/CCP1 pin is configured as anoutput, a write to the port can cause a capture

condition.


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CAPTURE MODE : Timer1 selection

Timer1 must be running in timer mode or

synchronized counter mode for the CCPmodule to use the capture feature.

In asynchronous counter mode, the captureoperation may not work.


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CAPTURE MODE


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Example: use of CAPTURE MODE

Period Measurement

T=?

Start, read

counts from

CCPRx

(Init_Count)

Stop, read counts

from CCPRx

(Final_count)

Period = (Final_count - Init_Count) * refrence clock to the TIMER1

Assume that the period is shorter than 65535 * reference clock

CCP1 operates in

capture mode,

interrupt on rising

edge


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Example: use of CAPTURE MODE

Main Program

.//setup Timer 1

//setup CCPRx for Capture

//mode on rising edge

//clear Period_Measu_done flag

//enable appropriate interrupt

.If (Period_Measu_done)

repot_period;

.

.

loop

CCPx ISR

..

// If first interrupt {

// save_CCPxR into Init_Count;

// exit ;}// else {

// calculate the period;

// set Period_Measu_done flag;

// disable CCPxIE;// exit; }

.

.


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Compare Mode In Compare mode, the 16-bit CCPR1 register value is

constantly compared against the TMR1 register pair value When a match occurs, the RC2/CCP1 pin is:

Driven high

Driven low

Remains unchanged

The action on the pin is based on the value of control bits

CCP1M3:CCP1M0 (CCP1CON) At the same time, interrupt flag bit CCP1IF is set.


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COMPARE MODE : RC2/CCP1

In Compare mode, the RC2/CCP1 pin

should be configured as an output byclearing the TRISC bit

Note: Clearing the CCP1CON register willforce the RC2/CCP1 compare output latch to

the default low level. This is not the data latch.


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COMPARE MODE : Timer1 selection

Timer1 must be running in timer mode or

synchronized counter mode for the CCPmodule to use the compare feature.

In asynchronous counter mode, the compareoperation may not work.


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COMPARE MODE : Software Interrupt mode

When Generate Software Interrupt mode is

chosen, the CCP1 pin is not affected. TheCCPIF bit is set causing a CCP interrupt (if

enabled)


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COMPARE MODE : SPECIAL EVENT TRIGGER

In this mode, an internal hardware trigger is

generated, which may be used to initiate an action. The special event trigger output of CCP1 resets the

TMR1 register pair

This allows the CCPR1 register to effectively be a 16-bitprogrammable period register for Timer1

The special event trigger output of CCP2 resets the

TMR1 register pair and starts an A/D conversion (if theA/D module is enabled)

Note: The special event trigger from the CCP1and CCP2

modules will not set interrupt flag bit TMR1IF (PIR1)


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Compare Mode


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CCPxCON Registers

CCP1CON REGISTER/CCP2CON REGISTER (ADDRESS: 17h/1dh)


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Example: use of Capture and Compare mode

Period Measurement (If Period > 65535* reference clock)

T=?

Start, read counts

from CCPR1

(Init_Count), then

save it it CCPR2

Stop, read counts

from CCPRx

(Final_count)

Period = (Final_count - Init_Count+(CYCLES*65536))* Timer1_clock

CCP1 operates in

capture mode,

interrupt on rising

edge 65536

CCP2 operates in

Compare mode

(software interrupt),

interrupts every 65536

clocks. UpdateCYCLES

E l


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Example: SquareWave Generator with Compare mode

1kHz

500 clocks 500 clocks*

* Assume

- PIC run at 4 MHz or

1uS instruction cycle

- Timer1 is on and theinput is from the

internal clock

On interrupt,

toggle bit 0 of CCPxCON

add 500 to CCPRx

reset CCPxIF

E l T i S i l E /


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Example: Trigger Special Event /Compare mode

No need to reload CCPRx since the CCPx resets TMR1

P l Width M d l ti (PWM) M d


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Pulse Width Modulation (PWM) Mode

In pulse width modulation mode, the CCPx pin

produces up to a 10-bit resolution PWM output Since the CCP1 pin is multiplexed with the PORTC

data latch, the TRISC bit must be cleared to make

the CCP1 pin an output.



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A PWM output has a time-base (period) and a time that the

output stays high (duty cycle) The frequency of the PWM is the inverse of the period (1/period)

PWM Period


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PWM Period

The PWM period is specified by writing to the PR2

register

The PWM period can be calculated using the following

formula:

PWM period = [(PR2) + 1] 4 TOSC (TMR2 prescale value)

PWM frequency is defined as 1 / [PWM period]

When TMR2 is equal to PR2, the following three events

occur on the next increment cycle:

TMR2 is cleared

The CCP1 pin is set (exception: if PWM duty cycle = 0%, the CCP1

pin will not be set)

The PWM duty cycle is latched from CCPR1L into CCPR1H

PWM Resolution


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PWM Resolution

Maximum PWM resolution (bits) for a

given PWM frequency:

SET UP for PWM Operation


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SET UP for PWM Operation

Set the PWM period by writing to the PR2 register

Set the PWM duty cycle by writing to theCCPR1L register and CCP1CON bits

Make the CCP1 pin an output by clearing the

TRISC bit

Set the TMR2 prescale value and enable Timer2

by writing to T2CON. Configure the CCP1 module for PWM operation.

REGISTERS ASSOCIATED WITH CAPTURE,


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COMPARE, AND TIMER1

REGISTERS ASSOCIATED WITH PWM AND TIMER2


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REGISTERS ASSOCIATED WITH PWM AND TIMER2

PIC Part6 RealTimeClock

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