L1-V4-05-MiCOM C264 Overview-E-01

52
MiCOM C264 Overview PCL PACiS PACiS PACiS PACiS Technical Technical Technical Technical Training Training Training Training CS&P CS&P CS&P CS&P – – Support team Support team Support team Support team

Transcript of L1-V4-05-MiCOM C264 Overview-E-01

Page 1: L1-V4-05-MiCOM C264 Overview-E-01

MiCOM C264 Overview

PCL

PACiS PACiS PACiS PACiS TechnicalTechnicalTechnicalTechnical TrainingTrainingTrainingTraining

CS&P CS&P CS&P CS&P –––– Support teamSupport teamSupport teamSupport team

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� Computer Management

� Binary & Analogue Inputs

� Control Sequences

� Buit-in Automations

� PSL Automations

� Isagraf Automations

• Content

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� Computer Management

� Binary & Analogue Inputs

� Control Sequences

� Buit-in Automations

� PSL Automations

� Isagraf Automations

• Content

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INITIALISATION

OPERATIONAL

TEST

MAINTENANCE FAULTY

Power up / Reboot

Tests OK and no DB available

Tests OK and at least 1 DB available

Major hardware failure or

incoherent DB

structure

Operator

HALT

Major hardware

failure

Major software failure

Automatic Reboot

Transitions Diagram

After N reboots in M hours

• Operating Mode Management

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• Computer Self Checks

Kinds of self checks :

� Hardware (hardware fault)

� Software (software fault)

� Database coherency

� Acquisition and outputs

When ?

� At start-up of the computer

� in runtime computer

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MiCOM Cx6x Computer

DB2

DB1 Current Database

Stand-By Database

PACiS SMT

SBUS

Download into Stand-by database

• Database Management

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• Time Management

Why needs of time synchronisation?

To “have the same date / time on all connected devices” for :

� the time tagging of events

� the synchronised reports

� the synchronised actions

Time resolution 1ms

Accuracy [-1 ms,+1ms ]

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ProtectionsIED

GPS Clock

SNTP SERVERSynchronisation

signal

Synchronisation signal from SCADA

Synchronises through SBUS

PACiS

Gateway

PACiS OI

SBUS

LBUS Synchronizes through LBUS

OperatorSynchronisation

PRIORITY 1

PRIORITY 2

PRIORITY 3

Each device can receive IRIG-B

• Time Management

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Communications :MAIN BACKUP

COMPUTER

LEGACY

SWITCH

SCADA

ProtectionsIED

SBUS Station BUS

LBUS

Legacy BUS

SCADA

Ext. Relay

• Redundancy Management

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Ø The ACTIVE computer is in OPERATIONAL mode

Ø The STANDBY one is in STANDBY mode

MAIN BACKUP

COMPUTER

LEGACY

SWITCH

SBUS Station BUS

Links :

DO2 DI2 DO1 DI1 DO1 DI1 DO2 DI2

Wired active state

control indication

SBUS active state control indication

Main Back-up

• Redundancy Management

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• Communication Management

Up to 4 serial communication ports :

� 2 on BIU + 2 optional on CPU

1 Ethernet connection :

� SBUS (IEC61850) / TBUS (T104, DNP3)

Limits

� up to 4 communication links (LBUS+TBUS serial or Ethernet)

� up to 4 LBUS

� up to 2 TBUS

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Wes

term

om

od

em

Co

uri

er

MiCOM S1

LB

US

SBUS

Px2x

Px3x

Px4x

Mo

db

us

T1

03

T1

03

C264

• IED Management4 possibilities of subnetworks

Supported Protocols :

� IEC-60870-5-103, MODBUS, DNP3, IEC-60870-5-101

Assumed Functions :

�Network initialisation

�General interrogation

�Time synchronisation of IEDs

�Polling data from IEDs

�handling Control sequences

�Disturbance file management

�Network supervision

�Tunnelling mode :� route the frame between TCP/IP and legacy protocols

� IEC-60870-5-103 and MODBUS

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LBUS

SBUS

PACiS OI/SMT

Local SBUS IEDs

Disturbance Files uploading

Disturbance File Storage

Disturb

Disturbance Files from IED

• IED Management

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• TBUS – SCADA Management

2 possibilities of subnetworks

Supported Protocols :

� Serial : MODBUS, DNP3, IEC-60870-5-101

� Ethernet : MODBUS, DNP3, IEC-60870-5-104

Protocol characteristics :

� Refer to C264 documentation, CT chapter

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Agency = software module giving SBUS Clients and SBUS Server services

SBUS IEC61850

MiCOM C264

SBUS Agency

MiCOM C264 Applicative

PACiS GTW

SBUS Agency

PACiS GTW Applicative

PACiS OI

SBUS Agency

PACiS OI Applicative

SBUS IED

no agency

PACiS SMT

SBUS Agency

PACiS SMT Applicative

• SBUS – IEC61850 Agency

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� Computer Management

� Binary & Analogue Inputs

� Control Sequences

� Buit-in Automations

� PSL Automations

� Isagraf Automations

• Content

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• Binary & Analogue Inputs Overview

BINARY INPUTS

� SPS, DPS, MPS

MEASUREMENTS

� MV

COUNTERS

� SCT, DCT

TAP POSITION INDICATION

� TPI

CURRENT/VOLTAGE CALCULATIONS

� CT/VT

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Digital Inputs SPS,DPS,MPS,SCT,DCT

HARDWAREHARDWAREHARDWAREHARDWARE

ACQUISITIONACQUISITIONACQUISITIONACQUISITION

SOFTWARESOFTWARESOFTWARESOFTWARE

ACQUISITIONACQUISITIONACQUISITIONACQUISITION

TIMETIMETIMETIME

STAMPINGSTAMPINGSTAMPINGSTAMPING

DEBOUNCINGDEBOUNCINGDEBOUNCINGDEBOUNCING

FILTERING FOR DMFILTERING FOR DMFILTERING FOR DMFILTERING FOR DM

DEBOUNCINGDEBOUNCINGDEBOUNCINGDEBOUNCING

FILTERING FOR BIFILTERING FOR BIFILTERING FOR BIFILTERING FOR BI

DEBOUNCINGDEBOUNCINGDEBOUNCINGDEBOUNCING

FILTERING FOR CTFILTERING FOR CTFILTERING FOR CTFILTERING FOR CT

TOGGLETOGGLETOGGLETOGGLE

FILTERING FOR BIFILTERING FOR BIFILTERING FOR BIFILTERING FOR BI

BINARY INPUTSBINARY INPUTSBINARY INPUTSBINARY INPUTS

TREATMENTSTREATMENTSTREATMENTSTREATMENTS

TOGGLETOGGLETOGGLETOGGLE

FILTERING FOR FILTERING FOR FILTERING FOR FILTERING FOR DMDMDMDM

DIGITAL DIGITAL DIGITAL DIGITAL MEASUREMENTSMEASUREMENTSMEASUREMENTSMEASUREMENTS

TREATMENTSTREATMENTSTREATMENTSTREATMENTS

TOGGLETOGGLETOGGLETOGGLE

FILTERING FOR FILTERING FOR FILTERING FOR FILTERING FOR CTCTCTCT

COUNTERSCOUNTERSCOUNTERSCOUNTERS

TREATMENTSTREATMENTSTREATMENTSTREATMENTS

• Digital Inputs

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• Digital InputsHardware Acquisition

� Each input is scanned cyclically by software

� scan period is fixed = 1 ms

Logic Checks

� Comparison of true states and of inverted states

� Verification of the address of the board

Time tagging

� At detection of the change of state

� Time quality depending on equipment synchronisation

Filtering

� Toggling (SPS,DPS,MPS)

� Persistence (SPS,DPS remaining in the same state during T time)

� Motion (DPS, not to take into account transients 00 and 11 states)

� Undefined MPS states (all inputs at state 0 or 1; more than 1 at state 1)

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Transmission to SCADA if connected

• Digital Inputs

Transmission mode on the SBUS network

Report based mode

� Change of status is spontaneously transmitted to the subscribers with the

time stamping and the reason for change

GOOSE based mode

� Change of status is transmitted in multicast to the configured receivers. Only

the BI unfiltered status is transmitted, the time stamp is not used and the

reason for change is not transmitted.

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PROCESSING

• Force, Suppress & Substitute (FSS)

SUPPRESSION

� A Binary input is manually suppressed (It is not processed until

unsuppression)

SUBSTITUTION

� The Binary input is substituted by an other state.

FORCING

� When a binary input becomes invalid, the operator can force it by a valid

state. The binary input is automatically unforced when it becomes valid

again.

AUTOMATIC FORCING

� A binary input is forced automatically to a valid state when it becomes

invalid.

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ACQUISITION

PROCESSING

• Measurements

A measurement can be acquired using :

� an analogue input

� a digital measurement

� IED : LBUS, SBUS

� a CT/VT input (or calculation => up to 184 values)

� automation

A scaling law

� linear (single/multi slope)

� quadratic (square root)

Thresholds

� Up to 6 thresholds for which the detection caused by a measurement, variation can

create an event or alarm.

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Transmission to SCADA if connected

• Measurements

Transmission mode on the SBUS network

Report based mode

� Periodically

� On variation

� On threshold violation

� On change of quality state

GOOSE based mode

� Change of value is transmitted in multicast to the configured receivers.

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ACQUISITION

Transmission mode on the SBUS network

Transmission to SCADA if connected

• Tap Position Indication

DI Board :

� Multiple Point

� A Digital Measurement (Decimal,

Gray, BCD)

AI Board :

� Measuring a current input

Report based mode

� Cause of Transmission

�change value

�change status

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• Counters

Digital Counters :

� Acquisition is stored to accumulators in non-volatile memory

� Accumulator is incremented at each valid counter pulse

IED Counters :

� transmitted cyclically are stored to the periodic register and FIFO memory

Operator can force the metering values. This modification can be a counter reset.

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� Computer Management

� Binary & Analogue Inputs

� Control Sequences

� Buit-in Automations

� PSL Automations

� Isagraf Automations

• Content

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Control Points

RCP (SCADA) via TBUS

SCP via SBUS

BCP via front panel (LCD)

Other MiCOM Computers

via SBUS

Internal automatic functions

Autorecloser, Synchrocheck, AVR, xPS/xPC association

Configurable automations

PSL, Isagraf

Electrical devices

CB, Isolators, Transformers, ...

Secondary devices

Locking switching devices

Controls to IEDs

Controls of Automations

Controls of Modes

Operational/Maintenance/Test, Local/Remote, ...

ORIGIN

DESTINATION

• Control Origins & Destinations

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EXECUTION CHECKS

VIA BOARDS

VIA IED

SYSTEM CONTROLS

OR

OR

SELECTION PHASE EXECUTION PHASE

DIRECT EXECUTE

SELECT BEFORE OPERATE ONCE

EXECUTION CHECKS

VIA BOARDS

VIA IED

OR

SELECTION PHASE EXECUTION PHASE

SELECTION CHECKS

• Control Sequences

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SELECT BEFORE OPERATE MANY

EXECUTION CHECKS

VIA

BOARDS

VIA IED

OR

SELECTION

PHASE

EXECUTION PHASE

DEVICE SELECTION

DEVICE UNSELECTION

UNSELECTION

PHASE

EXECUTION CHECKS

VIA BOARDS

VIA IED

OR

• Control Sequences

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� Inter-control delay

� Computer mode

� Substation and bay mode states

� Interlock and topological interlocking states

� Automation running control

� Locked device state

� Devices status

� Uniqueness

Control Origin :

SBUS, TBUS, Isagraf

Control Origin :

PSL, xPS/xPC ass.

� Computer mode!

• Control Checks

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OREXECUTION

CHECKS

VIA BOARDS

VIA IED

SELECTION PHASE EXECUTION PHASE

SELECTION CHECKS

ABORTED SEQUENCE

NEGATIVE ACKNOWLEDGEMENT

END OF SEQUENCE

NORMAL TERMINATION

• Control Acknowledgement

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Example of Acknowledgements

� normal termination� incoherent request� Computer not ready� bay-substation mode fault� Computer’s mode fault

� Device locked� Control in progress� Interlock check NOK� ...

• Control Acknowledgement

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Kernel

C264

Wired controls

Via I/O boards CCU/DO

DO

Controls to IEDs

Via Legacy bus

LegacyGateway

I/O boards

system

System controls

Via computers Systemsupervisor

Local SBUS IEDs

Controls to SBUS devices

Via Station BusC264

• Control Executions

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• Control Executions

Wired controls via I/O Boards

� SPC, DPC, Digital Setpoints

� 3 types : transient, permanent, permanent until feedback

�Configurable time-out

IEDs Controls

� SPC, DPC, Digital Setpoints

System Controls

� Computer Mode Management

�Switch database, switch mode (Operational/Maintenance/Test)

� Substation / Bay Mode Management

�Local/Remote Substation, Local/Remote Bay, SBMC

� Automation Management

�Autorecloser ON/OFF, AVR ON/OFF (ATCC), Synchrocheck ON/OFF

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� Computer Management

� Binary & Analogue Inputs

� Control Sequences

� Buit-in Automations

� PSL Automations

� Isagraf Automations

• Content

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• Generalities

Build-In Functions available :

� Autorecloser

� Internal Synchrocheck

� xPS/xPC association

� Pole discrepancy detection

� Automatic Tap Change Control

Authorised Operator can :

� Activate

� Deactivate

� Bypass (Synchrocheck in coupling mode)

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� Autorecloser : what for?

• Autorecloser

80 % to 90 % of faults to the electrical network are transient

GOAL :

� repair after transient fault

Cycle temporisation :

� time that is long enough to allow the fault to be cleared

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TRIP 1 CB 1rst CYCLE CB RECLAIMOPENED DELAY RECLOSED DELAY

1RST 1RST 1RST 1RST CYCLECYCLECYCLECYCLE

2nd 2nd 2nd 2nd

CYCLECYCLECYCLECYCLE

TRIP 2 CB 2nd CYCLE CB RECLAIMOPENED DELAY RECLOSED DELAY

3rd 3rd 3rd 3rd

CYCLECYCLECYCLECYCLE

TRIP 3 CB 3rd CYCLE CB RECLAIMOPENED DELAY RECLOSED DELAY

TRIP 4 CB 4thCYCLE CB RECLAIMOPENED DELAY RECLOSED DELAY

4th 4th 4th 4th

CYCLECYCLECYCLECYCLETRIP CONFIRMATION : 150 ms

(not configurable)

1st CYCLE can be 1P / 3P

2nd, 3rd, 4th CYCLE all 3P

• Autorecloser

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CYCLE DELAYS

1st Period Fast MONO 100 ms - 5000 ms step 10 ms

OR

1st Period Fast TRI 100 ms - 60 sec step 10 ms

2nd, 3rd, 4th Period Slow TRI 1s - 3600 sec step 1 sec

OTHER DELAYS

RECLAIM delay 1sec - 600 sec step 1 sec

UNLOCK delay 1sec - 600 sec step 1 sec

MANUAL CLOSE delay 1sec - 600 sec step 1 sec

TRIP CONFIRMATION delay 150 ms (not configurable)

• Autorecloser

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C264

Internal Synchrocheck

CT/VT calculations

CB CLOSEORDER

NETWORK

AINTERNALSYNCHRO

CHEK

CT/VTCALCULATIONS

NETWORKNETWORKNETWORKNETWORK

AAAA

NETWORKNETWORKNETWORKNETWORK

BBBB LINELINELINELINE

Application to two networks

• Internal Synchrocheck

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• xPS to xPC Association

On change of state (Set, Reset, …), an SPS can activate :

� SPC (Set, Reset, None)

� DPC (Open, Close, None)

On change of state (Closed, Open, Jammed, Undefined, …), a DPS can activate :

� SPC (Set, Reset, None)

� DPC (Open, Close, None)

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• Pole Discrepancy

One Phased Circuit Breakers

� pole discrepancy èèèè delay èèèè All phases are opened

PHASE DISCORDANCE delay 1s - 3600 sec step 1 sec

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• Automatic Tap Change Control

� ATCC function is used to automatically maintain the correct voltage at the lower voltage of transformers

� ATCC is able to manage one transformer or several transformers in parallel.

Transformers are in parallel if their secondary poles are interconnected

� ATCC is managed by one computer, receiving information from the others and sending control to them.

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� Computer Management

� Binary & Analogue Inputs

� Control Sequences

� Buit-in Automations

� PSL Automations

� Isagraf Automations

• Content

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Configurable Automation

�via FBD editor

Fast Automation

�response time immediate, calculated each time an input is changing

Assumed logical functions

�AND, OR, XOR, NOT

�BISTABLE (RS)

�TIMERS

PSL Inputs

�SPS, DPS, MPS (wired, system, IED)

�SPC, DPC (not advised)

�MV threshold

xPS state values are configurable (True, False, Invalid)

PSL Outputs

�SPS (SET if PSL is TRUE, RESET if FALSE, INVALID if INVALID)

response time is minimum 50ms for these functions

• PSL Overview

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AND

TRUE

FALSE

INV

TRUE

TRUE

FALSE

INV

FALSE

FALSE

FALSE

FALSE

INV

INV

FALSE

INV

OR

TRUE

FALSE

INV

TRUE

TRUE

TRUE

TRUE

FALSE

TRUE

FALSE

INV

INV

TRUE

INV

INV

NOT

TRUE

FALSE

INV

FALSE

TRUE

INV

XOR

TRUE

FALSE

INV

TRUE

FALSE

TRUE

INV

FALSE

TRUE

FALSE

INV

INV

INV

INV

INV

• PSL Logic Gates

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• PSL Tool (FBD Editor)

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� Computer Management

� Binary & Analogue Inputs

� Control Sequences

� Buit-in Automations

� PSL Automations

� Isagraf Automations

• Content

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• Overview

Configurable Automation

�via Isagraf workbench integrated to configurator

Speed of Automation

�synchron automation with cycle time > 50 ms (usually 200ms)

Assumed functions

�Standard functions as described in IEC-61131-3

Programming

�SFC (Sequential Function Chart)

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S1

S2

S3

T1

T2

S1

Jump (loop) to step

1) Step i

Si Action Active Si=1 TokenInactive Si=0

2) Transition j

Tj Receptivity = Boolean function

3) Oriented Graph Top Down

Initial Step (Token)

References

1) Step

2) TransitionDynamic

• SFC Basis

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� Condition to cross Transition

Steps Up Active

Receptivity is True

� Crossing Transition

Steps Up Deactivated

Steps Down Activated

� If several transition can be crossed, they are crossed in same time

Petri Network Synchron

� Priority to activation (several successive token)

� Graph Connexe

Sl

Tj

Sm

=1=0

RULES

• SFC Basis

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1) Selection

T1 Choice1

S0

T2 Choice2

S1 S2

S3 S4

T3

S5

T4

3) Concurrency (in parallel)

T5 Global condition

S6

S7 S8

S9 S10

T3

S11

Choice1 & Choice2 =0Conditions are exclusive

2) Convergence

4) Synchronisation

• SFC Basis