InvenSense Fabless Model for the MEMS Industry · 2017-03-24 · InvenSense, Inc. Proprietary...
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InvenSense, Inc. Proprietary
InvenSense, Inc.
Proprietary
InvenSense Fabless Model for the MEMS Industry
HKSTP Symposium – Aug 2016

InvenSense, Inc. Proprietary
• MEMS Market
• InvenSense
• CMOS-MEMS Integration
• InvenSense Shuttle Program and Process
Outline

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MEMS MARKET

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$2,000
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2012 2013 2014 2015 2016 2017 2018 2019
Automotive
Consumer
Industrial
Telecom
MEMS Markets by Applications U
S$M
Yole Devéloppement “Status of the MEMS Industry” April 2014

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$200
$400
$600
$800
$1,000
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2013 2014 2015 2016 2017 2018 2019
MEMS for Internet of Things (IoT) Market U
S$M
Yole Devélopement “Status of the MEMS Industry” April 2014

InvenSense, Inc. Proprietary
wearabl
e
sports
energy security
control
Sensor
Sensor
AlwaysOn, and Intuitively Interactive Apps and Services Location + Activity + Time + Environment
15
Ambient Computing – Internet of Things

InvenSense, Inc. Proprietary
INVENSENSE

InvenSense, Inc. Proprietary Note:
Company fiscal year ends Sunday closest to March 31.
Founded
2003
Headquarters
San Jose, CA
11.16.11
NYSE: INVN
Employees
665
$3 $8 $29
$80 $97
$153
$209
$253
$372
FY2007 FY2008 FY2009 FY2010 FY2011 FY 2012 FY2013 FY2014 FY2015
($ in M
illio
ns)
Cash Position
$242M (As of 28 June 2015)

InvenSense, Inc. Proprietary 9
San Jose, Calif
Calgary, Canada
Boston, Mass Grenoble, France
Milan, Italy
Bratislava, Slovakia
Yokohama, Japan
Shanghai, China
Shenzhen, China
Seoul, Korea
Hsinchu, Taiwan

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Select Customers
10
Mobile 78%
Imaging 12%
Other/ IoT 10%
FY15

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MEMS Sensors
Fabrication
Stabilization Navigation
Sensor Fusion
Unique Technology & Intellectual Property
11
MEMS Microphones
Fingerprint Authentication

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Fabless Business Model
12
• 1 Billion Unit Capacity
• Super Efficient Supply Chain
• Easy Fulfillment of Short Lead Time Upsides
CMOS-MEMS Wafer Sort Packaging Proprietary Testing
TSMC
GlobalFoundries
InvenSense
ASE
Amkor
Lingsen InvenSense

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VALUE OF WAFER-LEVEL CMOS-MEMS INTEGRATION

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Low Parasitics
Minimize routing and external interconnect
Wafer Level Sealing / Packaging
Wafer Level Testing
Designed for Test
Wafer-level Integration Advantages

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Semiconductor Manufacturing Flow for MEMS
15
Wafer Sort CMOS-MEMS Packaging FT & Ship
Traditional MEMS
Process
InvenSense Process
CMOS–MEMS Wafer TSMC
Wafer Sort (e-test)
Assembly
1 chip
Singulation Integrated
Chip
Final Test
CMOS Wafer Foundry 1
WAT CMOS only
Singulation ASIC Chip
MEMS Wafer Foundry 2
MEMS WAT Singulation MEMS Chip
Final Test
Assembly
Multi-Chip

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Applications Benefiting from CMOS Integration
High Sensitivity
• Low signal and low noise requirement
High Complexity
• Large arrays and closed-loop control
High Integration
• Sensor fusion and high-density SoC
Low Cost and Small Size
• Mobile devices and Internet of Things
• Implantable Sensors

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INVENSENSE SHUTTLE

InvenSense, Inc. Proprietary
Challenges for MEMS Product Development
• “One product - one process” increases barrier to entry
• Find foundry able and willing to bring up new process Fabrication
• Fighting both design and process simultaneously
• Need for fast design iterations to keep up with market
• New start ups need $50M-$70M, 7+ years to profit Development
• Over 50% of costs are in package and test
• Establish high yield and quality
• Establish reliable supply chain to deliver high quality at low cost Production
• Extend and expand product base
• Maintain competitiveness - add more value and lower cost Growth

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Offer a proven and high volume CMOS-MEMS platform for MEMS fabrication
Speed up development cycle and time to commercialization
Bring the “fabless CMOS” scalable production model to MEMS industry
InvenSense Shuttle Objectives

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Innovators
• Faster development cycle by focusing on innovative MEMS designs and not fabrication
• Faster and lower cost development cycles
InvenSense
• Collaborate on new ideas and opportunities
• Building a closer relationship with innovators
• Potential royalty revenue
Market
• More innovations in MEMS
• More standardization in the industry
InvenSense Shuttle Payoff

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InvenSense Shuttle Processes
• Standard (SOI) Shuttle – Process used on InvenSense inertial sensors
– SOI MEMS integrated with 0.18um CMOS
– Suitable for: Inertial, Resonators, Pressure, RF
• Piezo Shuttle – Extension of standard process to piezo (AlN)
– AlN + Si MEMS integrated with 0.18um CMOS
– Suitable for: RF, Ultrasound, IR, Timing, Audio

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• Single-Crystal Si MEMS Structural layer
• DRIE structure definition
• No release etch requirement
• Aluminum-Germanium wafer bond
MEMS
• 0.18 mm Process
• High voltage LDMOS (up to 24v)
• 6 Metal layers CMOS
SOI Shuttle Process Overview
Wire-Bond Pad
Moveable
MEMS
CMOS Contact MEMS Anchored to
handle only
MEMS Anchored to
handle and CMOS
Bottom Cavity
in CMOS
Electrode to interact with MEMS
Upper
Cavity
Eutectic Bond
CMOS Wafer
IMD+Pass.
CMOS Top Metal
Germanium
Device Layer
Buried Oxide
Handle Wafer
Top Aluminum

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• AlN + Silicon structural layer
• Top and Bottom piezo electrodes
• Port opening to expose MEMS to environment
• TCF compensation options
• Aluminum-Germanium wafer bond
MEMS
• 0.18 mm Process
• High voltage LDMOS (up to 24v)
• 6 Metal layers CMOS
Piezo Shuttle Process Overview
MEMS wafer Oxide Al
AlN Mo Ge CMOS wafer
Device layer IMD

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Standard Shuttle Process Flow

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Piezo Shuttle Process Flow
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MEMS wafer Oxide Al
AlN Mo Ge CMOS wafer
Device layer IMD

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SAMPLE SHUTTLE PROJECTS

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Project: Mode-Reversal FM Gyro
27
Collaborators:
D. Horsley, B. Boser
UC Davis/Berkeley
Process: SOI

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Project: CMOS-Integrated High-Frequency Resonators
28
Collaborators:
T. Kenny, B. Murmann
Stanford University
Process: SOI

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Project: Nano-Power Pressure Sensor
29
Collaborators:
S. Gambini
University of Melbourne
Process: SOI

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Shuttle Projects: IR Sensor
30
Collaborators:
Mina Rais-Zadeh
University of Michigan
Process: Piezo
IR on
IR off

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Collaborators:
D. Horsley, B. Boser
UC Davis/Berkeley
Process: Piezo
Projects: Ultrasonic Fingerprint Sensor
31
Fingerprint (optic) Fingerprint (ultrasonic)
Lateral distance - x (mm)
Late
ral dis
tance -
y (
mm
)
-5 -4 -3 -2 -1 0 1 2 3 4 5-4
-3
-2
-1
0
1
2
3
4
5
10
15
20
25
mV

InvenSense, Inc. Proprietary
INVENSENSE SHUTTLE PROGRAM

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InvenSense Shuttle
• Brings the CMOS fabless model to MEMS industry
• Increases MEMS Value through system integration
• Enables revolutionary new Smart MEMS products
• Opens world class foundries to MEMS innovators
• Reduces time to market
• Next Shuttle tapes out in December 2016
• For More Information – Contact us: [email protected]
– Register on NF Shuttle Web Site: http://www.invensense.com/invensense-shuttle/login/
Summary

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