IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 4, APRIL 2011 1253

High-Efficiency MOSFET Inverter with H6-TypeConfiguration for Photovoltaic Nonisolated

AC-Module ApplicationsWensong Yu, Member, IEEE, Jih-Sheng (Jason) Lai, Fellow, IEEE, Hao Qian, and Christopher Hutchens

Abstract—A novel, high-efficiency inverter using MOSFETs forall active switches is presented for photovoltaic, nonisolated, ac-module applications. The proposed H6-type configuration featureshigh efficiency over a wide load range, low ground leakage current,no need for split capacitors, and low-output ac-current distortion.The detailed power stage operating principles, pulsewidth modu-lation scheme, associated multilevel bootstrap power supply, andintegrated gate drivers for the proposed inverter are described.Experimental results of a 300 W hardware prototype show thatnot only are MOSFET body diode reverse-recovery and groundleakage current issues alleviated in the proposed inverter, but alsothat 98.3% maximum efficiency and 98.1% European Union effi-ciency of the dc–ac power train and the associated driver circuitare achieved.

Index Terms—AC module, high efficiency, MOSFET inverter,nonisolated, photovoltaic (PV) systems, transformerless.

I. INTRODUCTION

PHOTOVOLTAIC (PV) ac modules may become a trend forfuture PV systems because of their greater flexibility in dis-

tributed system expansion, easier installation due to their “plugand play” nature, and higher system-level energy harnessingcapabilities under shaded or PV manufacturing mismatch con-ditions as compared to the single or multistring inverters [1]–[4].A number of inverter topologies for PV ac-module applicationshave been reported so far with respect to the number of powerstages, location of power-decoupling capacitors, use of trans-formers, and types of grid interface [5]–[15]. Unfortunately,these solutions suffer from one or more of the following majordrawbacks: 1) the limited-lifetime issue of electrolytic capac-itors for power decoupling [5]–[9]; 2) limited input voltagerange for the available panels in the market [10]–[12]; 3) highground leakage current when the unipolar pulsewidth modula-tion (PWM) scheme is used in a transformerless PV system [13];4) low-system efficiency if an additional high-frequency bidi-rectional converter is employed [14]–[16]; and 5) increased cost

Manuscript received December 6, 2009; revised March 25, 2010 and July12, 2010; accepted August 16, 2010. Date of current version June 10, 2011.The paper was presented in part at the 25th IEEE Applied Power ElectronicsConference, Palm Springs, CA, February 21–25, 2010. Recommended for pub-lication by Associate Editor T. Shimizu.

The authors are with the Bradley Department of Electrical and Com-puter Engineering, Virginia Polytechnic Institute and State University, Blacks-burg, VA 24061-0111 USA (e-mail: wensong@vt.edu; jihshenglai@gmail.com;hqian@vt.edu; Hutchens@vt.edu).

Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TPEL.2010.2071402

Fig. 1. Two-stage PV ac-module application of the H6-type inverter.

and complexity of the circuit if energy in the transformer leak-age inductance is recycled by either an active snubber or soft-switching circuit [17]–[19].

Since galvanic insulation in an ac module for PV applica-tion is not required by code, a two-stage ac module combininga nonisolated high step-up converter and a high-efficiency in-verter with H6-type configuration, as shown in Fig. 1, can beused to solve the aforementioned issues. This two-stage systemconfiguration can significantly reduce the power-decoupling ca-pacitance by locating the capacitor in the dc link [3]. And thefirst stage also can be designed to meet the requirement of thewide input voltage range for the available panels in the mar-ket. Reference [20] reported a dc–dc converter with a singleactive switch—combining boost, flyback, and charge-pump cir-cuits to simultaneously achieve wide input range, high-voltagegain, high efficiency, and low cost with the 20–70 V input, 180–200 V output, and 97.4% peak efficiency as the first part ofPV integrated ac module. This paper, however, will concentrateon the second power stage—the inverter circuit to obtain highefficiency of the MOSFET dc–ac circuit and to avoid the highground leakage current issue.

The simplest inverter using hybrid MOSFETs and insu-lated gate bipolar transistors (IGBTs) with unipolar PWM toachieve high efficiency is shown in Fig. 2. The high-side IGBTsserve as line frequency polarity selection switches and low-sideMOSFETs operate in high frequency sinusoidal PWM (SPWM)to control the output voltage or current. The high efficiency ofthe hybrid four-switch inverter can be achieved over wide loadrange because the MOSFETs can avoid the fixed voltage-droplosses and significantly reduce the turn-OFF losses without tailcurrent as compared to the case with IGBTs. However, the hy-brid four-switch inverter with unipolar PWM is not suitablefor nonisolated ac-module application because the high groundleakage current is generated through the parasitic capacitance ofthe PV panel due to the high-frequency voltage swing at the PVterminals. The severe ground leakage current results in the prob-lems, which include lower efficiency, output current distortion,electromagnetic interference (EMI) and safety issue [21]–[26].

0885-8993/$26.00 © 2011 IEEE

1254 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 4, APRIL 2011

Fig. 2. Simplest inverter using hybrid MOSFETs and IGBTs with unipolarPWM to achieve high efficiency.

Fig. 3. High efficiency five-switch inverter with low ground leakage current.

The five-switch high-efficiency inverter with unipolar PWM,as shown in Fig. 3, to solve the high ground leakage currentissue is presented in [21]. The MOSFET S5 and S1 or S2 op-erate in the SPWM to avoid the fixed voltage-drop losses andsignificantly reduce the turn-OFF losses like what the invertershown in Fig. 2 does. In addition, high-frequency voltage swingat the PV terminals is eliminated because the top and bottomswitches are turned off simultaneously to share half the dc-busvoltage and to decouple the PV from the grid during the outputinductor freewheeling interval. However, MOSFETs cannot beused as S3 or S4 in the inverter, as shown in Fig. 3, to fur-ther improve the efficiency in the PV ac-module applicationswhere power level is typically lower than 300 W because theMOSFET body diode slow reverse-recovery induces large turn-ON loss, possible device damage and EMI problem [27], [28].Moreover, the cost-effective solution using bootstrap technol-ogy with the integrated chips to drive the high-side and midsideactive switches has not been presented.

In this paper, a novel, high-efficiency inverter, usingMOSFETs for all the active switches, is proposed for PV, non-isolated, ac-module applications. The presented H6-type con-figuration features high efficiency over a wide load range, lowground leakage current, no need for split capacitors, and low-output ac-current distortion. Detailed power stage operatingprinciples, PWM scheme, and novel bootstrap power supplyfor the proposed inverter are described. To verify the valid-ity of the circuit and the improved performance of the pro-posed inverter, a 300 W hardware prototype—targeted at PVnonisolated ac-module applications—has been designed, fabri-cated, and tested. Experimental results show that not only areMOSFET body diode reverse-recovery and ground leakage cur-rent issues alleviated in the proposed inverter, but also that 98.3%maximum efficiency at about half of rated output power and98.1% European Union (EU) efficiency of the dc–ac powertrain and the associated driver circuit are achieved.

Fig. 4. Circuit diagram of the proposed inverter with H6-type configuration.

Fig. 5. PWM scheme for the proposed inverter: (a) signals in time domain;and (b) implemented circuit.

II. PROPOSED INVERTER TOPOLOGY

AND OPERATION ANALYSIS

Fig. 4 shows the circuit diagram of the proposed inverterwith H6-type configuration, which is composed of six powerMOSFETs (S1–S6), two freewheeling diodes (D1 and D2),and two split inductors (L1 and L2) as a low-pass filter. Thiscircuit is well suited for nonisolated ac-module applicationsbecause of the following advantages: 1) high efficiency overa wide load range by using MOSFETs for all active switchessince their intrinsic body diodes are naturally inactive; 2) lowground leakage current because the voltage applied to the para-sitic ground-loop capacitance contains only low-frequency com-ponents; 3) smaller output inductance as compared to that of thecommon full-bridge inverter with bipolar PWM switching; and4) low-output ac current distortion because there is no need tohave dead time for the proposed circuit since the three activeswitches in the same phase-leg never all turn ON during thesame PWM cycle.

Fig. 5 illustrates the PWM scheme for the proposed inverter.As shown in Fig. 5(a), the top device in one leg and the bottomdevice in the other leg are switched simultaneously in the PWMcycle and the middle device operates as a polarity selectionswitch in the grid cycle. As shown in Fig. 5(b), if the sinusoidalcontrol voltage vcontrol , which is synchronized with output volt-age, is higher than the triangular carrier voltage vcarrier , then thegating voltage G1 and G6 are active; otherwise, G1 and G6 areinactive. And if vcontrol is higher than zero, the gating voltageG4 is active; otherwise, G4 is inactive. Similarly, the compar-ison of (−vcontrol) with vcarrier or zero results in the logicalsignals to control G2 , G5 , and G3 , respectively.

Fig. 6 shows the four topological stages in one grid cycle forthe proposed inverter. Note that the point N is the dc-link nega-tive terminal, and the point E is the grid negative terminal. The

YU et al.: HIGH-EFFICIENCY MOSFET INVERTER WITH H6-TYPE CONFIGURATION 1255

Fig. 6. Topological stages of the proposed inverter.

four operation modes are briefly described as follows. Duringthe grid positive half cycle, switch S4 remains ON, whereas S1 ,S6 , and D1 commutate at the PWM switching frequency. WhenS1 , S6 , and S4 are ON and the other switches and diodes areOFF, the inductor current is charging, as shown in Fig. 6(a).Under the condition that the inductance values of L1 and L2 areidentical, the inductor voltage can be found as

vL1 = vL2 = 0.5(vdc − vac). (1)

And the output voltage vac is calculated by

vac = vdcM sin(ωt) (2)

where vdc is the dc-link voltage, M is the modulation index,and ω is the angular frequency of the grid.

For simplification, the impedance at the line frequency be-tween neutral line and ground is neglected. From (1) and (2),the ground potential shown in Fig. 6(a) in the charging intervalduring positive grid half cycle can be expressed

vEN1 = 0.5vdc [1 − (M sin(ωt))] . (3)

In the freewheeling interval during the positive grid half cycleshown in Fig. 6(b), the S1 and S6 simultaneously turn OFF andS4 and D1 are ON. The voltages of the inductor L1 and L2 aregiven as

vL1 = vL2 = −0.5vac . (4)

Under the condition that the S1 and S6 share the dc-linkvoltage when they are simultaneously turned off, the voltagestress of the S6 can be found as

vS6 = 0.5vdc . (5)

For simplification, the impedance at the line frequency be-tween neutral line and ground is also neglected. From (2), (4),and (5), the ground potential shown in Fig. 6(b) in the freewheel-ing interval during positive grid half cycle can be expressed as

vEN2 = 0.5vdc [1 − (M sin(ωt))] . (6)

On the basis of the fact that (6) is identical to (3), the PWMswitching frequency voltage of the ground potential is avoided.The operation modes similarly change during the grid negativehalf cycle. From Fig. 6(a)–(d), it can be seen that the body diodesof the MOSFETs are naturally inactive and the high-frequencyvoltage of the ground potential is avoided during the whole gridcycle. As a result, MOSFETs can be employed as all the activeswitches to achieve higher efficiency than that of the five-switchinverter, and high ground leakage current can be avoided just assame as the five-switch inverter.

In case of enough energy left in the inductor, at the transitionmode of turn-OFF G4 , zero-voltage-switching will be achievedbecause the current of the inductors is freewheeling throughthe body diodes of S2 , S3 , and S5 . Therefore, it is a normaltransition without any device over-voltage issue.

III. ASSOCIATED MULTILEVEL BOOTSTRAP POWER

SUPPLY AND INTEGRATED GATE DRIVERS

FOR THE PROPOSED INVERTER

Although the proposed inverter has the distinctive advan-tages over the conventional full-bridge inverter, there are alsosome shortcomings associated with this method: two more ac-tive switches and their gate drivers and the individual powersupplies. Multilevel bootstrap technology has been presented inthe multilevel inverter [27]–[29]. The major technology issueof this kind of bootstrap circuit is its dependence on the powertrain topology and the corresponding PWM scheme. In this pa-per, we apply the technique to the proposed power circuit usingthe cross-leg connection for charging path.

Such a cost-effective solution to power the high-side and mid-side gate drives for the proposed inverter using the bootstrappower supply technique is shown in Fig. 7. Four small capac-itors Ca1–Ca4 and diodes Da1–Da4 are employed to transferenergy to the high-side and midside switches from an auxiliarydc voltage source Ea . Note that the energy of Ca1 cannot betransferred from Ca3 , which is in the same phase leg becausethe middle device S3 and its body diode are never turned onwhen S1 operates at high frequency, such that the cross-leg con-nections of the bootstrap circuit for the proposed inverter arenecessary. As shown in Fig. 8(a), when the inverter output volt-age is positive, the capacitor Ca4 is charging through Da4 atvery PWM cycle since the low-side switch S6 in the same leg isturned on at high frequency. With the cross-leg connection, Da3can be turned on before D1 is ON at very PWM cycle while S4remains ON like what the high-side drive in the normal buckconverter does, as shown in Fig. 8(b). Thus, energy of Ca4 cantransfer to Ca1 through Da3 to turn ON the high-side switch S1 .The proposed cross-leg bootstrap power supply is preferred tothe use of isolated auxiliary supply for each gate drive becauseof its compact size and compatibility with integrated chips. Itmakes the proposed inverter more appealing for PV ac-moduleapplications.

The high-side and middle-side MOSFETs in the same phaseleg can be driven by one of the FAN7385 integrated circuits, asshown in Fig. 9.

1256 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 4, APRIL 2011

Fig. 7. Circuit diagram of the bootstrap power supply for the proposed inverter.

Fig. 8. Charging path of the bootstrap capacitors: (a) for the middle-side gatedrive and (b) for the high-side gate drive.

Fig. 9. High-side and middle-side gate drivers using integrated chipsFAN7385 for the proposed inverter.

IV. DESIGN CONSIDERATIONS

A. Output Filter

The first consideration is the type of the output filter. Theproposed design is to adopt two split inductors at the inverteroutput to allow equal voltage swing over two inductors so thatthe high-frequency voltage swing between the PV negative ter-minal and the grid ground can be reduced significantly if theinductance values are identical. The physical structure shownin Fig. 10 can minimize the difference of inductance because

Fig. 10. Symmetric inverter-side inductors: (a) the equivalent electric circuit,(b) physical structure with toroidal core, and (c) physical structure with ETDcore.

Fig. 11. Block diagram of the complete inverter.

the symmetrical windings of the split inductors share the samecore to avoid the effect of the magnetic variation. In order toattenuate more switching ripple for the grid-side current, ad-ditional capacitor Cf and inductor Lg can be added to form asecond-order filter, as shown in Fig. 11.

The second design consideration is the current controlstrategy effect on the output filter design. The design needsto consider the position of feedback signals and the currentloop compensation [30]–[33]. As shown in Fig. 11, by select-ing the voltage at the filter capacitor vac and the current ofthe inverter-side inductor iac as the feedback signals with ad-mittance feedforward compensation, the entire 2 LCL currentcontrol plant can be simplified as a first-order system under thecondition that the capacitor Cf is small enough to be negligi-ble [31], [32]. Fig. 11 shows the block diagram of the completeinverter. More detailed analysis about the controller design canbe referred in [32].

The third design consideration is filter-parameters calcula-tion, which can be determined by setting criteria on ripple cur-rent and filtering criteria [30]–[33]. The inverter-side inductancecan be calculated based on the design criterion that the maxi-mum magnitude of the peak-to-peak current ripple is less than10%–20% of the rated output current Irated in the whole gridcycle. The peak-to-peak inductor current ripple can be derived as

Δipk =(vdc − vac)DTS

L1 + L2. (7)

And the duty cycle D in the proposed inverter is calculatedby

D = M sin(ωt). (8)

From (2), (7), and (8), the peak-to-peak ripple of the inductorcurrent can be derived as

Δipk =0.25vdcTS

L1 + L2· [1 − (1 − 2M sin ωt)2 ] (9)

YU et al.: HIGH-EFFICIENCY MOSFET INVERTER WITH H6-TYPE CONFIGURATION 1257

Fig. 12. Experimental gating signals: (a) in the grid cycle and (b) in the PWM cycle.

Fig. 13. Experimental switches voltage waveforms: (a) in the grid cycle and (b) in the PWM cycle.

where TS is the PWM switching period and

1 − 2M sin(ωt) = 0. (10)

The maximum peak-to-peak ripple of the inductor current inthe whole grid cycle is calculated by

Δipk,max =0.25vdcTS

L1 + L2≤ (10 ∼ 20)% · Irated . (11)

In the proposed inverter, the inverter-side inductance then canbe calculated with

(L1 + L2) ≥0.25vdcTS

(10 ∼ 20)% · Irated. (12)

In the conventional full-bridge inverter using bipolar PWMscheme, the inverter-side inductance can be calculated with

Lout ≥0.5 · vdcTS

(10 ∼ 20)% · Irated. (13)

As a result, the inverter-side inductance in the proposed in-verter is half that of the conventional full-bridge inverter usingbipolar PWM scheme.

The filter capacitor Cf is calculated in (14) by selecting thecutoff frequency fc of the (L1 + L2) and Cf , which is suggestedto be between five times less than switching frequency and fivetimes higher than the fundamental frequency [32].

Cf =1

4π2f 2c (L1 + L2)

. (14)

In our case, the range of acceptable capacitance Cf valueis wide because the 30 kHz switching frequency is 500 times

the grid frequency. In order to increase the power factor, thecapacitor value is further limited by the allowed reactive powerabsorbed at rated condition [31]. And the grid-side inductorLg can be selected by the high-frequency current ripple at-tenuation requirements and limited by the condition that theresonant frequency should be in a range between ten times theline frequency and one-half of the switching frequency to avoidresonance problem [31].

B. Evaluation of Conduction Loss Reduction

The proposed inverter with pure MOSFETs as active switchescan significantly reduce the conduction losses as compared withthe five-switch inverter shown in Fig. 3 using hybrid MOSFETsand IGBTs for the PV ac-module applications where powerlevel is typically lower than 300 W. The following analyzes andcompares the conduction loss of the individual device includingthe IGBT, MOSFET, diode, and the inverter-side inductor in thetwo inverters with the specified SPWM schemes.

For simplification, the conduction voltage drop characteristicsof the semiconductor devices can be given by

IGBT: vce = Vt + iRce (15)

MOSFET: vds = iRds (16)

Diode: vak = Vf + iRak (17)

where vds is MOSFET drain-source voltage drop, Rds isMOSFET drain-source on-drop resistance, vce is IGBTcollector–emitter voltage drop, Vt is IGBT equivalent voltage

1258 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 26, NO. 4, APRIL 2011

drop under zero current condition, Rce is IGBT on-drop re-sistance; vak is diode anode-cathode voltage drop; Vf is diodeequivalent voltage drop under zero current condition; Rak isdiode on-drop resistance.

While the duty ratio of each conducting device is respectivelyexpressed by

top and bottom switches: dtop−bot(t) = M sin ωt (18)

middle switches: dmid(t) = 1 (19)

freewheeling diodes: ddiode(t) = 1 − M sin ωt (20)

where ω is angular frequency and M is modulation index.And, the average conduction loss during half-line cycle can

be calculated with

P =1π

∫ π

0p(t)d (ωt). (21)

Then, the total conduction losses in the inverter shown inFig. 3 are derived as shown (22) at the bottom of this page.

And the total conduction losses in the proposed H6 invertercan be derived as shown (23) at the bottom of this page.

The aforesaid application data are as follows: MOSFETs areFDB2710 with Rds = 0.044 Ω, diodes are CMR5U-04 withVf = 0.8 V and Rak = 0.008 Ω, IGBTs is IXGA9289 withVt = 1.5 V and Rce = 0.005 Ω, the rated output current peakvalue Im = 3.535 A, and the equivalent series resistance is0.15 Ω. As a result, the proposed inverter with pure MOSFETsas active switches can reduce the conduction losses up to 51%compared with the five-switch inverter in our case.

V. EXPERIMENTAL VERIFICATIONS

A 300 W hardware prototype has been designed, fabricatedand tested to verify the validity of the proposed inverter tar-geted at PV nonisolated ac-module application. The main de-vices S1 ∼ S6 are 250 V, 42.5 mΩ MOSFETs (FDB2710), thefreewheeling diodes D1 and D2 are ultrafast diodes CMR5U-04 (400 V/5 A), the auxiliary diodes Da1 ∼ Da4 are ultrafastdiodes MURA160 (600 V/1 A), and the bootstrap capacitorsCa1 ∼ Ca4 are 1 μF, 25 V X7R. A 2 LCL filter shown inFig. 10 (L1 + L2 = 1.6 mH, Cf = 0.68 μF, and Lg = 0.5 mH)is used as the output filter. The three pieces of dual-channel

high-side gate driver integrated chips FAN7385 with the pro-posed bootstrap power supply are designed to produce thematched gating signals for the six power MOSFETs. Speci-fications of the inverter are as follows: battery bank voltageVdc = 180–200 V; output power Po = 300 W; grid voltageVg,rms = 120 V; switching frequency fsw = 30 kHz. A digitalcontrol board with Spartan-3E FPGA is used as the sinusoidaloutput current controller. Fig. 10 describes the block diagram ofthe complete inverter.

The experimental gating signals in the grid cycle and in PWMcycle are shown in Fig. 12(a) and (b), respectively. It can be seenthat the experimental gating signals vG1 , vG6 , and vG4 agreewith the analysis results of the PWM scheme and the proposedbootstrap circuit works well by observing that the gate drivevoltage level of the middle and top switches are kept constantduring the grid cycle. Moreover, the gate drive signal vG1 of thetop switch in one leg and the vG6 of the bottom switch in theother leg are matched with each other.

The experimental switches voltage waveforms under 200 Vdc-link conditions are shown in Fig. 13. The voltage stress ofthe top switch S1 and the middle switch S4 is 200 V, whichis the same as the dc-link voltage. The voltage stress of thebottom switch S6 is about half of the dc-link voltage, as shownin Fig. 13(a). It can be seen from Fig. 13(b) that the switchesS1 and S6 almost evenly share the dc-link voltage when theyswitch OFF simultaneously.

Fig. 14 shows the experimental waveforms of the groundpotential under full-load conditions. The testing results of theground potential vEN agree with the (6). The high ground leak-age current is avoided by observing that the high-frequencyvoltage of the ground potential is less than 10 Vrms under full-load conditions.

The experimental waveforms of the grid current under the120 Vrms grid voltage and full-load conditions are described inFig. 15. This figure shows that the proposed inverter presentshigh power factor and low harmonic distortion.

Fig. 16 illustrates the experimental results for efficiency un-der different dc-link voltages and output loads with 30-kHzswitching frequency and 120 Vrms ac voltage condition. Notethat the presented efficiency diagram covers the losses of thedc–ac power train and the associated driver circuit, but it does

PFive−switch = PIGBT mid + 2PMOSFET top−bot + PDIODE + PL

=(

2π

Im Vt +12I2m Rce

)+ 2

(I2m RDS

4M

3π

)+

[Im Vf

(2π− 1

2M

)+ I2m Rak

(12− 4M

3π

)]+

(Im√

2

)2

(ESR)

= 6.15W. (22)

PH 6 = PMOSFET mid + 2PMOSFET top−bot + PDIODE + PL

=(

12I2m RDS

)+ 2

(I2m RDS

4M

3π

)+

[Im Vf

(2π− 1

2M

)+ I2m Rak

(12− 4M

3π

)]+

(Im√

2

)2

(ESR)

= 3.01W. (23)

YU et al.: HIGH-EFFICIENCY MOSFET INVERTER WITH H6-TYPE CONFIGURATION 1259

Fig. 14. Experimental waveforms of the ground potential and ac output currentunder full-load conditions.

Fig. 15. Experimental waveforms of the grid current under the 120 Vrm s gridvoltage and full-load conditions.

Fig. 16. Experimental results of efficiency as a function of the input voltageand the output power.

not include the power consumption of control subcircuits. Theefficiency is higher with a lower Vdc voltage because that thediode conduction losses are reduced with a short freewheelinginterval, and the top and bottom devices’ switching losses arealso reduced with the low voltage. The maximum experimentalefficiency of the prototype is 98.3% at about half of rated outputpower and its EU efficiency is 98.1%.

VI. CONCLUSION

This paper proposes a novel single-phase inverter with H6-type configuration as a part of a wide input range, high efficiency,and long lifetime PV nonisolated 300 W ac module. Key featuresof the proposed circuit are as follows: 1) high efficiency overa wide load range by using MOSFETs for all active switchessince their body diodes are naturally inactive; 2) low groundleakage current even if no transformer is used; 3) no need for

bulky capacitors for a split dc link like what three-level invertersdo; 4) 50% reduction of the output inductance as comparedto that of the common full-bridge inverter with bipolar PWMswitching; 5) low output ac current distortion because the PWMdead time for the proposed circuit is eliminated; and 6) thesimple bootstrap power supply and the integrated gate driversfor the presented inverter. A 300 W hardware prototype has beendesigned, fabricated, and tested. Experimental results verify thevalidity of the novel circuit and show 98.1% European efficiencyof the dc–ac power train and the associated driver circuit.

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Wensong Yu (M’07) received the M.S. degree fromthe Huazhong University of Science and Technology,Wuhan, China and the Ph.D. degree from the SouthChina University of Technology, Guangzhou, China,in 1995 and 2000, respectively, both in mechanicaland electrical engineering.

In 2000, he was with the Emerson Network PowerCo., Ltd., Shenzhen, China, where he was involved inthe development of digital uninterruptible power sup-ply projects. In 2004, he joined School of Electronicand Information Engineering, South China Univer-

sity of Technology. He is currently a Research Assistant Professor in the BradleyDepartment of Electrical and Computer Engineering, Future Energy ElectronicsCenter, Virginia Polytechnic Institute and State University, Blacksburg, VA. Heis author or coauthor of more than 20 technical papers and holds three patents.His research interest includes soft-switching power converter, grid-tied inverter,industrial power electronics, digital control applied to power electronics, andrenewable energy power conditioning systems.

Jih-Sheng (Jason) Lai (S’85–M’89–SM’93–F’07)received the M.S. and Ph.D. degrees in electrical engi-neering from the University of Tennessee, Knoxville,in 1985 and 1989, respectively.

From 1980 to 1983, he was the Head of the Electri-cal Engineering Department of the Ming-Chi Instituteof Technology, Taipei, Taiwan, where he initiated apower electronics program and received a grant fromhis college and a fellowship from the National Sci-ence Council to study abroad. In 1986, he became astaff member at the University of Tennessee, where

he taught control systems and energy conversion courses. In 1989, he joinedthe Electric Power Research Institute (EPRI) Power Electronics ApplicationsCenter (PEAC), where he managed EPRI-sponsored power electronics researchprojects. From 1993, he worked with the Oak Ridge National Laboratory asthe Power Electronics Lead Scientist, where he initiated a high-power elec-tronics program and developed several novel high-power converters includingmultilevel converters and soft-switching inverters. In 1996, he joined VirginiaPolytechnic Institute and State University. He is currently a Professor and theDirector of the Future Energy Electronics Center. His research interests includehigh-efficiency power electronics conversions for high power and energy appli-cations. He is the author or coauthor of more than 165 technical papers and twobooks and is the holder of 14 U.S. patents.

Dr. Lai is the recipient of several distinctive awards including a Techni-cal Achievement Award in Lockheed Martin Award Night, two IEEE IndustryApplications Society (IAS) Conference Paper Awards from Industrial PowerConverter Committee, and one IEEE Industrial Electronics Society (IECON)Best Paper Award. He chaired the 2000 IEEE Computers in Power Electronics(COMPEL). He was the Founding Chair for the 2001 IEEE/DOE Future En-ergy Challenge. He was the General Chair of the 2005 IEEE Applied PowerElectronics Conference and Exposition (APEC).

Hao Qian received the B.S and M.S. degreesin electrical engineering from Zhejiang University,Hangzhou, China, in 2003 and 2006, respectively,and is currently working toward the Ph.D. degree atVirginia Polytechnic Institute and State University,Blacksburg, VA.

Since 2006, he has been a Graduate ResearchAssistant at the Future Energy Electronics Center(FEEC), Virginia Polytechnic Institute and State Uni-versity. His current research interests include soft-switching power converter and high-efficiency re-

newable energy power conditioning systems.

Christopher Hutchens received the B.S. and M.S.degrees in electrical engineering from Virginia Poly-technic Institute and State University, Blacksburg,VA, in 2008 and 2010, respectively, where he is cur-rently working toward the Ph.D. degree.

Since 2008, he has been a Graduate ResearchAssistant at the Future Energy Electronics Center(FEEC) at Virginia Polytechnic Institute and StateUniversity. His current research interests includelow-power renewable energy systems and dc-gridtechnologies.