Figure 8.1 (a) Schematic cross section and (b) the circuit symbol of an N-channel MOSFET.

Copyright 2006 by Oxford University Press, Inc.Principles of Semiconductor Devices Dimitrijev 2

Figure 8.1 (a) Schematic cross section and (b) the circuit symbol of an N-channel MOSFET.

8.1 MOSFET PRINCIPLES

8.1.1 MOSFET Structure


Figure 8.2 Types of MOSFETs.


Figure 8.3 Cross-sectional illustrations of a MOSFET in

(a) off (b) on modes, along with(c) the corresponding currentvoltage characteristics.

chnch Wx

L

qnWx

LR

1

(8.1)

8.1.2 MOSFET as a Voltage – Controlled Switch


Figure 8.4 Two-dimensional energy-band diagram for the semiconductor part of an N-channel MOSFET in the flat-band condition. The two different colors in the conduction band indicate the two different types of doping: N type in the source and drain regions,and P type in the body. Darker colors indicate higher carrier concentration, and the nearly white areas indicate the depletion region.

W

L

VVCR

TGSoxn )(

1

DSTGSoxnDS

D VVVL

WC

R

VI )(

(8.2)

(8.3)


Figure 8.5 Two-dimensional energy-band diagrams for an N-channel MOSFET acting as a switch in (a) off mode and (b) on mode. Thetwo colors in the conduction band indicate the concentrations of electrons and holes: darker colors correspond to higher carrierconcentrations, whereas the nearly white areas indicate depleted regions. Note that the depleted regions correspond to the areas withsloped energy bands and therefore with existence of built-in and externally applied electric field.


Figure 8.6 (a) The circuit of CMOS inverter. (b) Typical input/output signals.


Figure 8.7 Illustration of the body effect.

(a) VSB voltage increases the barrier between the electrons in the source and the drain.

(b) The surface potential of 2F does not reduce the barrier sufficiently for the electrons to be able to move into the channel.

(c) The surface potential needed to form the channel is 2F VSB .

8.1.3 The Threshold Voltage and the Body Effect


SBFs V 2

)for( TGSFBox

dsFBSBGS VVV

C

QVVV

effective gate-to-body voltage

voltage across the gate oxide

ox

dSBFFBSBT C

QVVVV )2(

ox

dFFBT C

QVV 2

(8.4)

(8.5)

(8.6)

(8.7)


)2(2 SBFAsd VqNQ

SBFFFBT VVV 22

)22()0()( FSBFSBTSBTT VVVVVV

BSFFFBT VVV 22

(8.8)

(8.9)

(8.10)

(8.11)


Figure 8.8 (a) Cross section of a MOSFET in the saturation region. (b) The corresponding IDVDS characteristics.

8.1.4 MOSFET as a Voltage – Controlled Current Source : Mechanisms of Current Saturation


Figure 8.9 Two-dimensional energy-band diagrams for an N-channel MOSFET in saturation due to channel pinch off. A comparisonof the smaller VDS bias in (a) to the larger VDS value in (b) shows that the channel is shortened by the increased drain-to-source bias,but the concentration of electrons in the channel is not changed. As in the waterfall analogy, the drain current is limited by theconcentration of the electrons in the channel and not by the height of the fall.


Figure 8.10 (a) Output and (b) transfer characteristics of a MOSFET.

)(saturation)(

)0(region triode)(

)(cutoff of ldsubthresho0

,,

,.

.

DSsatDSDSsatSBGS

DSsatDSDSSBGS

TGSD

VVVVVf

VVVVVf

VVI

(8.12)

8.2 PRINCIPAL CURRENT – VOLTAGE CHARACTERISTICS AND EQUATIONS


Ej

nEqj 0

effDS

IDLV

mCQ

ch

AI

ch EWqnxWxj ][

0

][ 2

DSIeff

D VQL

WI 0

(8.13)

(8.14)

(8.15)

(8.16)

8.2.1 SPICE LEVEL 1 Model


)Vfor()( T GSoxTGSII VCVVQQ

oxTGSI CvVVvQ )()(

oxDS

TGS

V

TGSDS

ox

V

IDS

I

CV

VV

dvvVVV

C

dvvQV

Q

DS

DS

2

)(

)(1

0

0

2)(

2DS

DSTGSD

VVVVI

effox L

WC0

(8.17)

(8.18)

(8.19)

(8.20)

(8.21)


Figure 8.11 Output characteristics corresponding to SPICE LEVEL 1 model. Solid lines, Eq. (8.20);dashed lines, saturation current.

)()(0 effeffox LWKPLWC

TGSDSsat VVV

TGSDSsatDS

D VVVV

I

0

2)(2

)( TGSDSsatDDsat VVVII

(8.22)

(8.23)

(8.24)

(8.25)

DSsatDSTGS

DSsatDSDSDSTGSD

VVifVV

VVifVVVVI

2

2

)(2

0]2)[(

(8.26)


Figure 8.12 N-channel MOSFET diagram, indicating the surface potential at the source and the drain ends of the channel.

8.2.2 SPICE LEVEL 2 Model

ss

SBFSBFSBFBT VVVVV

22

ssSBFBsT VVv )(

(8.27)

(8.28)


dyCvVL

dyyQL

Qeffeff L

oxsTGSeff

L

Ieff

I 00

)]([1

)(1

s

VV

V oxsTGSDS

s

VV

V sISBFDSSBF

I

dCvVV

dQVVV

Q

DSSBF

SBF

DSSBF

SBF

2

2

2

2

)]([1

)()2()2(

1

(8.29)

(8.30)

2323 22

3

2

22 SBFDSSBFDS

DSFFBGS

DS

oxI VVVV

VVV

V

CQ

(8.31)


2323 22

3

2

22 SBFDSSBFDS

DSFFBGSD VVVV

VVVI

(8.32)

1)(4

12

20

2

2

SBFBGS

FFBGSDSsatDS

D

VVV

VVVV

I

(8.33)


2)0()0()0(

2DS

DDSDDD

VIVIII

21

212

2

21

21

)2(2

1)0(

)2(2

1

)2()2()0(

)2()2(

0)0(

SBFD

DSSBFDS

D

DSDS

DD

SBFFFBGSD

DSSBFDSFFBGSDS

DD

D

VI

VVV

I

VV

II

VVVI

VVVVVV

II

I

(8.34)

(8.35)

8.2.3 SPICE LEVEL 3 Model : Principal Effects


DSDS

F

SBFV

SBFFFBGSD VVV

VVVI

B

T

221

2

1)22(

SBF

BV

F

22

(8.36)

(8.37)


2)()1(2

)( TGSB

DSsatDDsat VVF

VII

DSsatDSTGSB

DSsatDSDS

BDSTGSD

VVifVVF

VVifV

FVVVI

2

2

)()1(2

02

1

B

TGSDSsat F

VVV

1

(8.39)

(8.40)

(8.41)

B

TGSDSsat

DS

D

F

VVV

V

I

10 (8.38)


Figure 8.13 Comparison of LEVEL 1, LEVEL 2, and LEVEL 3 models.


Figure 8.14 Influence of mobility reduction with gate voltage on (a) transfer and (b) output characteristics.

)(10

TGSs VV

mobilitysurface

(8.42)

8.3 SECOND – ORDER EFFECTS8.3.1 Mobility Reduction with Gate Voltage


eff

DSs

seff

LV

v

mobilityeffective

max

1

(8.43)

effeff

oxeff

L

WKP

L

WC

(8.44)

8.3.2 Velocity Saturation ( Mobility Reduction with Drain Voltage)


Figure 8.15 Energy-band diagrams along the channel of a MOSFET illustrating the drain-induced barrier lowering ( DIBL).

pincheffpincheff

oxeff

LL

WKP

LL

WC

DSDSBFsFFBT VVFVV 22

(8.45)

(8.46)

8.3.3 Finite Output Resistance


Figure 8.16 Output characteristics with (solid lines) and without (dashed lines) the influence of VDS on VT .


Figure 8.17 Illustration of the threshold voltage related short-channel effect.

SBFsFFBT VFVV 22 (8.47)

Figure 8.18 Threshold voltage dependence on the MOSFET channel length.

8.3.4 Threshold – Voltage – Related Short – Channel Effects


Figure 8.19 Illustration of the narrow channel effect. Fringing electric field wastes the gate voltage, causing a threshold voltage increase in narrow-channel MOSFETs.

)2(22 SBFnDSDSBFsFFBT VFVVFVV (8.48)

8.3.5 Threshold – Voltage – Related Narrow – Channel Effects


Figure 8.20

The use of a logarithmic drain axis emphasizes the subthreshold region of a transfer characteristic (the subthreshold current cannot be seen with a linear axis). The subthreshold swing is 60 mV/decade, corresponding to ns 1 in Eq. (8.49).

kTnVDsubthD

sGSeII /0 (8.49)

8.3.6 Subthreshold Current


8.4 NANOSCALE MOSFETs8.4.1 Down – Scaling Benefits and Rules

Figure 8.21 Deep-submicron MOSFET structure.

Table 8.1 General Down-Scaling Rules and Their Effects


Figure 8.22 Transfer characteristics of 100-nm MOSFETs (the channel width is 1 m).

(a) Devices with similar characteristics wereexperimentally demonstrated as early as 1987, but they exhibit pronounced short-channel effects and very high off current.

(b) As known from the down-scaling rules, an increase in the substrate doping eliminates the short-channel effects, but also increases the threshold voltage,in this case above the 1.0-V supply voltage.

(c) Down-scaling rules require a 1.1-nm gate oxide that leaks a very high input current.

8.4.2 Leakage Currents


Figure 8.23 (a) Energy-band diagram and (b) equipotential contours for the MOSFET with the transfer characteristics shownin Fig. 8.22a (VGS 0 V, VDS 1.0 V).


Figure 8.24 Energy-band diagram (a) and equipotential contours (b) for the MOSFET with the transfer characteristics shown in Fig. 8.22c (VGS 0 V, VDS 1.0 V).


d

d

tC

gate-dielectric capacitance per unit area : (8.50)

Figure 8.25 MOSFET with engineered doping profile in the substrate.Figure 8.26 SOI MOSFET with ultra-thin body.

8.4.3 Advanced MOSFETs


Figure 8.27 FinFET: the most promising structure for nanoscale MOSFETs.


Figure 8.28 Failure causes and mechanisms leading to changes of oxide charge, and border and interface trap densities.

Figure 8.29 The threshold voltage “turn-around” effect is a manifestation of the link between hole trapping and the creation of interface traps.

8.4.4 Reliability Issues


Figure 8.30 Mechanisms of positive gate-oxide charge creation by a high gate-oxide field.

(a) Negative gate bias. (b) Positive gate bias.

oxEEAer /0 (8.51)

High Oxide Field


Figure 8.31 Mechanism of channel hot-electron injection into the gate oxide.

(a) Illustration at the device cross section. (b) Energy bands at the point of hot electron injection.

Hot Carriers


Figure 8.32 Mechanism of avalanche hot-carrier injection into the gate oxide.

msubIAt )(

max/EBsub CeI

(8.52)

(8.53)


Table 8.2 Results of Hot-Carrier Accelerated Testing

Example 8.5


Figure 8.33 The architecture of DRAMs with 1C1T memory cells.

8.5.1 1C1T DRAM Cell

Figure 8.34 The cross section of a 1C1T memory cell.


Figure 8.35 Flash-memory MOSFET.

(a) The cross section. (b) The transfer characteristics. (c) The energy bands in erased state. (d) The energy bands in programmed state.

8.5.2 Flash – Memory Cell

Figure 8.1 (a) Schematic cross section and (b) the circuit symbol of an N-channel MOSFET.

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Transcript of Figure 8.1 (a) Schematic cross section and (b) the circuit symbol of an N-channel MOSFET.