ETE444/544 Introduction to

Micro Fabrication

Springer Handbook of Nanotechnology

Chapter 5

http://www.springer.com/materials/nanotechnology/book/978-3-540-29857-1

Introduction• Recent innovations in the area of micro

fabrication have created a unique opportunity for manufacturing structures in the nanometer–millimeter range.

• We can fabricate novel electronic, optical, magnetic, mechanical, and chemical/biological devices with applications ranging from sensors to computation and control.

http://www.flickr.com/photos/ibm_research_zurich/5668772519/sizes/l/in/photostream/

Nanofabrication• Basic Microfabrication Techniques

– Lithography– Thin Film Deposition and Doping– Etching and Substrate Removal– Substrate Bonding

Moore’s Law and Transistor Count 1971-2008Moore's law describes a long-term trend in the history of computing hardware whereby the number of transistors that can be placed inexpensively on an integrated circuit doubles approximately every two years. The period often quoted as "18 months" is due to David House, an Intel executive, who predicted that period for a doubling in chip performance (being a combination of the effect of more transistors and them being faster).[1] he law is named after Intel co-founder Gordon E. Moore, who described the trend in his 1965 paper.[6][7][8] The paper noted that the number of components in integrated circuits had doubled every year from the invention of the integrated circuit in 1958 until 1965 and predicted that the trend would continue "for at least ten years"

http://en.wikipedia.org/wiki/Moore’s_law

Fabrication• Top-down: Chisel away material to make

nanoscale objects• Bottom-up: Assemble nanoscale objects

out of even smaller units (e.g., atoms and molecules)

• Ultimate Goal: Dial in the properties that you want by designing and building at the scale of nature (i.e., the nanoscale)

Top Down vs. Bottom Up

http://nanopedia.case.edu/NWPage.php?page=nanofabrication

Top-Down: Photolithography

Mark C. Hersam: Northwestern University

Top-Down: Nanoimprint Lithography

Mark C. Hersam: Northwestern University

Top-Down: Nanosphere Lithography

Mark C. Hersam: Northwestern University

Bottom-Up: Carbon Nanotube Synthesis

Bottom-Up:Molecular Self Assembly

• Spontaneous organization of molecules into stable, structurally

• well-defined aggregates (nanometer length scale).• Molecules can be transported to surfaces through liquids to

form self-assembled monolayers (SAMs).

Merging of two approaches: Top-down and bottom-up machining methodologies

• Most human manufacturing methods of small devices involve top-down approaches. Starting from larger blocks of material we make smaller and smaller things. Nature works the other way, i.e., from the bottom-up.

• All living things are made atom by atom , molecule by molecule; from the small to the large. As manufacturing of very small things with top-down techniques (NEMS or nano mechanical devices) become too expensive or hit other barriers we are looking at nature for guidance (biomimetics).

• Further miniaturization might be inspired by biology but will most likely be different again from nature -- the drivers for human and natural manufacturing techniques are very different.

Seeman

Eigler

Daunert - MadouMontemagno

Merging of two approaches: Top-down and bottom-up machining methodologies --NEMS

• MEMS’ little brother is NEMS, the top-down approach to nano devices. This biomimetic approach to nano devices I like to call nanochemistry. To succeed in the latter we will need :– self-assembly and directed assembly (e.,g, using

electrical fields -see next viewgraph)– massive parallelism– understanding of molecular mechanisms--

chemomechanics– engineers/scientists who understand ‘wet’ and ‘dry’

disciplines• Example nano chemistry approaches:

– Natural polymers: e.g., NAs and proteins not only as sensors but also as actuators and building blocks (Genetic engineer NA’s and proteins-rely on extremophiles for guidance)

– Mechanosynthesis– NEMS/biology hybrids --to learn only

Lithography• Lithography is the technique used to transfer a computer

generated pattern onto a substrate (silicon, glass, GaAs, etc.). This pattern is subsequently used to etch an underlying thin film (oxide, nitride, etc.) for various purposes (doping, etching, etc.). Although photolithography, i. e., the lithography using a UV light source, is by far the most widely used lithography technique in microelectronic fabrication, electron-beam (e-beam) and X-ray lithography are two other alternatives that have attracted considerable attention in theMEMSand nanofabrication areas.

Exposure Systems• Depending on the separation between the mask and the

wafer, three different exposure systems are available:1. Contact : gives better resolution than proximity.2. Proximity3. Projection

– uses a dual lens optical system to project the mask image onto the wafer.

– Widely used system in microfabrication and can yield superior resolutions compared to contact and proximity methods

Thin Film Deposition and Doping

Exposed area

Unexposed area / blocked area

Step Coverage and Conformality

Oxidation• Oxidation of silicon is a process used to obtain

a thin film of SiO2 of excellent quality (very low density of defects) and thickness homogeneity.

The oxidation of silicon also occurs at room temperature, however, a layer of about 20Å (native oxide) is enough to passivate the surface and prevent further oxidation.

Oxidation Furnace

Doping• The introduction of certain impurities in a

semiconductor can change its electrical, chemical, and even mechanical properties.

• Typical impurities, or dopants, used in silicon include boron (to form p-type regions) and phosphorous or arsenic (to form n-type regions).

• Doping is the main process used in the microelectronic industry to fabricate major components such as diodes and transistors.

N-Type / P-Type Junction

Chemical Vapor Deposition and Epitaxy

• Reaction of chemicals in a gas phase to form the deposited thin film– LPCVD (Low Pressure CVD) – PECVD (Plasma Enhanced CVD)

• MO-CVD tutorial on epitaxial deposition at http://www.memc.com/index.php?view=Epitaxial-Deposition-

Metal Organic Vapor Phase Epitaxy

Metalorganic vapour phase epitaxy (MOVPE), also known as organometallic vapour phase epitaxy (OMVPE) or metalorganic chemical vapour deposition (MOCVD), is a chemical vapour deposition method of epitaxial growth of materials, especially compound semiconductors, from the surface reaction of organic compounds or metalorganics and metal hydrides containing the required chemical elements. For example, indium phosphide could be grown in a reactor on a substrate by introducing Trimethylindium ((CH3)3In) and phosphine (PH3). Formation of the epitaxial layer occurs by final pyrolysis of the constituent chemicals at the substrate surface. In contrast to molecular beam epitaxy (MBE) the growth of crystals is by chemical reaction and not physical deposition. This takes place not in a vacuum, but from the gas phase at moderate pressures (2 to 100 kPa). As such, this technique is preferred for the formation of devices incorporating thermodynamically metastable alloys, and it has become a major process in the manufacture of optoelectronics.

http://en.wikipedia.org/wiki/Metalorganic_vapour_phase_epitaxy

LPCVD• LPCVD process is typically carried out in electrically heated

tubes, similar to the oxidation tubes, equipped with pumping capabilities to achieve the needed low pressures (0.1 to 1.0 torr). A large number of wafers can be processed simultaneously, and the material is deposited in both sides of the wafers.

• The process temperatures depend on the material to be deposited, but generally are in the range of 550 to 900 ◦C.

• As in the oxidation, high temperatures and contamination issues can restrict the type of processes used prior to the LPCVD. Typical materials deposited by LPCVD include silicon oxide (e.g., SiCl2H2 + 2N2O SiO2+2N2+2HCl at 900 ◦C)⇒

PECVD• The PECVD process is performed in plasma systems such as the one

represented in Fig. The use of RF energy to create highly reactive species in the plasma allows for the use of lower temperatures at the substrates (150 to 350 ◦C). Parallel-plate plasma reactors normally used in microfabrication can only process a limited number of wafers per batch.

• The wafers are positioned horizontally on top of the lower electrode, so only one side gets deposited. Typical materials deposited with PECVD include silicon oxide, nitride, and amorphous silicon. Conformality is good for low-aspect-ratio structures, but becomes very poor for deep trenches (20% of the surface thickness inside through-wafer holes with aspect ratio of ten).

Epitaxial Growth• In this process, a single crystalline material is

grown as an extension of the crystal structure of the substrate.

• It is possible to grow dissimilar materials if the crystal structures are somehow similar (lattice-matched).

• Silicon-on-sapphire (SOS) substrates and some heterostructures are fabricated in this way.

Molecular Beam Epitaxy

The molecular beam epitaxy technique (MBE) was developed initially for the crystalline growth of the semiconductors. It is an ultra-high vacuum (P < 10-6 mbar) technology based on the sequential evaporation of the elementary components placed in Knudsen effusion cells. One of the advantages of this method rests on the control of the growth in real time thanks to the in situ use of the high energy electron diffraction in grazing incidence (RHEED).   http://iramis.cea.fr/en/Phocea/Vie_des_labos/Ast/ast_sstechnique.php?id_ast=494

Complex Oxide Molecular Beam Epitaxy--5

This technology allows pure complex oxides films to be grown epitaxially; of special interest are films that are ferroelectric, ferromagnetic, or superconducting. Alternating layers can be deposited to allow the observation of novel properties at the boundary or interface.

http://www.flickr.com/photos/argonne/3366236801/in/photostream/

Physical Vapor Deposition

• In physical deposition systems the material to be deposited is transported from a source to the wafers, both being in the same chamber. Two physical principles are used to do so: – Evaporation – Sputtering

Electron Beam Deposition

Sputtering• In sputtering, a target of the material to be deposited is

bombarded with high-energy inert ions (usually argon).• The outcome of the bombardment is that individual atoms

or clusters are removed from the surface and ejected toward the wafer.

• The physical nature of this process allows its use with virtually any existing material: metals, dielectrics, alloys, and all kinds of compounds (for example, piezoelectric PZT).

• The inert ions bombarding the target are produced in DC or RF plasma.

Sputter Deposition

http://en.wikibooks.org/wiki/Microtechnology/Additive_Processes

Etching / Substrate Removal

• Very often the substrate (silicon, glass, GaAs, etc.) also needs to be removed in order to create various mechanical micro-/nanostructures (beams, plates, etc.). Two important figures of merit for any etching process are selectivity and directionality.– Wet Etching– Dry Etching

Wet Etching• Due to the lateral undercut, the minimum feature

achievable with wet etchants is limited to > 3μm. • Silicon dioxide is commonly etched in a dilute

(6:1, 10:1, or 20:1 by volume) or buffered HF (BHF, HF+NH4F) solutions (etch rate of ∼1,000Å/min in BHF).

• Photoresist and silicon nitride are the two most common masking materials for the wet oxide etch.

Isotropic etching• Isotropic etching of silicon using

HF/HNO3/CH3COOH.• Silicon anisotropic wet etch constitutes an

important technique in bulk micromachining. The three most important silicon etchants in this category are potassium hydroxide (KOH), ethylene diamine pyrochatechol (EDP), and tetramethyl ammonium hydroxide (TMAH).

Dry Etching• Most dry etching techniques are plasma-based. They

have several advantages compared with wet etching.• These include smaller undercut (allowing smaller

lines to be patterned) and higher anisotropicity (allowing high-aspect-ratio vertical structures).

• The three basic dry etching techniques:– high-pressure plasma etching– Reactive ion etching (RIE)– ion milling

Other Materials and Processes

• GaAs, InP, and Ga, In, Al, mixtures• CIGS semiconductor technology• Silicon photovoltaic modules• Silicon cantilever technology• Carbon nanotube, graphene electronics• Biological systems / junctions

MOCVD / Epitaxial Deposition

http://en.wikipedia.org/wiki/Metalorganic_vapour_phase_epitaxy

Contamination Control

Particle Control

http://www.roomdesigne.net/2011/09/12/semiconductor-clean-room/

V-TEK’S CLASS 10,000 CLEAN ROOM

Summary• 50 years of Semiconductor processing

technology. Moore’s Law still holds true!• Lithography is the workhorse technology• Thin film deposition (epitaxial layers)• Oxidation (oxide layer growth)• Doping (n and p type junctions)• Etching (dry and wet etch)• Extreme particle / contamination control

References• http://www.slideshare.net/mashiur/ete444lec

5microfabricationpdf-1800043• ETE444/544 Introduction to

Micro Fabrication• Springer Handbook of Nanotechnology• Chapter 5• III lithography

Vocabulary Review

• Moore’s Law• Top down• Bottom up• Self assembly• Lithography• Masking• Etching

• Oxidation• Doping• CVD (Chemical Vapor

Deposition) MO-CVD, PE-CVD

• Epitaxial Growth• MBE (Molecular

Beam Epitaxy)