Digital Systems Section 11 Decoders and Encoders.

President University Erwin Sitompul Digital Systems 8/1

Lecture 8Digital Systems

Dr.-Ing. Erwin SitompulPresident University

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Lecture Digital Systems

Section 11Decoders and Encoders

Digital Systems



Binary Decoders A binary decoder can be

considered as a black box with n input lines and 2n output lines.

Only one output line is set to 1 for a given input.

I n 1 –

n inputs

EEnable

2 n

outputs

O 0

O 2 n 1 –

I0




Binary DecodersLecture Digital Systems

Binary decoders convert an n-bit input to a single output. It uses its n-bit input to determine which of the 2n outputs will be uniquely activated.

Binary decoders can be developed using AND or OR Gates. Later on, binary decoders can be implemented in logic circuits.

The outputs of a decoder are minterms. That is why decoders are sometimes called as minterm generators.

We can easily use a decoder to implement any sum of minterms expression.

Note: A minterm is a Boolean expression resulting in 1 only for the output of a single row (in a truth table) or a single cell (in a Karnaugh map), and 0s for all other row or cells, respectively.



2-to-4 Binary DecoderLecture Digital Systems

A circuit of 2-to-4 binary decoder is shown below.

BinaryDecoder

2 inputs 4 outputs

Enable

The truth table shows that for any given input combination, exactly one output will turn to 1.

The enable must be set to 1 to get an output.



3-to-8 Binary DecoderLecture Digital Systems

X Y Z F0 F1 F2 F3 F4 F5 F6 F7 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 0 0 0 1 0 0 1 1 0 0 0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0 0 1

Try to understand the logic circuit of 3-to-8 binary decoder below.

BinaryDecoder

3 inputs 8 outputs Enable



3-to-8 Decoder Using Two 2-to-4 DecodersLecture Digital Systems

● Using Enable signal, which is separated by a combinational circuit

X

E

E

Enable

YZ

F0F1F2F3

F4F5F6F7

I0 I1

I0 I1

O0 O1 O2 O3

O0 O1 O2 O3



Implementing Functions Using DecodersLecture Digital Systems

Any n-variable logic function can be implemented using a single n-to-2n decoder, to generate the minterms (as given by the truth table or the Karnaugh map).

All the minterms are then summed up by an OR Gate.

Any combinational circuit with n inputs and m outputs can be implemented with an n-to-2n decoder and m OR Gates.

A decoder is suitable to use when a circuit has many outputs, where each output function is expressed with its minterms.




Full Adder

X Y Z C S 0 0 0 0 0 0 0 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 0 1 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1

● Each OR Gate collects all minterms of respective output

● One OR Gate for every output




Making a 4-to-16 Decoder from two 3-to-8 Decoders In this example, only one decoder can be active at a time. X, Y, and Z effectively select the output line for a certain value of

W.

● MSB W is used as Enable signal




Making a Multiplexer from a 2-to-4 Decoder

Output

Enable = 1 E

I0 I1

O0 O1 O2 O3

XY

F0

F1

F2

F3



Binary Encoders Binary encoders convert its

2n inputs to an n-bit output. Only one high value is

presented as input. The result is a binary-encoded output of size n.

Binary encoders are useful for compressing data.

2 n

inputs

I 0

I 2 n 1 –

O 0

O n 1 –

n

outputs




4-to-2 Binary EncoderLecture Digital Systems

In encoder circuit only one input may be set high (1) at a certain time.

The output is a 2-bit number.

0 0 1 1

1 0 1

0 0 0 1

0010

0 100

0 0 0 0

1I3 I2 I1 I0 Y1 Y0 I0

I1

I2

I3

Y1

Y0



8-to-3 Binary EncoderLecture Digital Systems

In this encoder circuit, at any certain time, only one input line has the value of 1.

The output is binary digits of Y2 Y1 Y0. This circuit is also called octal-to-

binary encoder.

I7 I 6 I 5 I 4 I 3 I 2 I 1 I 0 Y2 Y1 Y0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 1 0 0 0 0 1 1 0 0 0 1 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 1 1 1



0 0 1 1

1 0 1

0 0 0 1

001X

0 1XX

0 X X X

1I3 I2 I1 I0 Y1 Y0

4-to-2 Priority Encoder For some application, there can be more than one input line that

have a value of 1. One way to handle these inputs is to ignore the lower inputs and

only process the highest input (‘priority input’).

Y1 = I3’·I2 + I3Y0 = I3’·I2’·I1 + I3

● Draw the Karnaugh maps for both outputs Y1 and Y0.

?I0

I1 I2 I3

Y1

Y0

This encoder has 4 input lines:I3, I2, I1, and I0.

I3 has the highest priority, I0 has the lowest priority.



8-to-3 Priority EncoderLecture Digital Systems

The following is the truth table of an 8-to-3 priority encoder. X indicates don’t cares.

I7 I 6 I 5 I 4 I 3 I 2 I 1 I 0 Y2 Y1 Y0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 X 0 0 1 0 0 0 0 0 1 X X 0 1 0 0 0 0 0 1 X X X 0 1 1 0 0 0 1 X X X X 1 0 0 0 0 1 X X X X X 1 0 1 0 1 X X X X X X 1 1 0 1 X X X X X X X 1 1 1




As one alternative solution, we can use a priority encoder that implements the following logic functions:

H0 = I7’·I6’·I5’·I4’·I3’·I2’·I1’·I0H1 = I7’·I6’·I5’·I4’·I3’·I2’·I1H2 = I7’.I6’·I4’·I4’·I3’·I2H3 = I7’.I6’·I5’·I4’·I3H4 = I7’·I6’·I5’·I4H5 = I7’·I6’·I5H6 = I7’·I6H7 = I7 (Highest Priority)




The overall circuit of the priority encoder will be as shown below. The equations that express the binary encoder are:

Y0 = I1 + I3 + I5 + I7 Y1 = I2 + I3 + I6 + I7 Y2 = I4 + I5 + I6 + I7


Lecture Digital SystemsLecture Digital Systems

Design Exercise: 8-to-3 Priority EncoderDesign an 8-to-3 priority encoder that will deliver only the lowest input and process it to becomes the output.



Priority Encoder Navigation One possible application of encoder is in positional control as used

on ships or robotics. The angular position of a compass or the rotary position of a joint

is converted into a digital code by a 8-to-3 priority encoder. An example of a simple 8-position to 3-bit output encoder is shown

below.



Homework 81.Sketch the output waveforms of a 8-to-3 priority encoder based on

the given waveforms below (left).


Deadline: 25 November 2015.

Input (Student ID)

Output (Birth date)

1 162 233 054 145 176 037 098 27

2.Using binary decoders and/or encoders introduced in this lecture, create a circuit that will be able to memorize the birth dates of 8 students, as shown in the table below (right).

I6

I7

1 0

1 0

I0 = I1 = I2 = I3 = I4 = I5 = 1

Digital Systems Section 11 Decoders and Encoders.

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