Encoders Module M9.3 Section 6.3. Encoders Priority Encoders TTL Encoders.

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Encoders Module M9.3 Section 6.3

Transcript of Encoders Module M9.3 Section 6.3. Encoders Priority Encoders TTL Encoders.

Encoders

Module M9.3

Section 6.3

Encoders

• Encoders

• Priority Encoders

• TTL Encoders

Encoders

A

B

I0

I1

I2

I3

4-to-2 Encoder 1 0 0 0 0 0

0 1 0 0 0 10 0 1 0 1 00 0 0 1 1 1

I0 I1 I2 I3 B A

Encoders

1 0 0 0 0 00 1 0 0 0 10 0 1 0 1 00 0 0 1 1 1

I0 I1 I2 I3 B AAssume only 1 inputcan be high at any time.

A = I1 # I3B = I2 # I3

I1

I2I3

I0

B = I2 # I3

A = I1 # I3

8-to-3 Encoder

1 0 0 0 0 0 0 0 0 0 00 1 0 0 0 0 0 0 0 0 10 0 1 0 0 0 0 0 0 1 00 0 0 1 0 0 0 0 0 1 10 0 0 0 1 0 0 0 1 0 00 0 0 0 0 1 0 0 1 0 10 0 0 0 0 0 1 0 1 1 00 0 0 0 0 0 0 1 1 1 1

I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0

Y2 = I7 # I6 # I5 # I4Y1 = I7 # I6 # I3 # I2Y0 = I7 # I5 # I3 # I1

encoder.abl

MODULE encoder83

TITLE 'Encoder, D. Hanna, 7/15/02'

DECLARATIONS

" INPUT PINS "

I7..I0 PIN 6, 7, 11, 5, 72, 71, 66, 70; " Switch 1..8

" OUTPUT PINS "

Y2..Y0 PIN 37, 36, 35 ISTYPE 'com'; " LED 6..8

EQUATIONS

Y2 = I7 # I6 # I5 # I4;

Y1 = I7 # I6 # I3 # I2;

Y0 = I7 # I5 # I3 # I1;

END encoder83

1 0 0 0 0 0 0 0 0 0 00 1 0 0 0 0 0 0 0 0 10 0 1 0 0 0 0 0 0 1 00 0 0 1 0 0 0 0 0 1 10 0 0 0 1 0 0 0 1 0 00 0 0 0 0 1 0 0 1 0 10 0 0 0 0 0 1 0 1 1 00 0 0 0 0 0 0 1 1 1 1

I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y01 0 0 0 0 0 0 0 0 0 00 1 0 0 0 0 0 0 0 0 10 0 1 0 0 0 0 0 0 1 00 0 0 1 0 0 0 0 0 1 10 0 0 0 1 0 0 0 1 0 00 0 0 0 0 1 0 0 1 0 10 0 0 0 0 0 1 0 1 1 00 0 0 0 0 0 0 1 1 1 1

I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0

Y2 = I7 # I6 # I5 # I4Y1 = I7 # I6 # I3 # I2Y0 = I7 # I5 # I3 # I1

Priority Encoder

1 0 0 0 0 0 0 0 0 0 0X 1 0 0 0 0 0 0 0 0 1X X 1 0 0 0 0 0 0 1 0X X X 1 0 0 0 0 0 1 1X X X X 1 0 0 0 1 0 0X X X X X 1 0 0 1 0 1X X X X X X 1 0 1 1 0X X X X X X X 1 1 1 1

I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0

Priority Encoder

1 0 0 0 0 0 0 0 0 0 0X 1 0 0 0 0 0 0 0 0 1X X 1 0 0 0 0 0 0 1 0X X X 1 0 0 0 0 0 1 1X X X X 1 0 0 0 1 0 0X X X X X 1 0 0 1 0 1X X X X X X 1 0 1 1 0X X X X X X X 1 1 1 1

I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0

Y2 = L7 # L6 # L5 # L4

L7 = I7L6 = !I7 & I6L5 = !I7 & !I6 & I5L4 = !I7 & !I6 & !I5 & I4

Priority Encoder

1 0 0 0 0 0 0 0 0 0 0X 1 0 0 0 0 0 0 0 0 1X X 1 0 0 0 0 0 0 1 0X X X 1 0 0 0 0 0 1 1X X X X 1 0 0 0 1 0 0X X X X X 1 0 0 1 0 1X X X X X X 1 0 1 1 0X X X X X X X 1 1 1 1

I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0

Y1 = L7 # L6 # L3 # L2

L7 = I7L6 = !I7 & I6L3 = !I7 & !I6 & !I5 & !I4 & I3L2 = !I7 & !I6 & !I5 & !I4 & !I3 & I2

Priority Encoder

1 0 0 0 0 0 0 0 0 0 0X 1 0 0 0 0 0 0 0 0 1X X 1 0 0 0 0 0 0 1 0X X X 1 0 0 0 0 0 1 1X X X X 1 0 0 0 1 0 0X X X X X 1 0 0 1 0 1X X X X X X 1 0 1 1 0X X X X X X X 1 1 1 1

I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0

Y0 = L7 # L5 # L3 # L1

L7 = I7L5 = !I7 & !I6 & I5L3 = !I7 & !I6 & !I5 & !I4 & I3L1 = !I7 & !I6 & !I5 & !I4 & !I3 & !I2 & I1

pencoder.ablMODULE pencoder83

TITLE 'Priority Encoder, A. Student, 7/15/02'

DECLARATIONS

" INPUT PINS "

I7..I0 PIN 6, 7, 11, 5, 72, 71, 66, 70; " Switch 1..8

" OUTPUT PINS "

Y2..Y0 PIN 37, 36, 35 ISTYPE 'com'; " LED 6..8

VALID PIN 44; " LED 1

" VALID = 1 for valid binary output

" INTERMEDIATE NODES "

L7..L0 NODE ISTYPE 'com'; " internal vector

pencoder.abl (cont’d)

EQUATIONS

L7 = I7;

L6 = !I7 & I6;

L5 = !I7 & !I6 & I5;

L4 = !I7 & !I6 & !I5 & I4;

L3 = !I7 & !I6 & !I5 & !I4 & I3;

L2 = !I7 & !I6 & !I5 & !I4 & !I3 & I2;

L1 = !I7 & !I6 & !I5 & !I4 & !I3 & !I2 & I1;

Y2 = L7 # L6 # L5 # L4;

Y1 = L7 # L6 # L3 # L2;

Y0 = L7 # L5 # L3 # L1;

END pencoder83

1 0 0 0 0 0 0 0 0 0 0X 1 0 0 0 0 0 0 0 0 1X X 1 0 0 0 0 0 0 1 0X X X 1 0 0 0 0 0 1 1X X X X 1 0 0 0 1 0 0X X X X X 1 0 0 1 0 1X X X X X X 1 0 1 1 0X X X X X X X 1 1 1 1

I0 I1 I2 I3 I4 I5 I6 I7 Y2 Y1 Y0

TTL Encoder

1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16

GND

Vcc

1

2

3

4 5

6

7

A2

A1

E1

E0

GS

0 A0

74LS148

1 X X X X X X X X 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 00 X X X X X X X 0 0 0 0 0 10 X X X X X X 0 1 0 0 1 0 10 X X X X X 0 1 1 0 1 0 0 10 X X X X 0 1 1 1 0 1 1 0 10 X X X 0 1 1 1 1 1 0 0 0 10 X X 0 1 1 1 1 1 1 0 1 0 1 0 X 0 1 1 1 1 1 1 1 1 0 0 10 0 1 1 1 1 1 1 1 1 1 1 0 1

EI 0 1 2 3 4 5 6 7 A2 A1 A0 GS EO

Priority Encoder

68000 Interrupt Logic

Peripheral

74148Encoder

74138Decoder

IP0IP1IP2

A0A1A2

IRQA

68000

Data Bus

IRQ