di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R...
Transcript of di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R...
![Page 1: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/1.jpg)
Transient Analysis: Series RLC Circuit
+
-
SW
V
R L
C
∫++= dtiCdt
diLRiV 1
i
Current in an RLC circuit like shownIs governed by the equation
We will analyse the situations with and without The source (V). The stored energy in C or L will force the current
V
t
VC
Once the switch (SW) is closed, after some oscillatory period, currentAnd voltage will settle. In steady state, Capacitor voltage (VC) will approach V
Sajjad Haidar
![Page 2: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/2.jpg)
LT SPICE Simulation: Adding components
After adding the component and components values , add the SPICE DIRECTIVE
At time, t=0, I =0At time t =0, VC=0
Considering there is no stored energy in the inductor (L) or Capacitor, C
Sajjad Haidar
![Page 3: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/3.jpg)
Run: Simulation
1. Simulation> Edit Simulation2. RUN
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![Page 4: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/4.jpg)
Run: Simulation
VC=V(n003)
i
Running the simulation and placing the voltage probe at Node, n003 and clicking we find capacitor voltage and clicking the current probe either on R or L, we find current i
Current iCapacitor voltage, VC
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![Page 5: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/5.jpg)
SW R L
i C
Stored Energy in Capacitor (C): No Power Source
01 =++ ∫ dtiCdtdiLRi
02
2
=++Ci
tdidR
tdidL
t
oi
When the capacitor is charged and connected as shown, energy will be exchanged back and forth in-between the inductor and capacitor. However the resistor will start dissipating the energy. The resulting current is governed by the equation
Sajjad Haidar
![Page 6: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/6.jpg)
Simulation: Stored Capacitor in the Capacitor (C): No Power Source
Put initial conditions using spice directive. .IC V(N002)=10 means initial capacitor voltage is 10 V
Sajjad Haidar
![Page 7: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/7.jpg)
Run Simulation
Current Capacitor voltage
RUN
Running the simulation and placing the currentProbe on either the resistor or the inductor, we find the oscillatory current as shown
Placing the voltage probe at node:N002 and Clicking we find the capacitor voltage waveform
Sajjad Haidar
![Page 8: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/8.jpg)
Power dissipated in resistor R
LTSpice to find Power and energy
Press down ALT and put the cursor on R1 (You willSee a thermometer icon) and click
You will get the power data as shown
Press down CTRL and place the cursor on V(N001)*R1 as shown and click
You will get the window like this
Sajjad Haidar
![Page 9: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/9.jpg)
+
-
R
C
L
RL
V
Stored Energy in Inductor (L): No Power Source
1 2
iiL
When the switch in position 1, maximum current V/RL reaches in steady state. Now the switch is placed in position 2, the stored energy in the inductor will cause the current to oscillate in the LRC circuit.
In practice: Whenever the switch is about to release from position 1, there will be abrupt change in current, causes a high voltage to develop governed by the equation: VL=Ldi/dt. The stored energy in the inductor (1/2LI2) will be lost at the switch junction (1) (high voltage> Ionization>arching (heat)). However by electronic devices it is possible to release inductor-energy into an LRC circuit. I hope to discuss it later 02
2
=++Ci
tdidR
tdidL
However Let us consider an idealised situation that when the switch is in position 2 the energy (1/2LI2) is released in the LRC circuit
Nature of current can be expressed by the equation
Sajjad Haidar
![Page 10: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/10.jpg)
LT SPICE Simulation: Adding components
Rotate resistor R1 twice, which willgive you the current in positive direction Now initial inductor current is 1
Amp. and the capacitor voltage is 0 V
Set the spice directive
Sajjad Haidar
![Page 11: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/11.jpg)
RUN: Simulation
Current Capacitor voltage
Run the simulation
We get current and capacitor voltage as shown:
Sajjad Haidar
![Page 12: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/12.jpg)
LTSpice to find Power and energy
Press down ALT and put the cursor on R1 (You willSee a thermometer icon) and click
You will get the power data as shown
Press down CTRL and place the cursor on V(N001)*R1 as shown and click
You will get the window like this
Sajjad Haidar
![Page 13: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/13.jpg)
Under, over and Critically damped oscillation in LRC circuit
02
2
=++Ci
tdidR
tdidL
SW R L
i C
Let us consider: steAi =
1
2
Putting equation 2 in 1:
02 =++CieASReASL StSt
012 =
++
CRSLSAest
This is the characteristic equationWhich determines the circuit behaviour
Roots of this equation:
LCLR
LRS 1
22
2
1 −
+−=
LCLR
LRS 1
22
2
1 −
−−=
LCLR 1
2
2
>
LCLR 1
2
2
<
LCLR 1
2
2
=
Overdamped
Underdamped
Critically damped
Sajjad Haidar
![Page 14: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/14.jpg)
02
2
=++Ci
tdidR
tdidL
The solutions of the differential equation for these three conditions:
Overdamped LCLR 1
2
2
>
Let us consider, LR
2=α And LC
10 =ω
20
2 ωα >
tsts BeAeti 21)( += Where, 20
221, ωαα −±−=SS
Underdamped 20
2 ωα <
( )tBtAeti t ωωα sincos)( += − Where 22 αωω −= o
Critically damped 20
2 ωα =
( ) tetBAti α−+=)(
t
i
t
i
t
i
Under, over and Critically damped oscillation in LRC circuit
Sajjad Haidar
![Page 15: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/15.jpg)
SW R L
i C
1 µF
1 mH10 Ω
=
2
2LR
=LC1
25x106
1x109
As, LCLR 1
2
2
<
It is a case of underdamped oscillation as we found before
( )tBtAeti t ωωα sincos)( += −
Simulation - Undedamped: LTSpice
te α−
22 αωω −= o
T=31224.99 Rad/sec
Time period, T =ωπ2
= 201.2 µs
Sajjad Haidar
![Page 16: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/16.jpg)
Simulation - Overdamped: LTSpice
Let us consider, R=200 Ω
=
2
2LR
=LC1
1x109
1 x 1010
∴ LCLR 1
2
2
>
Running LTSpice simulation the same way as Beforewe find the overdamped behaviour as shown
tsts BeAeti 21)( +=
Sajjad Haidar
![Page 17: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/17.jpg)
Simulation - Critically Damped: LTSpice
02
2
=++Ci
tdidR
tdidL
( ) tetBAti α−+=)(
20
2 ωα =LCL
R 12
2
=
Or
In our case with, L =1mH, C=1µF:
Ω= 245.63R
To find the time at which the current reaches the peak, we should differentiate i(t) and equate to 0:
( ) 0=ditdi
RLtc
21 ==α Putting Ω= 245.63R
stc µ62.31=
Sajjad Haidar
![Page 18: di 1 V iR L idt dt C - Learn LTSpice: A Tutorial · Transient Analysis: Series RLC Circuit +-SW V R L C = + + ∫idt dt C di V iR L 1 i Current in an RLC circuit like shown Is governed](https://reader033.fdocuments.in/reader033/viewer/2022041900/5e5ffaf6ab2bf34bc7175fb0/html5/thumbnails/18.jpg)
Simulation - Critically Damped: LTSpice
tc
Running the simulation gives us the current response, i(t)as shown
The importance of critically damped circuit is, currently quickly reaches 0 without oscillating
stc µ62.31=
Sajjad Haidar