Chapter 2Chapter 2

Introduction to Introduction to Computer Architecture Computer Architecture

and Assembly and Assembly LanguageLanguage

Computer Computer ArchitectureArchitecture

• Interface between hardware and Interface between hardware and the lowest level of softwarethe lowest level of software• Assembly language programmer’s Assembly language programmer’s view of the processorview of the processor• 3 major components of a 3 major components of a computercomputer

1. CPU (Central Process Unit)1. CPU (Central Process Unit)

2. Memory2. Memory

3. I/O Devices3. I/O Devices• The components are The components are interconnected by System Bus.interconnected by System Bus.

Assembly Assembly LanguageLanguage

• A low-level, human-readable A low-level, human-readable representation of the binary code representation of the binary code executed by a computer.executed by a computer.• A language that controls the A language that controls the primitive operations on binary data.primitive operations on binary data.• Basic operations include data Basic operations include data movement, addition, subtraction, movement, addition, subtraction, comparison, shifting and branching. comparison, shifting and branching.

Computer ArchitectureComputer Architecture- Languages- Languages

ApplicationsApplications

High Level LanguageHigh Level Language

Low Level languageLow Level language

HardwareHardware

Assembly Language

C, JAVA

Word, Excel

HHL ComplierAssembly Language AssemblerMachine Language

Von Neumann MachineVon Neumann Machine(Stored Program (Stored Program Computer)Computer)• The common memory system stores The common memory system stores

both the instructions and the data.both the instructions and the data.

Address Address

Data DataData path(Data bus)

Address path(Address bus)

CentralProcessorUnit (CPU)

Memory

Instruction

Data

MemoryMemory• Array of cells storing data Array of cells storing data

(data/instructions), each (data/instructions), each cell has an unique cell has an unique addressaddress

• Address port, data port, Address port, data port, control signals.control signals.

• Read cycle: data at the Read cycle: data at the specified memory address specified memory address is placed on the data bus.is placed on the data bus.

• Write cycle: data on the Write cycle: data on the data bus is written into data bus is written into the specified memory the specified memory location.location.

Address

Data

4427279966

14143232

Address transferred from CPUAddress transferred from CPU

Read

Write

000000000001000100020002

Data transferred between Data transferred between

CPU and memoryCPU and memory

Central Processor Unit Central Processor Unit (CPU)(CPU)• Responsible for reading instructions Responsible for reading instructions

from the memory and executing them.from the memory and executing them.

• Address path: used by CPU to provide Address path: used by CPU to provide memory address of instruction or data memory address of instruction or data to the memory.to the memory.

• Data path: used by CPU/memory to Data path: used by CPU/memory to transfer data.transfer data.

Basic von Neumann Instruction Basic von Neumann Instruction FormatFormat

• An instruction consists of operation code An instruction consists of operation code and the operand addressand the operand address– Could have more than one addresses, later … Could have more than one addresses, later …

• Operation code (op-code): defines what Operation code (op-code): defines what the instruction does.the instruction does.

• Operand address (address): where the Operand address (address): where the operand is located – referred to as the operand is located – referred to as the address fieldaddress field

Operation CodeOperation Code Operand addressOperand address

Von Neumann machineVon Neumann machinein Pseudo codein Pseudo code

Module Von_NeumannModule Von_NeumannI := 0I := 0RepeatRepeat

FetchFetch an instruction from memory location I an instruction from memory location II := I + 1I := I + 1ExecuteExecute the instruction the instruction

ForeverForeverEND Von_NeumannEND Von_Neumann

• Von Neumann machine operates in Von Neumann machine operates in a two-phase mode, a two-phase mode, fetch/executefetch/execute cycles.cycles.

Module Execute the instructionModule Execute the instructionDecode the instructionDecode the instructionIF instruction requires data, THENIF instruction requires data, THEN

Fetch the data from the memoryFetch the data from the memoryEND_IFEND_IFPerform operation defined by instructionPerform operation defined by instructionIF instruction requires data to be saved, IF instruction requires data to be saved, THENTHEN

Save the data in memorySave the data in memoryEND_IFEND_IF

End Execute the instructionEnd Execute the instruction

Pseudo code for Pseudo code for executionexecution

Information Flow Information Flow between CPU and between CPU and MemoryMemory

CPU

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InstructionInstruction

Memory

• Arithmetic and logic unit (ALU): Arithmetic and logic unit (ALU): calculationcalculation

• Control unit (CU): interprets the Control unit (CU): interprets the instructioninstruction

CPU ComponentsCPU Components

Address Address

Data DataData bus

Address bus

CPU Memory

InstructionInstruction

:Data

:

Control bus

ALUCU

Registers

• Registers: temporary storageRegisters: temporary storage

– Program counter (PC): holds the address Program counter (PC): holds the address of the next instruction to be executed.of the next instruction to be executed.

– Instruction register (IR): holds instructionInstruction register (IR): holds instruction

– Data registers: hold dataData registers: hold data

– Address registers: hold addressesAddress registers: hold addresses

– Condition code register (CCR): Condition code register (CCR): flag bitsflag bits

• Updated to reflect operation resultUpdated to reflect operation result

• Used to change flow of programUsed to change flow of program

– MAR, MBR, PSW, etc. (later)MAR, MBR, PSW, etc. (later)

CPU ComponentsCPU Components

• A simple language to describe the A simple language to describe the operations carried out by CPU.operations carried out by CPU.– We will use it to describe the function of We will use it to describe the function of

instructioninstruction

• [4] or [M(4)] means the [4] or [M(4)] means the content of content of memory location 4memory location 4..

• [M(6)] = 4 means [M(6)] = 4 means the content of memory the content of memory location 6 is the value 4location 6 is the value 4..

• [M(6)] <- 4 means [M(6)] <- 4 means assigning the number 4 assigning the number 4 to the memory location 6to the memory location 6..

Register Transfer Language Register Transfer Language (RTL)(RTL)

Assembly Assembly LanguageLanguage

• A form of the native language of a A form of the native language of a computer in whichcomputer in which

- machine code instructions are - machine code instructions are represented by represented by mnemonicsmnemonics

e.g., MOVE, ADD, SUBe.g., MOVE, ADD, SUB

- addresses and constants are usually - addresses and constants are usually written in symbolic formwritten in symbolic form

e.g., NEXT, BACK_SPe.g., NEXT, BACK_SP

MC68000 MC68000 AssemblerAssembler

• Valid symbolic name contains up to 8 Valid symbolic name contains up to 8 letters or number.letters or number.

• Name starts with letter.Name starts with letter.

• TempVa123, TempVa127 are TempVa123, TempVa127 are recognized as TempVa12 by recognized as TempVa12 by assemblerassembler

Files Created by Files Created by AssemblerAssembler

• Binary file or object file is recognized Binary file or object file is recognized by machine.by machine.

• Listing file contains the information of Listing file contains the information of program assembling.program assembling.

• If a program written in more than one If a program written in more than one files, LINKER is needed to link the files, LINKER is needed to link the object files together before execution.object files together before execution.

Source File

Editor AssemblerListing File

Binary File

Assembly Language Assembly Language ProgramProgram

• Two types of statementsTwo types of statements

1. Executable instructions1. Executable instructions

2. Assembler directives2. Assembler directives

• Executable instructionExecutable instruction

- translated into machine code by - translated into machine code by assemblerassembler

- tells the machine what to do at execution- tells the machine what to do at execution

Assembly Language Assembly Language ProgramProgram

• Assembler directivesAssembler directives

- tell assembler what to do when - tell assembler what to do when program assembledprogram assembled

- are not translated into machine - are not translated into machine code, they are non-executable. code, they are non-executable.

E.g., EQU, DC, DS, ORG, ENDE.g., EQU, DC, DS, ORG, END

Assembly Language Assembly Language ProgramProgram

• Program written in 4 columns: Program written in 4 columns:

[label] instruction [operand] [comment][label] instruction [operand] [comment]

- Label: begins in column 1- Label: begins in column 1

programmer-definedprogrammer-defined

reference to a linereference to a line

• $50 is 50$50 is 501616, %10 is 00000010, 50 is 50, %10 is 00000010, 50 is 501010..

• Longword 32-bit, Word 16-bit, Byte 8-bit.Longword 32-bit, Word 16-bit, Byte 8-bit.

• A line begins with an ‘*’ in its first A line begins with an ‘*’ in its first column is a comment -> ignored by the column is a comment -> ignored by the assemblerassembler

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How Assembler WorksHow Assembler Works• Two-pass assemblerTwo-pass assembler

- Source program scanned twice before Source program scanned twice before producing the object codeproducing the object code

• LC: Assembler’s simulation of PCLC: Assembler’s simulation of PC

–When an assembly program is When an assembly program is assembled, LC is used to keep track of assembled, LC is used to keep track of the “memory location” at which an the “memory location” at which an instruction would be should that instruction would be should that instruction be executed.instruction be executed.

–So that machine code can be So that machine code can be generated correctly from assembly generated correctly from assembly code.code.

How Assembler WorksHow Assembler Works• Pass I:Pass I:

- Search source program for symbol Search source program for symbol definitions and enter these into definitions and enter these into symbol tablesymbol table

• Pass II:Pass II:

- Use symbol table constructed in Use symbol table constructed in Pass I and op-code table to generate Pass I and op-code table to generate machine code equivalent to source machine code equivalent to source

Pass I (Simplified)Pass I (Simplified)START

[LC] <- 0

Fetch Next Instruction

END? PASS II

Label? Add Label to Symbol Table

w/ [LC] as its value

Increment [LC]Accordingly

Y

N

YN

Pass II (Simplified)Pass II (Simplified)START

[LC] <- 0

Fetch Next Instruction

END? STOP

Increment [LC]Accordingly

Y

N

Op-code Lookup

Symbol Table Lookup

Generate

Machine Code

ExampleExample 1 OPT CRE 2 00000019 A: EQU 25 3 00001000 ORG $1000 4 00001000 00000004 M: DS.W 2 5 00001004 00001008 N: DC.L EXIT 6 00001008 2411 EXIT: MOVE.L (A1),D2 7 0000100A 139A2000 MOVE.B (A2)+,(A1,D2) 8 0000100E 06450019 ADDI.W #A,D5 9 00001012 67000008 BEQ DONE 10 00001016 90B81004 SUB.L N,D0 11 0000101A 60EC BRA EXIT 12 0000101C 4E722700 DONE: STOP #$2700 13 00001000 END $1000

Lines: 13, Errors: 0, Warnings: 0.

SYMBOL TABLE INFORMATION

Symbol-name Type Value Decl Cross reference line numbersA EQU 00000019 2 8.DONE LABEL 0000101C 12 9.EXIT LABEL 00001008 6 5, 11.M LABEL 00001000 4 * * NOT USED * *N LABEL 00001004 5 10.

LC Machine Code

What we care in the symbol table

Assembly Code

EQU (EQUate)EQU (EQUate)

• • Link a name to a valueLink a name to a value

• The code doesn’t need modified, even The code doesn’t need modified, even if the length and the width changed,if the length and the width changed,

• It tells reader how the Area is It tells reader how the Area is computed.computed.

LengthLength EQUEQU 3030

WidthWidth EQUEQU 2525

AreaArea EQUEQU Length*WidthLength*Width

ORG (ORiGin)ORG (ORiGin)

• Sets up value of location counter Sets up value of location counter (LC)(LC)

• LC: Assembler’s simulation of PCLC: Assembler’s simulation of PC

DC (Define a Constant)DC (Define a Constant)

• • Define and initialize a variableDefine and initialize a variable• • Qualified by .B, .W, or .L Qualified by .B, .W, or .L (byte, word, or (byte, word, or longword)longword)

• Loads constant into the memory in Loads constant into the memory in hexadecimalhexadecimal

• A 16-bit word should not be stored A 16-bit word should not be stored across the even boundary, e.g. at 1001across the even boundary, e.g. at 1001

ORG $00001000

FIRST DC.B 10,66

DC.L $0A1234

...

00AA 4242

1212 34340000 00AA

001001001001001003001003001005001005

001000001000001002001002001004001004

Memory MapMemory Map

:: ::

::

DemonstrationDemonstration* * The memory is addressable by byte, The memory is addressable by byte, butbut* the data is fetched in word, 16 bits.* the data is fetched in word, 16 bits.

ORGORG $1000$1000FIRSTFIRST DC.BDC.B 10,6610,66SECONDSECOND DC.BDC.B 2020DATADATA DC.LDC.L $ABCD$ABCD

STOPSTOP #$2700#$2700ENDEND $1000$1000

>>md 1000md 1000001000 0A 42 14 00 00 00 AB CD 4E 72 27 00 00 00 00 001000 0A 42 14 00 00 00 AB CD 4E 72 27 00 00 00 00 00.00.

DS (Define Storage)DS (Define Storage)

• Reserves (allocates) storage location • Reserves (allocates) storage location in memoryin memory

• Similar to DC, but no values stored• Similar to DC, but no values stored

• DC: set up values in memory • DC: set up values in memory locationslocations• DS: reserve memory space for • DS: reserve memory space for variablesvariables

• Example on page 68• Example on page 68

ORG $001000

TABLE DS.W 256

POINTER_1 DS.L 1

VECTOR_1 DS.L 1

INIT DC.W 0,$FFFF

…

ORG $018000

ENTRY LEA ACIAC,A0

MOVE.B #SETUP1,(A0)

POINTER_1

01000

011FF012000120101202012030120401205012060120701208012090120A0120B0120C

1800018001

TABLE

VECTOR_1

INIT

ENTRY

0000FFFF

41F9

ExampleExample

END END

• End of program• End of program

More on Instruction More on Instruction FormatFormat• An instruction is an op-code followed An instruction is an op-code followed by address(es)by address(es)

– Address means Address means anyany address in system address in system

• General Instruction FormatsGeneral Instruction Formats– Four-address formatFour-address format

[Op-code | Src1 | Src2 | Dst | NextInstr][Op-code | Src1 | Src2 | Dst | NextInstr]

xx = = yy + + zz

Src1: Src1: yy, Src2: , Src2: zz, Dst: , Dst: xx

More on Instruction More on Instruction FormatFormat• General Instruction Formats (Cont’d)General Instruction Formats (Cont’d)

– Three-address formatThree-address format

[Op-code | Src1 | Src2 | Dst][Op-code | Src1 | Src2 | Dst]

Use Use programprogram countercounter for next for next instructioninstruction

– Two-address formatTwo-address format

[Op-code | Src1 | Src2 (and Dst)][Op-code | Src1 | Src2 (and Dst)]

xx = = yy + + xx

Src1: Src1: yy, Src2 and Dst: , Src2 and Dst: xx

68000 uses two-address format68000 uses two-address format

More on Instruction More on Instruction FormatFormat• General Instruction Formats (Cont’d)General Instruction Formats (Cont’d)

– One-address formatOne-address format

[Op-code | Src1][Op-code | Src1]

AccumulatorAccumulator (AC) is Src2 and DST (AC) is Src2 and DST

[AC] = [AC] + [AC] = [AC] + yy– Zero-address formatZero-address format

[Op-code][Op-code]

Use Use stackstack

Post-orderPost-order expression expression

ExampleExample• I = J + KI = J + K

– Four-address formatFour-address formatADD J, K, I, NEXT ; I = J + KADD J, K, I, NEXT ; I = J + K

; next instruction in location ; next instruction in location NEXTNEXT

– Three-address formatThree-address formatADD J, K, I ; I = J + KADD J, K, I ; I = J + K

; next instruction in PC; next instruction in PC

– Two-address formatTwo-address formatMOVE J, I ; I = JMOVE J, I ; I = J

ADD K, I ; I = K + IADD K, I ; I = K + I

How about: ADD K, J MOVE J, I

ExampleExample• I = J + KI = J + K

– One-address formatOne-address formatLOAD J ; AC = JLOAD J ; AC = J

ADD K ; AC = J + KADD K ; AC = J + K

STORE I ; I = ACSTORE I ; I = AC

– Zero-address format, postfix: I = JK+Zero-address format, postfix: I = JK+LOAD J ; push J onto stackLOAD J ; push J onto stack

LOAD K ; push K onto stackLOAD K ; push K onto stack

ADD ; pop and add J and K, result on ADD ; pop and add J and K, result on toptop

STORE I ; pop stack top to I STORE I ; pop stack top to I

More ExamplesMore Examples• I = J + K + LI = J + K + L• I = J + K * LI = J + K * L• I = (J + K) * LI = (J + K) * L• I = (J + K) * L – MI = (J + K) * L – M• I = J + K * L – MI = J + K * L – M• I = J + K * (L – M)I = J + K * (L – M)• I = (J + K) * (L – M)I = (J + K) * (L – M)