Simulation and Fabrication of MEMS based Remote

Pressure Sensor

A Project Report

submitted by

HARSH NAIK

EE03B106

Under guidence of

Dr.Nandita DasGupta

in partial fulfilment of the requirements

for the award of the degree of

BACHELOR OF TECHNOLOGY

DEPARTMENT OF ELECTRICAL ENGINEERINGINDIAN INSTITUTE OF TECHNOLOGY, MADRAS.

MAY 2007

THESIS CERTIFICATE

This is to certify that the thesis titled Simulation and Fabrication of MEMS

based Remote Pressure Sensor, submitted by Harsh Naik, to the Indian Insti-

tute of Technology, Madras, for the award of the degree of Bachelor of Technol-

ogy, is a bona fide record of the research work done by him under our supervi-

sion. The contents of this thesis, in full or in parts, have not been submitted to

any other Institute or University for the award of any degree or diploma.

Prof.Nandita DasGupta

Research Guide

Professor

Dept. of Electrical Engineering

IIT-Madras, 600 036

Place: Chennai

Date: 10th May 2007

ACKNOWLEDGEMENTS

There are many people who contributed to this thesis that I would like to thank.I

would first like to convey my heartfelt gratitude and thanks to my research

guide, Dr.Nandita DasGupta for her invaluable encouragement, support and

assistance.Her patience and guidance have pulled me through the challenges

of working on this project.

I would also like to thank Hari Krishna for his constant help during the

course of the project.Thanks to all those at Microelectronics Lab including Mad-

havi,Sharmaji,Uday,Hareesh,Sheeja, Sachin and Somshekhar Bhatt who have

made working here,a truly enjoyable experience.I would also like to thank Amit

Mittal who helped during the initial stages of the project.

And last but not the least I would like to thank all my friends and seniors

at Tapti Hostel who have made my stay here at IIT Madras truely a memorable

one,an experience whose memories will be ’etched’ in my heart forever.

i

ABSTRACT

KEYWORDS: MEMS ; Pressure Sensors; Capacitive sensors; Piezoresistive

Sensors:Micromaching.

Since the discovery of piezoresistivity in silicon in the mid 1950s, silicon-

based pressure sensors have been widely produced. Micromachining technol-

ogy has greatly benefited from the success of the integrated circuit industry,

borrowing materials, processes, and toolsets. Because of this, microelectrome-

chanical systems (MEMS) are now poised to capture large segments of existing

sensor markets and to catalyse the development of new markets. Given the

emerging importance of MEMS, it is instructive to review the history of micro-

machined pressure sensors, and to examine new developments in the field.

Pressure sensors,especially capacitive,will be the focus of this thesis. Micro-

machined pressure sensor typically uses a Silicon membrane as the sensing ele-

ment and piezoresistors or capacitors for data retrieval.Remote sensing of data

indicating variation in pressure allows inplementation of battery free devoces

with indefinite lifetime and is thus very attractive for bio-medical applications.

In this research work capacitive pressure sensors have been simulated and

fabricated.Due to pressure variation membrane deflects and the value of capac-

itance changes which can be detected by an external circuit.First an optimum

structure was proposed based on results from simulation and a process flow

and masks were designed for fabrication of this structure.

ii

TABLE OF CONTENTS

ACKNOWLEDGEMENTS i

ABSTRACT ii

LIST OF FIGURES vi

1 Introduction 1

1.1 Background and purpose of the research . . . . . . . . . . . . . 1

1.2 Statement of the problem and objectives . . . . . . . . . . . . . 2

1.3 Organization of the thesis . . . . . . . . . . . . . . . . . . . . . 3

2 Processes for Micromachining 4

2.1 Epitaxy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Oxidation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.3 Lithography . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.4 Etching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.5 Bonding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

3 Capacitive Pressure Sensors 14

3.1 Capacitive Sensing Techniques . . . . . . . . . . . . . . . . . . 14

3.2 Micromachined Pressure Sensors . . . . . . . . . . . . . . . . . 15

3.2.1 Materials . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4 Previous Work 19

4.1 Piezo-resistive Pressure sensor . . . . . . . . . . . . . . . . . . 19

4.2 Capacitive Pressure sensor . . . . . . . . . . . . . . . . . . . . . 21

4.3 Observations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

5 Results and Discussion 25

iii

5.1 Simulation Results and Discussion . . . . . . . . . . . . . . . . 25

5.2 Mask and Process steps Design . . . . . . . . . . . . . . . . . . 28

5.3 Fabrication steps . . . . . . . . . . . . . . . . . . . . . . . . . . 32

5.3.1 Wafer Cleaning . . . . . . . . . . . . . . . . . . . . . . . 34

5.3.2 Oxidation . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.3.3 Photolithography . . . . . . . . . . . . . . . . . . . . . . 35

5.3.4 Etching . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

5.3.5 Bonding . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

5.4 C-V Measurements . . . . . . . . . . . . . . . . . . . . . . . . . 41

6 Summary and Further work 42

LIST OF FIGURES

1.1 Concept of a Resonant Absolute Pressure Sensor . . . . . . . . 2

2.1 Illustration of the basic process flow in micromachining: Layersare deposited; photo resist is lithographically patterned and thenused as a mask to etch the underlying materials. The process isrepeated until completion of the microstructure. . . . . . . . . 5

2.2 An illustration of proximity and projection lithography. . . . . 8

2.3 Double sided alignment scheme. . . . . . . . . . . . . . . . . . 9

2.4 Etching profiles for different types of etchants. . . . . . . . . . 10

2.5 Illustration of the anisotropic etching of cavities in 100-orientedsilicon: (a) cavities, self-limiting pyramidal and V-shaped pits,and thin membranes; and (b) etching from both sides o the wafercan yield a multitude of different shapes including hourglass-shaped and oblique holes. . . . . . . . . . . . . . . . . . . . . . 11

2.6 Illustration of a wafer bonding process. (a)The two wafers to bebonded.(b)Pressing Surfaces. (c)Binding Si-O bonds.(d)BindingSi-Si bonds. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

3.1 Examples of simple capacitance displacement sensors: (a) mov-ing plate, (b) variable area, and (c) moving dielectric. . . . . . 14

3.2 A schematic cross section of a typical pressure sensor diaphragm.Dotted lines represent the undeflected diaphragm. . . . . . . . 16

3.3 A cross section schematic diagram of a bulk-micromachined, ca-pacitive pressure sensor. . . . . . . . . . . . . . . . . . . . . . . 16

3.4 A cross section schematic diagram of a bulk-micromachined, contact-mode pressure sensor. . . . . . . . . . . . . . . . . . . . . . . . 17

3.5 A comparison of deflection shapes for uniform-thickness (left)and bossed (right) diaphragms. . . . . . . . . . . . . . . . . . . 17

4.1 Structure Simulated in CoventerWare . . . . . . . . . . . . . . 20

4.2 Circuit Equivalent of the Structure . . . . . . . . . . . . . . . . 21

4.3 Results of the simulation of the structure in Figure 4.1 . . . . . 22

4.4 Capacitors connected in Parallel . . . . . . . . . . . . . . . . . 22

v

5.1 A meshed model of the device before simulation . . . . . . . . 26

5.2 Results of simulation showing (a)Sensitivity v/s Pressure and(b)Delta C v/s Pressure for different structures. . . . . . . . . . 27

5.3 The structure simulated for further analysis. . . . . . . . . . . 29

5.4 The final meshed structure simulated with parallel capacitors. 30

5.5 The displacement profile from mechanical analysis. . . . . . . 30

5.6 Process flow designed for the fabrication of the pressure sensor. 31

5.7 Anisotropic etching of < 100 > silicon. . . . . . . . . . . . . . . 32

5.8 (a)The three layer mask.(b)Layer 1-Bottom wafer.(c)Layer 2-Topwafer.(d)Layer 3-Metallization mask. . . . . . . . . . . . . . . . 33

5.9 Mask used for fabrication purpose. . . . . . . . . . . . . . . . . 34

5.10 (a)A two dimensional etching profile of the top wafer(b)X-profileof the etched windows showing the etch depth. . . . . . . . . . 38

5.11 (a)A two dimensional etching profile of the bottom wafer(b)X-profile of the etched windows showing the etch depth. . . . . 39

5.12 A three dimensional etching profile of the bottom wafer. . . . 40

5.13 C-V curve of the device at 1KHz. . . . . . . . . . . . . . . . . . 41

vi

CHAPTER 1

Introduction

1.1 Background and purpose of the research

Sensors can be considered the eyes and ears of any system that requires infor-

mation about its environment. In many cases human beings take part in such a

system. They can act as a sensor to provide a machine with data (entering visu-

ally observed date into a computer) or even control the response of a machine

(driving a car)(Nandor, 1997). In other cases sensors are required to provide

human beings with information they can not directly observe, like radiation.

Pressure is a common parameter used in biomedical research as well as in

clinical care ; these measurements are essential in many patient management

situations, eg; intracranial pressure in neurosurgery, blood pressure in surgery

and intensive care, air pressure in respiratory diseases, intrauterine pressure in

obstetrics, abdominal and urinary pressure for diagnosis of respective disorders

etc . Besides external and internal catheter tip measurements, it is frequently

desirable to use implanted pressure measurement systems for long-term moni-

toring(Menon, 2006).

Apart from the biomedical applications, the remote sensing of pressure also

finds interesting applications in the automotive industry . ’Smart’ Vehicles are

based on the extensive use of sensors and actuators. The pressure sensors play

a vital role in the performance of these vehicles. A few examples for these are

(1) Tyre pressure sensor (2) Exhaust gas differential pressure sensor (3) Fuel

rail pressure sensor (4) Gasoline direct injection pressure sensor (5) Fuel tank

evaporative fuel pressure sensor etc.

Pressure sensor is a device which can be used to measure static pressure,

or a pressure in moving fluids . Here two types of pressure measurements are

of particular interest : (1) Absolute pressure and (2) Relative pressure (Singh

et al., 2005). The absolute pressure is measured relative to perfect vacuum. The

relative pressure is measured with respect to some reference pressure.

A bulk micromachined pressure sensor typically uses a silicon membrane

as the sensing element and piezoresistors or capacitors for data retrieval. When

a pressure is applied, stress is developed in the Silicon membrane. This may

cause variation in the resistance of the piezoresistors fabricated on top of the

membrane (Piezoresistive effect) or alter the gap between the membrane and a

fixed plate (Capacitive effect). The variation in resistance or capacitance can be

sensed as a function of the applied pressure.

1.2 Statement of the problem and objectives

One of the proposed systems for implantable miniaturized continuous pressure

measuring sensor (Peterson et al., 2005) integrates a capacitor and inductor in

one small chip, forming a resonant LC circuit. The inductor is a spiral microma-

chined coil made by removing selected portions of a material from a conductive

sheet of Al, Au or Cu. The capacitive pressure sensing part consists of a thin

deformable Si membrane that forms part of the first wafer which is bonded to

a second wafer that is already etched to form the gap of the capacitor.

Figure 1.1: Concept of a Resonant Absolute Pressure Sensor

In order to be bio-compatible, it is proposed to have the tank circuit on Sili-

2

con substrate. The pressure range of interest is 0.12 MPa - 0.15 MPa. Hence the

pressure sensor should have a linear response in the range 0.1 MPa - 0.17 MPa.

The sensor area is restricted to a size of 2mm×2mm.

The objective of this project was to design an optimum structure for the

pressure sensor operating within the specifications mentioned. The approach

used was to simulate different structures and pick the one which gives maxi-

mum sensitivity and then fabricate it and test it to validate the results from the

simulations.

1.3 Organization of the thesis

This chapter presents in brief the relevance of pressure monitoring in biomed-

ical and automotive applications along with a background and specifications

of the proposed system, a resonant pressure sensor.It also describes the main

objective of the research work done.

Chapter 2 describes the commonly used processes that are used in the fab-

rication of MEMS.

In Chapter 3 the basic design of a Capacitive pressure sensor id discussed.

Chapter 4 describes the previous work done on this project on which this

research work is based.

Chapter 5 describes the results of the simulation work done and also the

process flow used to fabricate the pressure sensor and the results of fabrication.

Chapter 6 presents the summary of the work done.

3

CHAPTER 2

Processes for Micromachining

This chapter presents methods used in the fabrication of MEMS. Many are

borrowed from the integrated-circuit industry,in addition to others developed

specifically for silicon micromachining.There is no doubt that the use of process

equipment and the corresponding portfolio of fabrication processes initially

developed for the semiconductor industry has given the burgeoning MEMS

industry the impetus it needs to overcome the massive infrastructure require-

ments. For example, lithographic tools used in micromachining are often times

from previous generations of equipment designed for the fabrication of elec-

tronic integrated circuits. The equipments performance is sufficient to meet

the requirements of micromachining, but its price is substantially discounted.

A few specialized processes, such as anisotropic chemical wet etching, wafer

bonding, deep reactive ion etching, sacrificial etching, and critical-point dry-

ing, emerged over the years within the MEMS community and remain limited

to micromachining in their application (Maluf, 1999).

From a simplistic perspective, micromachining bears a similarity to conven-

tional machining in the sense that the objective is to precisely define arbitrary

features in or on a block of material. There are, however, distinct differences.

Micromachining is a parallel (batch) process in which dozens to tens of thou-

sands of identical elements are fabricated simultaneously on the same wafer.

Furthermore, in some processes,dozens of wafers are processed at the same

time.Another key difference is the minimum feature dimension-on the order

of one micrometerwhich is an order of magnitude smaller than what can be

achieved using conventional machining.

Silicon micromachining combines adding layers of material over as silicon

wafer with etching(selectively removing material)precise patterns in these lay-

ers or in the underlying substrate. The implementation is based on a broad

portfolio of fabrication processes, including material deposition, patterning,

and etching techniques. Lithography plays a significant role in the delineation

of accurate and precise patterns. These are the tools of MEMS (see Figure 2.1).

Figure 2.1: Illustration of the basic process flow in micromachining: Layers aredeposited; photo resist is lithographically patterned and then usedas a mask to etch the underlying materials. The process is repeateduntil completion of the microstructure.

Epitaxy, sputtering, evaporation, chemical-vapor deposition, and spin-on

methods are common techniques used to deposit uniform layers of semicon-

ductors, metals, insulators,and polymers.Lithography is a photographic pro-

cess for printing images onto a layer of photosensitive polymer (photoresist)

that is subsequently used as a protective mask against etching. Wet and dry

etching, including deep reactive ion etching, form the essential process base

to selectively remove material. The follow ing sections describe some of the

fundamentals of the basic process tools relevant to this thesis.

5

2.1 Epitaxy

Epitaxy is a deposition method to grow a crystalline silicon layer over a sili-

con wafer, but with a differing dopant type and concentration. The epitaxial

layer is typically 1 to 20µm thick. It exhibits the same crystal orientation as the

underlying crystalline substrate, except when grown over an amorphous ma-

terial (e.g., a layer of silicon dioxide), it is polycrystalline. Epitaxy is a widely

used step in the fabrication of CMOS circuits and has proven efficient informing

wafer-scale p-n junctions for controlled electrochemical etching.The growth oc-

curs in a vapor-phase chemical-deposition reactor from the dissociation or hy-

drogen reduction at high temperature (> 800◦C) of a silicon- containing source

gas. Common source gases are silane (SiH4), dichlorosilane (SiH2Cl4), or sili-

con tetrachloride (SiCl4). Nominal growth rates are between 0.2 and 4µm/min,

depending on the source gas and the growth temperature. Impurity dopants

are simultaneously incorporated during growth by the dissociation of a dopant

source gas in the same reactor. Arsine (AsH3) and phosphine (PH3), two ex-

tremely toxic gases, are used for arsenic and phosphorous (n-type) doping, re-

spectively; diborane (B2H6) is used for boron (p-type) doping.

2.2 Oxidation

High-quality amorphous silicon dioxide is obtained by oxidizing silicon in ei-

ther dry oxygen or in steam at elevated temperatures(850◦C1,150◦C).Oxidation

mechanisms have been extensively studied and are well understood. Charts

showing final oxide thickness as function of temperature, oxidizing environ-

ment, and time are widely available (S.M.Sze, 1988).

Thermal oxidation of silicon generates compressive stress in the silicon diox-

ide film. There are two reasons for the stress: Silicon dioxide molecules take

more volume than silicon atoms,and there is a mismatch between the coeffi-

cients of thermal expansion of silicon and silicon dioxide. The compressive

stress depends on the total thickness of the silicon dioxide layer and can reach

6

hundreds of MPa. As a result, thermally grown oxide films cause bowing of

the underlying substrate. Moreover, freestanding membranes and suspended

cantilevers made of thermally grown silicon oxide tend to warp or curl due to

stress variation through the thick ness of the film.

2.3 Lithography

Lithography involves three sequential steps:

• Application of photoresist (or simply resist), which is a photosensitiveemulsion layer;

• Optical exposure to print an image of the mask onto the resist;

• Immersion in an aqueous developer solution to dissolve the exposed re-sist and render visible the latent image.

The mask itself consists of a patterned opaque chromium (the most com-

mon), emulsion, or iron oxide layer on a transparent fused-quartz or soda-lime

glass substrate. The pattern layout is generated using a computer-aided design

(CAD) tool and transferred into the opaque layer at a specialized mask-making

facility,often by electron-beam or laser-beam writing. A complete microfabri-

cation process normally involves several lithographic operations with different

masks. Positive photoresist is an organic resin material containing a sensitizer.

It is spin-coated on the wafer with a typical thickness between 0.5µmand10µm.

The sensitizer prevents the dissolution of unexposed resist during immersion in

the developer solution. Exposure to light in the 200 to 450 nm range (ultravio-

let to blue) breaks down the sensitizer, causing exposed regions to immediately

dissolve in developer solution. The exact opposite process happens in nega-

tive resistsexposed areas remain and unexposed areas dissolve in the developer.

Optical exposure can be accomplished in one of three different modes:contact,

proximity, or projection. In contact lithography, the mask touches the wafer.

This normally shortens the life of the mask and leaves undesired photoresist

residue on the wafer and the mask.In proximity mode,the mask is brought to

7

within 25to50µm of the resist surface.By contrast,projection lithography projects

an image of the mask onto the wafer through complex optics (see Figure 2.2).

Figure 2.2: An illustration of proximity and projection lithography.

While resolution of most lithographic systems is not a limitation for MEMS,

lithography can be challenging depending on the nature of the application; ex-

amples include exposure of thick resist, topographical height variations, front

to back side pattern alignment, and large fields of view.

Double Sided Lithography

Often,lithographic patterns on both sides of a wafer need to be aligned with

respect to each other with high accuracy. For example, the fabrication of a com-

mercial pressure sensor entails forming on the front side of the wafer piezore-

sistive sense elements that are aligned to the edges of a cavity on the back side

of the wafer. Different methods of front-to-back side alignment, also known

as double-sided alignment,have been incorporated in commercially available

tools.Wafers polished on both sides should be used to minimize light scatter-

ing during lithography.First, the alignment marks on the mechanically clamped

mask are viewed from below by a set of dual objectives,and an image is elec-

8

tronically stored.The wafer is then loaded with the back side alignment marks

facing the microscope objectives and positioned such that these marks are aligned

to the electronically stored image. After alignment,exposure of the mask on to

the front side of the wafer is completed in proximity or contact mode.

Figure 2.3: Double sided alignment scheme.

2.4 Etching

In etching,the objective is to selectively remove material using imaged photore-

sist as a masking template. The pattern can be etched directly into the silicon

substrate or into a thin film, which may in turn be used as a mask for subse-

quent etches. For a successful etch, there must be sufficient selectivity (etch-

rate ratio) between the material being etched and the masking material. Etch

processes for MEMS fabrication deviate from traditional etch processes for the

integrated circuit industry and remain to a large extent an art.

Deep etching of silicon lies at the core of what is often termed bulk micro-

machining.No ideal silicon etch method exists,leaving process engineers with

9

techniques suitable for some applications but not others. Distinctions are made

on the basis of isotropy, etch medium, and selectivity of the etch to other mate-

rials.

Isotropic etchants etch uniformly in all directions, resulting in rounded cross-

sectional features. By contrast, anisotropic etchants etch in some directions

preferentially over others, resulting in trenches or cavities delineated by flat

and well defined surfaces, which need not be perpendicular to the surface of the

wafer (see Figure 2.4).The etch medium(wet versus dry)plays a role in selecting

a suitable etch method. Wet etchants in aqueous solution offer the advantage

of low-cost batch fabrication 25to50100-mm diameter wafers can be etched si-

multaneously and can be either of the isotropic or anisotropic type. Dry etching

involves the use of reactant gases, usually in a low-pressure plasma, but non-

plasma gas-phase etching is also used to a small degree. It can be isotropic or

vertical.

Figure 2.4: Etching profiles for different types of etchants.

Anisotropic Wet Etching

Anisotropic wet etchants are also known as orientation-dependent etchants

(ODEs)because their etch rates depend on the crystallographic direction.The

list of anisotropic wet etchants includes the hydroxides of alkali metals (e.g.,

10

NaOH, KOH, CsOH), simple and quaternary ammonium hydroxides (e.g.,NH4OH,

N(CH3)4OH), and ethylenediamine mixed with pyrochatechol (EDP) in water.

The solutions are typically heated to 70−100 ◦C.

KOH is by far the most common ODE. Etch rates are typically given in the

(100) direction, corresponding to the etch front being the (100) plane. The (110)

planes are etched in KOH about twice as rapidly as (100) planes, while (111)

planes are etched at a rate about 100 times slower than for (100) planes (see

Figure 2.5).The latter feature is routinely used to make V-shaped grooves and

trenches in (100) silicon wafers, which are precisely delineated by (111) crys-

tallographicplanes.The overall reaction consists of the oxidation of silicon fol-

lowed by a reduction step:

Si+2OH−→ Si(OH)++2 +4e−(oxidation) (2.1)

Si(OH)++2 +4e−+4H2O→ Si(OH)−−6 +2H2(reduction) (2.2)

Figure 2.5: Illustration of the anisotropic etching of cavities in 100-oriented sil-icon: (a) cavities, self-limiting pyramidal and V-shaped pits, andthin membranes; and (b) etching from both sides o the wafer canyield a multitude of different shapes including hourglass-shapedand oblique holes.

11

2.5 Bonding

Wafer- level bonding of a silicon wafer to another silicon substrate or to a glass

wafer plays a key role in all the leading-edge Micro- Electro-Mechanical Sys-

tems (MEMS). When used along with the wet or dry etching techniques, the

wafer bonding technique can be used to realize (1) membranes of thickness

varying from couple of microns to several microns, suitable for pressure sensors

over a wide range of pressures, (2) complicated three dimensional structures for

accelerometers for sensing acceleration and (3) multilayered device structures

such as micropump suitable for biomedical and microfluidic applications, and

(4) high aspect ratio structures which can compete with the LIGA process.The

manufacturers of MEMS require wafer-level bonding of one silicon wafer to

another silicon substrate or a glass wafer. This provides a first level packaging

solution that makes these processes economically viable.

Silicon wafer bonding for MEMS (K.N.Bhat et al., 2007) is achieved by sev-

eral different approaches such as (1) anodic bonding, (2) direct bonding and (3)

intermediate layer bonding which includes eutectic and glass-frit bonds. Even

though the process conditions used for all the three bonding techniques vary,

the general process of the wafer bonding follow a three step sequence consist-

ing of surface preparation, contacting and annealing

Fusion Bonding

The surfaces to be bonded have to be flat and show an average roughness

which is typically in the order of nanometers. The surfaces are then made hy-

drophylic and the bonding happens by relatively weak Van-der-Walls or Hy-

drogen Bridge bonding. Any kind of particle is detrimental to bonding and

leads to unbonded areas or ’bubbles’ at the interface. The presence of particle-

related interface bubbles is a major obstacle in wafer bonding. This can be over-

come by performing bonding process on a clean room of class 10 or 100.

12

Figure 2.6: Illustration of a wafer bonding process. (a)The two wafers to bebonded.(b)Pressing Surfaces. (c)Binding Si-O bonds.(d)Binding Si-Si bonds.

13

CHAPTER 3

Capacitive Pressure Sensors

3.1 Capacitive Sensing Techniques

The physical structures of capacitive sensors are relatively simple. The tech-

nique nevertheless provides a precise way of sensing the movement of an ob-

ject. Essentially the devices comprise a set of one (or more) fixed electrode and

one (or more) moving electrode.They are generally characterized by the inher-

ent nonlinearity and temperature cross-sensitivity, but the ability to integrate

signal conditioning circuitry close to the sensor allows highly sensitive, com-

pensated devices to be produced.Figure 3.1 illustrates three configurations for

a simple parallel plate capacitor structure (Beeby et al., 2004).

Figure 3.1: Examples of simple capacitance displacement sensors: (a) movingplate, (b) variable area, and (c) moving dielectric.

For a simple parallel plate capacitor structure, ignoring fringing fields, the

capacitance is given by

C =ε0εrA

d(3.1)

wheree ε0 is the permittivity of free space,εr is the relative permittivity of the

material between the plates,A is the area of overlap between the electrodes,and

d is the separation between the electrodes.The equation shows that the capac-

itance can be varied by changing one or more of the other variables. Figure

3.1(a) shows the simple case where the lower electrode is fixed and the up-

per electrode moves. In this case the separation, d, is changing and hence the

capacitance varies in a nonlinear manner.Figure 3.1(b)depicts a device where

the separation is fixed and the area of overlap is varied. In this configuration,

there is a linear relationship between the capacitance and area of overlap. Fig-

ure 3.1(c) shows a structure that has both a fixed electrode distance and area

of overlap. The movement is applied to a dielectric material (of permittivity εr

) sandwiched between two electrodes. A common problem to all of these de-

vices is that temperature will affect all three sensing parameters d, A, and εr,

resulting in changes in the signal output. This effect must be compensated for

in some manner,whether by additional signal conditioning circuitry or, prefer-

ably, by geometric design.

Capacitor structures are relatively straightforward to fabricate, and mem-

brane type devices are often used as the basis for pressure sensors and micro-

phones. More elaborate structures, such as interdigitated capacitors, are also

used, and the effects of the fringing fields cannot always be ignored.With such

devices,the simple parallel plate capacitor equation only provides a crude esti-

mate of the expected capacitance change.

Capacitive techniques are inherently less noisy than those based on piezore-

sistance owing to the lack of thermal (Johnson) noise. With micromachined

devices, however, the values of capacitance are extremely small (in the range

of femto to attofarads), and the additional noise from the interface electronic

circuits often exceeds that of a resistance-based system.

3.2 Micromachined Pressure Sensors

Micromachined pressure sensors have found wide applications in areas such as

automotive systems, industrial control, environmental monitoring and biomed-

15

ical diagnostics. Capacitive pressure sensor converts the pressure change into a

capacitance variation, to provide higher sensitivity, lower which tends temper-

ature coefficients, more robust structure and lower power consumption com-

pared to piezoresistive devices(Zhou et al. (2002)).

Most sensors for greater than atmospheric pressure share the common char-

acteristic of deformable diaphragms. In diaphragm-based sensors, pressure

is determined by the deflection of the diaphragms due to applied pressure.

Figure 3.2 illustrates a schematic cross section of a typical pressure sensor

diaphragm(W.P.Eaton and J.H.Smith (1997)). The reference pressure can be a

sealed chamber or a pressure port so that absolute or gauge pressures are mea-

sured, respectively. The shape of the diaphragm as viewed from the top is arbi-

trary, but generally takes the form of a square or circle.

Figure 3.2: A schematic cross section of a typical pressure sensor diaphragm.Dotted lines represent the undeflected diaphragm.

A typical bulk-micromachined capacitive pressure sensor is shown in Figure

3.3.

Figure 3.3: A cross section schematic diagram of a bulk-micromachined, capac-itive pressure sensor.

16

A capacitive sensor can be operated in contact mode to increase linearity

(Figure 3.4). In contact mode, the capacitance is nearly proportional to the con-

tact area, which in turn exhibits good linearity with respect to applied pressure

(W.P.Eaton and J.H.Smith (1997)). This holds true over a wide range of pres-

sures. However, this linearity comes at the expense of decreased sensitivity.

Figure 3.4: A cross section schematic diagram of a bulk-micromachined,contact-mode pressure sensor.

Another method for achieving a linear response is to use bossed diaphragms.

Figure 3.5 illustrates this concept. On the left is a cut-away view of a uniform-

thickness diaphragm and its corresponding cross-sectional deflected mode shape.

A non-uniform, bossed diaphragm is on the right. The thicker centre portion

(or boss) is much stiffer than the thinner tether portion on the outside. The

centre boss contributes most of the capacitance of the structure and its shape

does not distort appreciably under applied load. Hence the capacitancepres-

sure characteristics wil be more linear.

Figure 3.5: A comparison of deflection shapes for uniform-thickness (left) andbossed (right) diaphragms.

17

3.2.1 Materials

The quality and reproducibility of constituent materials play a critical role in the

commercial viability of pressure sensors. The focus of this paper will be bulk

and surface micromachining, where the desired mechanical structures are made

from the substrate itself, or thin films deposited on the substrate, respectively.

In bulk micromachining one of the dominant materials is single-crystal sil-

icon. The mechanical properties of single-crystal silicon are excellent, as re-

ported in a landmark article by Petersen in 1982 (K.E.Petersen (1982)). It has

high strength, high stiffness, high mechanical repeatability, high, and no me-

chanical hysteresis. Furthermore, single-crystal silicon is available in large quan-

tities with high purity and low defect densities. Piezoresistive gauge factors

in silicon are higher than in metal, but temperature coefficients of resistance

(TCRs) are high. Because of high TCRs, silicon microsensors often require tem-

perature compensation techniques.

18

CHAPTER 4

Previous Work

As stated in Chapter 1 the approach used to reach at an optimum structure was

to simulate different structure conforming with the given specification and pick

the best out of them.The initial simulations were done for both Piezoresistive

and Capacitive sensors .This chapter presents the previous work done which

was the starting point of this research work.

4.1 Piezo-resistive Pressure sensor

The piezo-resistive pressure sensor is designed in Coventorware software. The

membrane model is created by using the process file and layout (which specifies

dimensions of the membrane). All the sides of the membrane are made fixed

and pressure is applied at the top face. Memmech module is used for analysis.

The pressure is varied from 0-0.17MPa. The piezo resistors are positioned on

the membrane to get maximum sensitivity. For a single crystal silicon piezo re-

sistors as the longitudinal gauge factor and transverse gauge factor are almost

same and opposite in sign, the resistors are placed such that two of the resistors

(which experience more longitudinal stress) in a Wheatstone bridge configura-

tion increases and two resistors decreases (which experience more transverse

stress) . The position of resistors on the membrane is shown in the Figure 4.1.

To find sensitivity the Gauge factor is given by

G =∆R/RStrain

(4.1)

Figure 4.1: Structure Simulated in CoventerWare

Piezo-resistive coefficient Π is given by

Π =∆R/RStress

(4.2)

∆RR

= Πlσl +Πtσt (4.3)

where σlis Longitudinal stress

σt is Transverse stress

Πlis Longitudinal piezo-resistive coefficient

Πt is Transverse piezo-resistive coefficient

As Young’s modulus E = stress/strain

Π =GE

(4.4)

Therefore∆RR

=Glσl +Gtσt

E(4.5)

Gl is Longitudinal Gauge factor

Gl is Transverse Gauge factor

E is the Young’s modulus

The circuit equivalent for the structure simulated is given in Figure 4.2

20

Figure 4.2: Circuit Equivalent of the Structure

V0 =−VIN

2R(R−∆R)+

VIN

2R(R+∆R) (4.6)

V0 =∆RR×VIN (4.7)

Sensitivity is given by

S =V0/VIN

P(4.8)

where P is the pressure applied.Thus sensitivity is proportional to ∆RR .

Figure 4.3 shows the for 1500µm× 1500µm× 5µm membrane for different

pressures. The figure shows the linearity within the range and Sensitivity is the

change in resistance at 1bar pressure.

4.2 Capacitive Pressure sensor

In capacitive pressure sensor the capacitance between two electrodes is ob-

tained for the applied pressure. Maximum pressure of 0.17MPa is applied in

all cases. This is modeled in Intellisuite software. First, capacitance is found

for different dimensions of the membrane by applying pressure to one of the

electrodes and zero voltage to both the electrodes. The Table 4.1 shown below

gives the ∆C (Difference between no load capacitance and max. load capaci-

tance) for different dimensions of the membrane. The Table 4.2 shows the ∆C

for the capacitors connected in parallel. The figure 4.4 shows parallel capacitors

21

Figure 4.3: Results of the simulation of the structure in Figure 4.1

simulated in Intellisuite.The thickness of the membrane is 5µm.

Figure 4.4: Capacitors connected in Parallel

4.3 Observations

Different structure were simulated at the maximum pressure of 0.17MPa.It can

be observed from Table 4.1 that the rows marked in bold gave the best possible

22

Pressure Dimension Deflection Gap Capacitance Capacitance ∆ C=Cp−C(MPa) (µ m× µm) (µm) (µm) No load with load (pF)

C(pF) Cp(pF)0.17 200×200 0.18 0.36 1.0212 1.262 0.24080.17 250×250 0.45 1 0.64645 0.7794 0.132950.17 300×300 0.886 2 0.4176 0.4944 0.070.17 350×350 1.6 2.6 0.4369 0.5676 0.13070.17 400×400 2.506 3.5 0.4284 0.604758 0.17640.17 450×450 3.57 4.6 0.41512 0.627 0.21180.17 500×500 4.7 5.7 0.4148 0.67076 0.2560.17 200×400 0.356 0.8 1.26083 1.72215 0.461320.17 250×500 0.83 2 0.5883 0.7 0.11170.17 300×600 1.68 2.7 0.6507 0.934 0.28330.17 350×700 2.77 3.8 0.6326 1.024 0.39140.17 400×800 4 5 0.6654 1.3214 0.6560.17 500×1000 6.5 - - - -

Table 4.1: Table showing sensitivity for different sizes of capacitors.

Parallel Dimension Deflection Gap Capacitance Capacitance ∆ C=Cp−CCapacitors (µ m× µm) (µm) (µm) No load with load (pF)

C(pF) Cp(pF)2 200×200 0.18 0.36 1.99 2.462 0.4723 2.987 3.696 0.7094 3.981 4.863 0.8822 200×400 0.356 0.8 1.806 2.221 0.4153 2.707 3.297 0.594 3.612 4.398 0.7862 300×600 1.75 3 1.104 1.466 0.3623 1.661 2.203 0.5424 2.212 2.907 0.6952 350×700 2.8 4 1.131 1.713 0.5823 1.7 2.559 0.8594 2.269 3.295 1.0262 400×800 4 5 1.183 2.091 0.9083 1.78 3.142 1.3624 2.373 4.152 1.779

Table 4.2: Table showing sensitivity for different sizes of capacitors connectedin parallel with applied pressure of 0.17MPa and the spacing betweenthe capacitors of 50µm.

23

sensitivities and those structures should be explored further.Also theory shows

that connecting capacitors in parallel increases the capacitance.Hence optimum

structures from Table 4.1 were simulated with capacitors in parallel consider-

ing the space constraints.The results are shown in Table 4.2.However these were

done at maximum pressure of 0.17MPa.Hence linearity still needed to be ver-

ified.Simulations were carried out the check these structure for linearity.The

following section discusses the results of simulation.

24

CHAPTER 5

Results and Discussion

This chapter presents with the simulation and fabrication work done based on

the observations made in the previous chapter.

5.1 Simulation Results and Discussion

The structures in Table 4.2 were simulated for the pressure range 0.1 to 0.17MPa

to check for linearity of sensitivity with pressure.The simulation was done us-

ing Thermo Electro Mechanical (TEM) module of Intellisuite .The procedure

used for simulating in Intellisuite is described below.

The device consists of two parallel plates of Silicon. The spacing d between

them based on the work by Menon (2006) is fixed depending on the value of

dmax.Where dmax is the deflection of a single plate at maximum pressure. If dmax

< 1 µm then d = 2 dmax and if dmax > 1 µm then d = dmax + 1 µm. The lower

plate is fixed while the upper plate is deformable.Zero voltage is applied to

both the plates. Different values of pressure is applied and capacitance value is

studied.The steps followed for this analysis are listed below :

• Create a model of the capacitive pressure sensor using the 3D builder.

• Save it in the Thermo Electro Mechanical module of Intellisuite

• Set the simulation setting as Thermo Electro Mechanical Relaxation Anal-ysis

• Define material properties for the structure ( in this case that of (100) Si )

• Apply loading zero volts to both plates and the pressure on the top surfaceof the upper plate and appropriate boundary conditions. The four edgesof the membrane are fixed.

• Mesh the device.

• Run static analysis.

• After the analysis note down the value of capacitance.

Figure 5.1 shows an example structure simulated.

Figure 5.1: A meshed model of the device before simulation

Several structures were simulated and the results are summarized in the

Figure 5.2.The thickness of the membrane is 5µm.

A couple of observation can be made from the graph above.

• The sensitivity increases on increasing the membrane size.

• However the response also becomes nonlinear on increasing the mem-brane size.

Thus,the structure having a linear response and maximum sensitivity is

350× 700µm with 6 capacitors in parallel.Hence this structure was chosen for

further analysis.

Now analysis was done on this structure to optimize the bonding area of the

structure to minimize the stray capacitances due to the supports for the mem-

brane.Hence an actual structure to be fabricated,taking in to consideration the

26

Figure 5.2: Results of simulation showing (a)Sensitivity v/s Pressure and(b)Delta C v/s Pressure for different structures.

27

bonding area for the two wafers, was simulated.Figure 5.3 shows the structure

simulated.In the structure the layer II contributes to the bonding area.

Figure 5.4 shows the final structure simulated with the bonding area width

being 500µm,which effectively is also the gap between the adjacent capacitors.

However the structure was too large and hence only mechanical analysis

could be done,simulations didn’t converge for electromechanical analysis.Hence

capacitance information could not be extracted.The results of mechanical anal-

ysis is shown in Figure 5.5.

To validate the reason for non-convergence being the large structure, simu-

lations were done with smaller structures,and gradually increased.Simulations

were started with a single capacitor and it was found that simulations con-

verged until 4 capacitors in parallel.It was also found that capacitance for 2

and 4 capacitors in parallel was roughly 2 and 4 times the capacitance of a sin-

gle capacitor respectively.Hence it was decided to do simulation for a single

capacitor and multiply the capacitance by 6 to get the results for the required

structure.However,due to unsatisfactory results from simulation it was decided

to start with the fabrication work by designing a mask with bonding area width

as 1500µm,based on previous results on bonding in the laboratory.

5.2 Mask and Process steps Design

This section describes the process flow designed for the fabrication of the pres-

sure sensor.It also presents with the design of a mask which was made for test-

ing the results from simulation.Figure 5.6 gives a schematic of the process steps

involved in the fabrication of the pressure sensor.

As seen from Figure 5.6 Step 3 Lithography requires a mask to selectively

etch the oxide and get a pattern on the wafer.Thus masks were designed to get

the required pattern after etching.

We want a rectangular cavity of 350× 700µm.Thus the width of the mask

28

Figure 5.3: The structure simulated for further analysis.

29

Figure 5.4: The final meshed structure simulated with parallel capacitors.

Figure 5.5: The displacement profile from mechanical analysis.

30

Figure 5.6: Process flow designed for the fabrication of the pressure sensor.

31

opening wm is determined from etch depth z,width of the bottom cavity w0 and

the angle α = 54.74◦ which is the angle between the < 100 > and < 111 > planes

(J.Madou, 2002).

Figure 5.7: Anisotropic etching of < 100 > silicon.

wm = w0 +2zcotα (5.1)

Using Equation 5.1 the masks were designed for the patterning of the bot-

tom and the top wafer using the etch depths z as 4 and 275µm respectively.A

mask was also designed for the metallization step which will be done after

bonding to provide the contacts.Thus,a three layer mask was designed using

the IntelliMask module of the Intellisuite software.The masks designed are shown

below in Figure 5.8.

However,due to some constraints in the lab the mask couldn’t be written

and a different mask shown in Figure 5.9 was used for both the top and bottom

wafers.

5.3 Fabrication steps

This section describes the process steps carried out to fabricate the capacitive

pressure sensor for testing purposes.Let us go through each processes, step by

step and describe the procedure followed for each steps.

32

Figure 5.8: (a)The three layer mask.(b)Layer 1-Bottom wafer.(c)Layer 2-Topwafer.(d)Layer 3-Metallization mask.

33

Figure 5.9: Mask used for fabrication purpose.

5.3.1 Wafer Cleaning

Semiconductor wafers are subjected to physical handling during the process.

This leads to molecular contamination ( S.M.Sze (1988)). Removal of these con-

taminants is called cleaning. Two p-type < 100 > Double Side Polished (DSP)

quarter wafers were taken.The wafer thickness was measured to be 307µm.The

cleaning steps are:

1. The wafer is boiled in hot organic solvent trichloro ethylene (TCE) forabout 2 minutes till bubbles start to form to remove the organic impuritiessuch as grease.

2. The wafer is then boiled in acetone for about 2 minutes till the start of bub-ble formation which removes the TCE, followed by rinsing in deionisedwater and drying by blowing nitrogen with air gun.

3. To remove the inorganic impurities such as chromium and gold, the waferis boiled in HNO3 for 10 minutes, rinsed with DI water and then driedwith air gun.

All these steps carried out for 10 to 20 minutes at 75− 85◦C. Finally the

wafer is dipped in dilute HF(HF:H2O::1:10) to remove the native oxide. Now

the wafer is ready for dilute oxidation.

5.3.2 Oxidation

Oxide growth is carried out in a quartz diffusion tube in which the silicon wafer

is o kept at a temperature of 1050◦C. High-density ceramic liner is used to serve

34

as a diffusion barrier to sodium, which is present in furnace heating elements

(Sorab.K.Gandhi (1983)). In the early stages of growth, oxide thickness varies

linearly with time. In later stages the reaction is diffusion limited and oxide

thickness is proportional to the square root of time. The oxidation rate increases

with temperature and pressure.

Thick layers are grown by wet oxidation method, which gives high oxida-

tion rate. To get good quality of oxide, oxidation is carried out by alternative

dry-wet-dry oxidation methods.

Steps followed during the oxidation

1. The thermal oxidation furnace is switched on and the temperature is setto 1050◦C.

2. The well cleaned p-type Silicon wafers are loaded into oxidation furnace.

3. The furnace is kept in dry oxidation mode and oxygen at 20lts/hr is passedfor 15 minute.

4. The furnace is changed to wet oxidation mode, where oxygen bubbledthrough water at 98◦C, is introduced into the furnace at the rate of 2lts/hrfor a time of 4 hours for the top wafer and for 15 minutes for the bottomwafer.

5. Furnace is again switched to dry oxidation mode and oxygen is passed atthe rate of 20 lts/hr for 15 minute.

6. Annealing is carried out in nitrogen ambient at 20lts/hr for 30 minutes.This process is carried to reduce the fixed oxide charges.

7. Loading and unloading of wafers are carried out in nitrogen ambient;slow push and pull rates are employed to reduce the steepness of ther-mal gradients.

The above procedure gave an oxide thickness of about 0.99µm(measured

from ellipsometry measurements).

5.3.3 Photolithography

Photolithography was used to open the windows in the oxide on both the

wafers.The steps used in lithography are listed below.

35

1. The wafer is kept in post bake furnace for 5 minute to remove any mois-ture present.

2. The wafer is spun at 1000 rpm for 30 sec. after a small quantity of prefiltered PPR has been coated on it.

3. The wafer is pre baked for 20 minute at 80−90◦C.

4. The mask is placed over the wafer and is exposed to UV light for 30 sec.

5. The wafer is rinsed in developer (sol. of 50 ml DI water and 3 pellets ofKOH) followed by rinsing in DI water. This removes the exposed PPR.

6. The wafer is post baked at 120◦C for 30 minute.

5.3.4 Etching

Oxide Etching

1. Before etching the back oxide is protected by coating thick PPR on backside of wafer.

2. The oxide in the exposed windows is etched by dipping the wafer in BHFsolution for 12 minutes for top wafer and 2 minutes for bottom waferfollowed by DI water rinse.

3. After etching, the wafer is rinsed in acetone followed by cleaning in H2SO4+H2O2(3 : 1) solution and then DI water rinse to remove unexposed andback coated PPR.

Now the wafer is ready for wet etching.

Wet Si Etching

To realize the membrane structure, wet etching is carried out using 40% KOH

solution. 80 gm of KOH (in pellets) is taken with 200 ml of DI water and mixed

proper manner to make perfect solution. This beaker is placed in water bath

and its temperature is raised to 80◦C using temperature controller. After the re-

quired temperature is achieved, the wafer is placed in the beaker after giving a

dip in dilute HF(HF:H2O::1:10)solution for 1 minute.The beaker is then covered

with lid.

36

After etching for 3 hours and 20 minutes it was found that the oxide mask

for the wet etching was also etched.Etch rate from this was calculated to be

around 58µm/hour.It was concluded that the temperature of etching was high

and was reduced to 76◦C for subsequent etching steps.It was decided to do

etching first only for 3 hours and then again do oxidation,photolithography

and finally etch down to required thickness.

Thus,another wafer was taken and was subjected to the following steps.

1. 4 hours of wet oxidation.

2. Lithography as described in Section 5.4.3.

3. Etching for 3 hours at 76◦C.Etch depth was calculated to be 170µm,thusetch rate was calculated to be 56.66µm.

4. RCA I (NH4OH:H2O2:DI H2O::1:1:5 solution for 20minutes at 80◦C) andRCA II clean(HCl:H2O2:DI H2O::1:1:5 solution for 20minutes at 80◦C).

5. Wet oxidation for 4 hours.

6. Lithography

7. Etching for 2 hours and 15 minutes based on etch rate calculated in step3.The etch depth was found to be 298µm.

The bottom wafer was also subjected to same etching conditions for 8 min-

utes and the etch depth was found to be 8µm.The etching profiles for both the

wafers observed using the surface profiler is shown Figure 5.10 and Figure

5.11.

As seen from the 2-D profile the etch depth for the top wafer is not uni-

form.Possible reason suggested for this is that during second lithography mask

pattern was not aligned exactly over the pattern after first etching.

Figure 5.12 also shows the 3-D etching pattern of the bottom wafer.

After etching both the wafers,top wafer was etched in BHF solution for

about 5 minutes to remove any oxide left after the KOH etching.

37

Figure 5.10: (a)A two dimensional etching profile of the top wafer(b)X-profileof the etched windows showing the etch depth.

38

Figure 5.11: (a)A two dimensional etching profile of the bottom wafer(b)X-profile of the etched windows showing the etch depth.

39

Figure 5.12: A three dimensional etching profile of the bottom wafer.

5.3.5 Bonding

Once the etching was complete for both the wafers they were bonded.The bond-

ing procedure is outlined below.

1. RCA I and RCA II cleaning

2. Make the wafers hydrophillic by cleaning with DI water before loadingthe wafers.

3. Contact the wafers.

4. Increase the temperature to 450◦C.

5. Make a vacuum of 2×10−5mbar.

6. Apply tool pressure of 200mbar.

7. Decrease the temperature to 250◦C.

8. Unload the sample.

After following the above procedure the two wafers were successfully bonded.

40

5.4 C-V Measurements

Once the wafer was bonded the C-V measurements were carried out on the

device.Figure 5.13 shows the C-V curve.It can be inferred that the pull in occurs

for positive voltage after approximately 10V.However,pull-in is not observed

for negative voltage.Also,the dissipation factor of the device was found to be

high,indicating poor quality of oxide. Also from the maximum and minimum

Figure 5.13: C-V curve of the device at 1KHz.

value of the capacitance the maximum deflection can be calculated from the

equation below.

d1−d0 =(

1Cmin

− 1Cmax

)ε0A (5.2)

where Cmin = 2.7pF , Cmax = 1.98nF , A = 1.5×1.5mm2.Substituting these values

we get maximum deflection as 7.4µm,which is close to etch depth of 8µm as seen

from Figure 5.11.

41

CHAPTER 6

Summary and Further work

Based on the simulation work it was concluded that the membrane structure

with dimensions 350× 700µm with six capacitors in parallel has the maximum

sensitivity and a linear response.It was also observed that when membrane di-

mensions reach 400µm non-linearity creeps in.It is suggested that simulations

be carried out with different bonding areas to determine the optimum bonding

area.

Fabrication was carried out with a mask with 3mm× 3mm as the bonding

area,and it was found to be sufficient as the bonding procedure was successful.

C-V measurements were done on the bonded device.More characterization of

the device can be done and relate voltage deflections with pressure.However,it

is suggested that fabrication be carried out with the mask in Figure 5.8 to vali-

date the results from simulation.

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2. J.Madou, M., Fundamentals of Microfabrication: The Science of Miniaturization.CRC; 2 edition, 2002.

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