August 2004 doc.: IEEE 802.11-04/0951r1 Submission S. Coffey, et al., WWiSE group Slide 1 WWiSE...

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S. Coffey, et al., WWiSE group Slide 1 August 2004 doc.: IEEE 802.11- 04/0951r1 Submissio n WWiSE Group Partial WWiSE Group Partial Proposal on Turbo Codes Proposal on Turbo Codes August 13, 2004 Airgo Networks, Bermai, Broadcom, Conexant, STMicroelectronics, Texas Instruments

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August 2004 doc.: IEEE /0951r1 Submission S. Coffey, et al., WWiSE group Slide 3 Contents Overview of partial proposal Motivation for advanced coding Specification of turbo code Performance results Summary

Transcript of August 2004 doc.: IEEE 802.11-04/0951r1 Submission S. Coffey, et al., WWiSE group Slide 1 WWiSE...

Page 1: August 2004 doc.: IEEE 802.11-04/0951r1 Submission S. Coffey, et al., WWiSE group Slide 1 WWiSE Group Partial Proposal on Turbo Codes August 13, 2004 Airgo.

S. Coffey, et al., WWiSE groupSlide 1

August 2004 doc.: IEEE 802.11-04/0951r1

Submission

WWiSE Group Partial Proposal on WWiSE Group Partial Proposal on Turbo CodesTurbo Codes

August 13, 2004

Airgo Networks, Bermai, Broadcom, Conexant, STMicroelectronics, Texas Instruments

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S. Coffey, et al., WWiSE groupSlide 2

August 2004 doc.: IEEE 802.11-04/0951r1

Submission

WWiSE contributors and contact WWiSE contributors and contact informationinformation

• Airgo Networks: VK Jones, [email protected]• Bermai: Neil Hamady, [email protected]• Broadcom: Jason Trachewsky, [email protected]• Conexant: Michael Seals, [email protected] • STMicroelectronics: George Vlantis,

[email protected]• Texas Instruments: Sean Coffey, [email protected]

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S. Coffey, et al., WWiSE groupSlide 3

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ContentsContents

• Overview of partial proposal• Motivation for advanced coding• Specification of turbo code• Performance results• Summary

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S. Coffey, et al., WWiSE groupSlide 4

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Overview of partial proposalOverview of partial proposal

• The WWiSE complete proposal contains an optional LDPC code to enable maximum coverage and robustness

• FEC coding fits into the system design in a modular way, and in principle any high-performance code could be used instead of the LDPC code

• This partial proposal highlights an alternative choice for optional advanced code– The system proposed is identical to the WWiSE complete

proposal in all respects except that the optional LDPC code is replaced by the turbo code described here

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S. Coffey, et al., WWiSE groupSlide 5

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Motivation for advanced codingMotivation for advanced coding• Advanced coding translates into higher achievable

throughput at the same robustness• In particular, in most configurations the BCC of rate ¾

and turbo code of rate 5/6 have approximately the same performance

• Thus advanced coding enables a rate increase from ¾ to 5/6 without robustness penalty

• At any given rate, advanced coding enhances coverage and robustness

• In addition, the modularity of the design means that the advantages carry over to every MIMO configuration and channel bandwidth

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S. Coffey, et al., WWiSE groupSlide 6

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Transmitter block diagramTransmitter block diagram

Turbo encoder, puncturer

MIMO interleaver

Symbol mapper

Add pilots

D/AInterpol., filtering, limiter

Upconverter, amplifierIFFT

Add cyclic extension (guard)

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S. Coffey, et al., WWiSE groupSlide 7

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Turbo encoderTurbo encoder

Parity bit 0

Parity bit 1

1+D +D3

1+D2+D3g(D)

=

Turbointerleav

er

1+D +D3

1+D2+D3g(D)

=

Systematic bit

These are the constituent codes used in the 3GPP/UMTS standard encoder

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S. Coffey, et al., WWiSE groupSlide 8

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Turbo code frame formatTurbo code frame format

• The data payload is padded to reach a multiple of 512 bits

• The result is divided into blocks of 2048 bits and 512 bits– Number of 512 bit blocks is in the range 1-4

• All 512 bit blocks are placed at end of frame

• Each block is encoded as a separate turbo codeword

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S. Coffey, et al., WWiSE groupSlide 9

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Turbo interleaver designTurbo interleaver design

• Two interleavers are proposed, one for each supported block size: 2048 and 512 bits

• Each interleaver is a contention-free inter-window shuffle interleaver– Designed to minimize memory contention when code is

decoded in parallel– Equivalent performance to 3GPP/UMTS interleavers

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S. Coffey, et al., WWiSE groupSlide 10

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PuncturerPuncturer

• Parity bits are punctured at regular intervals– Puncture intervals:

• Systematic & tail bits are not punctured; pad bits are punctured

• All code rates are easily derivable from mother code• Other puncturing patterns and setups also work well

Code rate Puncture interval

2/3 43/4 65/6 10

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S. Coffey, et al., WWiSE groupSlide 11

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Puncturing tail codewordsPuncturing tail codewords

• Tailing codewords, i.e., codewords of length 512 information bits, are punctured differently, to a lower code rate– This facilitates low latency decoding: tail codeword

blocks are shorter and can be decoded with fewer iterations, without affecting operating point

• Puncture intervals for tail blocks: Code

ratePuncture interval

2/3 23/4 35/6 3

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S. Coffey, et al., WWiSE groupSlide 12

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Parallelization of turbo decodersParallelization of turbo decoders

• Parallelization:– Divide trellis into a number of (possibly overlapping)

segments and decode each in parallel– Any reasonable number of iterations can be achieved without

affecting latency• End-of-packet latency:

– To achieve full gains of turbo or any iterative code, it is possible to taper codeword length and rate at end of packet

– High throughput naturally requires longer packets and Block Ack

Block 1Block 2

Block 3 . . .

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S. Coffey, et al., WWiSE groupSlide 13

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ComplexityComplexity• Compare to state complexity of 64-state BCC decoding

equivalent throughput• System assumptions: M-state constituent codes, I

iterations, soft-in soft-out algorithm extra cost factor of , BCC duty factor of

• Decoder must process 2 x 2 x I x trellis transitions (I iterations, 2 constituent codes, forward-backward for each, less duty factor), each of which costs M/64 as much– Overall complexity is 4I M/64 times as much as 64-state

code– E.g., with M = 8, I = 7, = 1.5, = 0.7, we have 3.675 times

the state complexity– This does not account for other differences such as memory

requirements and interleaver complexity

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S. Coffey, et al., WWiSE groupSlide 14

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Performance resultsPerformance results

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S. Coffey, et al., WWiSE groupSlide 15

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Simulation setupSimulation setup

• All combinations of:– Channels B, D, AWGN– 20 MHz and 40 MHz– Rate ¾ and rate 5/6– BCC and turbo code

• All simulations under ideal conditions

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S. Coffey, et al., WWiSE groupSlide 16

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Channel model B NLOS, 20 MHzChannel model B NLOS, 20 MHz

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Channel model B NLOS, 40 MHzChannel model B NLOS, 40 MHz

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S. Coffey, et al., WWiSE groupSlide 18

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Channel model D NLOS, 20 MHzChannel model D NLOS, 20 MHz

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Channel model D NLOS, 40 MHzChannel model D NLOS, 40 MHz

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S. Coffey, et al., WWiSE groupSlide 20

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AWGN, 20 MHzAWGN, 20 MHz

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S. Coffey, et al., WWiSE groupSlide 21

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AWGN, 40 MHzAWGN, 40 MHz

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S. Coffey, et al., WWiSE groupSlide 22

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ReferencesReferencesIEEE 802.11 documents:

• IEEE 802.11/04-0886-00-000n, “WWiSE group PHY and MAC specification,” M. Singh, B. Edwards et al.

• IEEE 802.11/04-0877-00-000n, “WWiSE proposal response to functional requirements and comparison criteria,” C. Hansen et al.

• IEEE 802.11/04-0952-00-000n, “WWiSE partial proposal on turbo codes: specification,” S. Pope et al.

Parallelization:

4. K. Blankenship, B. Classon, and V. Desai, “High-throughput turbo decoding techniques for 4G,” Int. Conf. on 3G Wireless & Beyond, 2002.

5. E. Yeo, B. Nikolic, and V. Anantharam, “Iterative decoder architectures,” IEEE Communications Magazine, August 2003, pp.132-140

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S. Coffey, et al., WWiSE groupSlide 23

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References, contd.References, contd.6. Z. Wang, Z. Chi, and K. K. Parhi, “Area-efficient high-speed

decoding schemes for turbo decoders,” IEEE Trans. VLSI Systems, vol. 10, no. 6, pp. 902-912, Dec. 2002

7. S. Yoon and Y. Bar-Ness, “A parallel MAP algorithm for low latency turbo decoding,” IEEE Communications Letters, vol. 6, no. 7, pp. 288-290, July 2002

Interleavers:

8. A. Nimbalker, K. Blankenship, B. Classon, T. Fuja, and D. Costello, “Inter-window shuffle interleavers for high-throughput turbo decoding,” Proc. Int. Symp. on Turbo Codes, 2003.

9. A. Nimbalker, K. Blankenship, B. Classon , T. Fuja, and D. Costello, “Contention-free interleavers,” Proc. Int. Symp. on Info. Theory, 2004.