A Noise Cancelling Resistive Feedback Receiver Front-End

Anders Nejdel

Lund University

Outline

• Introduction

• Implementation

• Results

• Conclusions

Slide 2

Outline

• Introduction

• Implementation

• Results

• Conclusions

Slide 3

Motivation

Slide 4

• Past years, many techniques using the bi-directional frequency translational properties of passive mixer have been demonstrated

• Low noise critical for cellular applications

• Noise cancellation translational techniques

Previous art

• CG-CS Noise-Cancelling LNA

Slide 5

Previous art

[Murphy, ISSCC 2012]

• CG-CS Noise-Cancelling technique used in Receiver Front-End

Slide 5

Noise cancelling feedback LNA

• Wideband input match– By Main path

• Noise cancellation – By Aux. Path

• All processing at RF

• More processing in BB

Slide 6

Shunt Fb Receiver Front-End

• No voltage gain at RF [He, ISSCC 2011]

• Frequency selective input match at Slide 7

Noise Cancelling Principle

• Amplifiers implemented with CS-stages

Slide 8

Noise Cancelling Principle

• Is not resistive, feedback phase can be tuned

Slide 8

Noise cancelling FB Front-End (I)

• Input match

, ,

• Gain main path

• Gain aux. path, ,

Slide 9

Noise cancelling FB Front-End (II)

• Noise cancelled

, ,

• If resistive

• Aux phase tuned [Murphy, CICC 2013]

RFIC –Tampa 1-3 June 2014Slide 10

Outline

• Introduction

• Implementation

• Results

• Conclusions

Slide 11

Implementation

Slide 12

Implementation

Slide 12

LO generation, CML

Slide 13

• CML Div-by-2 core + NAND with inputs

• Fed to all mixers

LO generation, CML

Slide 13

• CML Div-by-2 core + NAND with inputs

• Fed to all mixers

0 1000 2000 3000 40005

10

15

20

25

Frequency / [MHz]

LO c

urre

nt [

mA

]

Outline

• Introduction

• Implementation

• Results

• Conclusions

Slide 14

• STMicroelectronics 65nm process

• Total active area: 0.15mm2

Results

Slide 15

Input Matching, Gain, IIP2

1 1.5 2 2.5 3 3.5−20

−10

0

10

20

30

40

50

60

70

80

90S

11 [d

B],

Gai

n [d

B],

IIP2

[dB

m]

Frequency / GHz

S11

Slide 16

Input Matching, Gain, IIP2

1 1.5 2 2.5 3 3.5−20

−10

0

10

20

30

40

50

60

70

80

90S

11 [d

B],

Gai

n [d

B],

IIP2

[dB

m]

Frequency / GHz

Gain

S11

Slide 16

Input Matching, Gain, IIP2

1 1.5 2 2.5 3 3.5−20

−10

0

10

20

30

40

50

60

70

80

90S

11 [d

B],

Gai

n [d

B],

IIP2

[dB

m]

Frequency / GHz

IIP2

Gain

S11

Slide 16

Noise Figure, IIP3

1 1.5 2 2.5 3 3.5

0

1

2

3

4

5

6N

oise

Fig

ure

[dB

], IIP

3 [d

Bm

]

Frequency / GHz

NF

Slide 17

Noise Figure, IIP3

1 1.5 2 2.5 3 3.5

0

1

2

3

4

5

6N

oise

Fig

ure

[dB

], IIP

3 [d

Bm

]

Frequency / GHz

IIP3

NF

Slide 17

Noise Figure, IIP3 vs. Current

Slide 18

CP1dB, IIP3, IIP2

10M 100M−40

−20

0

20

40

60

80

100

Frequency Offset / [Hz]

CP

1dB

, IIP

3, II

P2

[dB

m]

Chip 1Chip 2IIP2

IIP3

CP1dB

in−band out−of−band

Slide 19

Performance summaryISSCC 2012 ISSCC 2011 RFIC 2013 This Work

Type NoiseCancelling

ResistiveFeedback

Sampling NoiseCancelling

Frequency / [GHz]

0.01-2.7 0.7-2.1 0.5-3 0.7-3.8

NF / dB 1.9 2.2-2.7 6.8-13.2 1.6-3.8Gain / dB 70 37 35 45Current / mA 27-60* 7.3** 208-500* 22.8-34.9Supply / V 1.3 1.3 1.2 1.2IIP3 / dBm +13.5 -3.5 +11.7 +1IIP2 / dBm >54 >40 >58 >75Area / mm2 1.2 0.2 5.9 0.15Process / nm 40 45 65 65

Slide 20

*Incl. Harmonic Rejection, **Excl. LO drivers

Outline

• Introduction

• Implementation

• Results

• Conclusions

Slide 21

Conclusions

• Feedback receiver front-end with frequency selective input match has been demonstrated

• By introducing auxiliary path, noise from main path can be cancelled, and the linearity is better compared to using more current in the main path

• Low noise figure, high linearity, small areaSlide 22

Acknowledgement

Thanks to Swedish Foundation for Strategic Research (SSF) for funding

Chip fabrication was supported by ST-Microelectronics

Slide 23