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KMN <+*(>?@K,AILEFJCL= !#!" !$年!月$日 ODJGEBH&日本科学未来館 新井康夫 ;-8:5-7-2&40436 チームリーダ 1996%7/4043667530.9852 高エネルギー加速器研究機構 )') 素粒子原子核研究所
Transcript of ?@ K , AILEFJCL= - KEKrd.kek.jp/project/soi/documents/091209JSTsympo_arai.pdf@JB;8 -* ; @ NP< • &...
年 月 日日本科学未来館
新井康夫 チームリーダ
高エネルギー加速器研究機構素粒子原子核研究所
OUTLINE
1. SOI SOI Pixel
2. SOI Pixel Detector
3.
1. SOI SOI Pixel
SOI : Silicon-On-Insulator
SOI Transistor
Pixel (Hybrid Pixel)
•
•
•
• -
• (~10 um)
•
• (intelligent)
• (~frame/100ns)
• (monolithic)
• ( 50um~600um)
Silicon-On-Insulator (SOI) Monolithic Pixel
650 μm
(Bulk Wafer)
SOI Wafer
BOX( )
Top Si (SOI Layer)
20-200 nm 50-400 nm
circuit circuit
Physical Support
Bulk and SOI (Silicon On Insulator) Wafer
•
•
•
SOI Pixel
Monolithic Radiation Sensor•
•S/N
•
•
•
•
Handle Wafer
p+ n+
Handle Wafer
Box (Buried
Oxide)
(200 nm)
SOI (40 nm)
650um
Al
p+ n+
Handle Wafer 50~650um
SOI Pixel Process Flow
OKI 0.2 μm FD-SOI Pixel Process
Process 0.2μm Low-Leakage Fully-Depleted SOI CMOS (OKI)
1 Poly, 4 (5) Metal layers, MIM Capacitor, DMOS option
Core (I/O) Voltage = 1.8 (3.3) V
SOI wafer Diameter: 200 mm ,
Top Si : Cz, ~18 -cm, p-type, ~40 nm thick
Buried Oxide: 200 nm thick
Handle wafer: Cz 700 -cm (n-type), 650 μm thick
Backside Thinned to 260 μm, and sputtered with Al (200 nm).
An example of a
SOI Pixel cross section
1st Al
Metal contact & p+ implant
Copyright 2007 Oki Electric Industry Co.,Ltd
Handle Wafer
SOI Pixel X
150 μm
keV ~20 keV X
SOI Pixel
Photon Counting S/N,
...
1
X
1
216 !)
(~1μs 1000
2. SOI Pixel Detector
KEK SOI Multi Project Wafer (MPW) run
(INTPIX)
20 μm x 20 μm pixel
128 x 128 pixels
5 x 5 mm2
10.4 mm
128 x 128 pixCharge
Amp
Dual
Discri Counter
CNTPIX2 Pixel
60x60 um2
~600 Tr/pix
x 128 x 128
= 10,000,000 Trs
p-n junctions
Analog
16b Counter
9b Register DDL
SOI Pixel Laser Images
0.64 mm
2006
32x32
20082.56 mm
128x128
INTPIX2
X-ray Test Chart20
X-ray Image
Position resolution (pixel size=20μm x 20μm)
12.5 16 20
[lp/mm]
INTPIX2
slit w=25μm
25 μm Slit is well separated.
~8 keV X-tay
Vertical (3D) Integration
ZyCube μ-bump bonding (~5 um pitch)
.
μ-bumps fabrication
Copyright 2009 OKI semiconductor Co. Ltd.
Cross sectional view of detector array
(After stacking)
Bulk-Si
-bump Interlayer(LC)
Interlayer (UC)
BOX (LC)
BOX(UC) SOI(UC)
SOI (LC)
adhesive 5 m
• SOI Pixel
•
• SOI
• 3
•
