Seminar Report ‘08
56
fpga 3D
Advance Nano Device Lab. Fundamentals of Modern VLSI Devices 2 nd Edition Yuan Taur and Tak H.Ning 0 Ch5. CMOS Performance Factors.
An Analytic Placer for Mixed-Size Placement and Timing-Driven Placement Andrew B. Kahng and Qinke Wang UCSD CSE Department {abk, qiwang}@cs.ucsd.edu Work.
Scaling I
Deep Submicron CMOS Tech Dsm
The Evolution of Programming Models in Response to Energy Efficiency Constraints
Foundation of EDA 3D IC Book
