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NIT-I
8085 Microprocessor
Contents
General definitions
Overview of 8085 microprocessor
Overview of 8086 microprocessor
Signals and pins of 8086 microprocessor
The salient features of 8085 p are:
t is a 8 !it microprocessor"
t is manufactured with #$%OS technolog&"
t has '6$!it address !us and hence can address up to ('6 ) 655*6 !&tes +6,-./
memor& locations through 0$'5"
The first 8 lines of address !us and 8 lines of data !us are multiple1ed 203 24"
2ata !us is a group of 8 lines 203 24"
t supports e1ternal interrupt reuest"
'6 !it program counter +7/
'6 !it stac pointer +S/
Si1 8$!it general purpose register arranged in pairs: .79 29 ;
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ruction Set
5 instruction set consists of the following instructions:
2ata moving instructions"
rithmetic $ add9 su!tract9 increment and decrement"
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Specifically it has the following functions:
nstruction fetch9 nstruction ueuing9 Operand fetch and storage9 ddress relocation and
.us control"The .D uses a mechanism nown as an instruction stream ueue to implement a
pipeline architecture.
This ueue permits prefetch of up to si1 !&tes of instruction code" hen ever the ueueof the .D is not full9 it has room for at least two more !&tes and at the same time theD
is not reuesting it to read or write operands from memor&9 the .D is free to loo aheadin the program !& prefetching the ne1t seuential instruction"
These prefetching instructions are held in its @@O ueue" ith its '6 !it data !us9 the.D fetches two instruction !&tes in a single memor& c&cle"
fter a !&te is loaded at the input end of the ueue9 it automaticall& shifts up through
the
@@O to the empt& location nearest the output"The D accesses the ueue from the output end" t reads one instruction !&te after theother from the output of the ueue" f the ueue is full and the D is not reuesting access
to operand in memor&"These intervals of no !us activit&9 which ma& occur !etween !us c&cles are nown as
Idle state.
f the .D is alread& in the process of fetching an instruction when the D reuest it to
read or write operands from memor& or CO9 the .D first completes the instruction
fetch!us c&cle !efore initiating the operand read C write c&cle"
The .D also contains a dedicated adder which is used to generatethe (0!it ph&sical address that is output on the address !us" This address is formed med!&
com!ining the current contents of the code segment 7S register and the current contents
of the instruction pointer register"The .D is also responsi!le for generating !us control signals such as those for
memor&
read or write and CO read or write"
#'#%UTION UNIT
The 1ecution unit is responsi!le for decoding and e1ecuting all instructions"
The D e1tracts instructions from the top of the ueue in the .D9 decodes them9
generates operands if necessar&9 passes them to the .D and reuests it to perform the
read or write !&s c&cles to memor& or CO and perform the operation specified !& the
instruction on the operands"2uring the e1ecution of the instruction9 the D tests the status and control flags and
updates them !ased on the results of e1ecuting the instruction"f the ueue is empt&9 the D waits for the ne1t instruction !&te to !e fetched andshifted
to top of the ueue"
hen the D e1ecutes a !ranch or Hump instruction9 it transfers control to a location
corresponding to another set of seuential instructions"henever this happens9 the .D automaticall& resets the ueue and then !egins to fetchinstructions from this new location to refill the ueue
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%IA) $UN%TION" O$ *#N#RA) (UR(O"# R#*I"T#R"
+m+atorregister consists of ( 8$!it registers < and ;9 which can !e com!ined together and used
'6$!it register B" < in this case contains the low$order !&te of the word9 and ; contains the
h$order !&te" ccumulator can !e used for CO operations and string manipulation"
eregister consists of ( 8$!it registers .< and .;9 which can !e com!ined together and used as a '6$!it
ter .B" .< in this case contains the low$order !&te of the word9 and .;
ains the high$order !&te" .B register usuall& contains a data pointer used for !ased9 !ased inde1ed or
ster indirect addressing"
+ntregister consists of ( 8$!it registers 7< and 7;9 which can !e com!ined together and used as a '6$
egister 7B" hen com!ined9 7< register contains the low$order !&te of the word9 and 7; contains
high$order !&te" 7ount register can !e used as a counter in string manipulation and shiftCrotate
ructions"
aregister consists of ( 8$!it registers 2< and 2;9 which can !e com!ined together and used as a '6$
egister 2B" hen com!ined9 2< register contains the low$order !&te of the word9 and 2; contains
high$order !&te" 2ata register can !e used as a port num!er in CO operations" n integer *($!it
tipl& and divide instruction the 2B register contains high$order word of the initial or resultingm!er"
%IA) $UN%TION" O$ "(#%IA) (UR(O"# R#*I"T#R"
c (ointer+S/ is a '6$!it register pointing to program stac"
e (ointer+./ is a '6$!it register pointing to data in stac segment" . register is usuall& used for
ed9 !ased inde1ed or register indirect addressing"
rce Inde. +S/ is a '6$!it register" S is used for inde1ed9 !ased inde1ed and register indirect
ressing9 as well as a source data address in string manipulation instructions"
tination Inde.+2/ is a '6$!it register" 2 is used for inde1ed9 !ased inde1ed and register indirect
ressing9 as well as a destination data address in string manipulation instructions"
si and di registers +Source nde1 and 2estination nde1 / have some special purposes as well" Iou ma&
hese registers as pointers +much lie the !1 register/ to indirectl& access memor&" IouJll also use these
ters with the 8086 string instructions when processing character strings"
!p register +.ase ointer/ is similar to the !1 register" IouJll generall& use this register to access
meters and local varia!les in a procedure"
sp register +Stac ointer/ has a ver& special purpose $ it maintains theprogram stack" #ormall&9 &ou
ld not use this register for arithmetic computations" The proper operation of most programs depends
n the careful use of this register"
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ment registers to the '6$!it address to form a (0$!it address"
segment registers themselves onl& contain themost$significant '6 !its of the (0$!it value that
ntri!uted !& the segment registers" The least significantfour !its of thesegment address are alwa&sLero"
default9 the 2S +data segment/ is used fordata transfer instructions +e"g" %O>/9 7S+codesegment/ iswith control transfer instructions+e"g" N% or 7
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Single$step @lag +T@/ $ if set then single$step interrupt will occur after the ne1t instruction"
Sign @lag +S@/ $ set if the most significant !it of the result is set"
?ero @lag +?@/ $ set if the result is Lero"
u1iliar& carr& @lag +@/ $ set if there was a carr& from or !orrow to !its 0$* in the < register"
arit& @lag +@/ $ set if parit& +the num!er of M'M !its/ in the low$order !&te of the result is even"
& @lag +7@/ $ set if there was a carr& from or !orrow to the most significant !it during last result
ulation
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UNIT-II
DR#""IN* MOD#" O$ 808&
Impied$ the data valueCdata address is implicitl& associated with the instruction"
Direct$ the instruction operand specifies the memor& address where data is located"
Register indirect$ instruction specifies a register containing an address9 where data is
located" This addressing mode wors with S9 29 .B and . registers"
Register$ references the data in a register or in a register pair"
Immediate$ the data is provided in the instruction"
!ased:$ 8$!it or '6$!it instruction operand is added to the contents of a !ase register
+.B or ./9 the resulting value is a pointer to location where data resides"
Inde.ed:$ 8$!it or '6$!it instruction operand is added to the contents of an inde1
register +S or 2/9 the resulting value is a pointer to location where data resides
!ased Inde.ed:$ the contents of a !ase register +.B or ./ is added to the contents
n inde1 register +S or 2/9 the resulting value is a pointer to location where data resides"
!ased Inde.ed wit dispacement:$ 8$!it or '6$!it instruction operand is added to the
contents of a !ase register +.B or ./ and inde1 register +S or 2/9 the resulting value is
a pointer to location where data resides"
#STAD7TO# ST O@ 8086:
2T TA#S@A #STAD7TO#S
G#A< 3 DAOS .IT OA OA2 TA#S@A #STAD7TO#S:
%O>
DS;
OB7;G
B
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#
ODT
S7< 22ASS TA#S@A #STAD7TO#S
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7DTO# TA#S@A #STAD7TO#S
D#7O#2TO#< TA#S@A #STAD7TO#S:
7
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;
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roprocessors and %icrocontrollers
#.ampe&
MO1 A',0705
AAD3Te +npaced !%D n+mer 75
3After AAD , A240 and
3A)49 :75;
Prof.
Kumar
fter the division < will then contain the unpaced .72 uotient and
; will contain the unpaced .72 remainder"
#.ampe&
3A'400< +npaced !%D for < decima3%24092
AAD
DI1 %2
3Ad=+st to inar/ efore division
3A'400>? 4 >?2 4< decima
3Divide A' / +npaced !%D in %23A) 4 @+otient 4 0< +npaced !%D
3A2 4 remainder 4 0> +npaced !%D
AAMnstruction $ % converts the result of the multiplication of two valid
unpaced .72 digits into a valid ($digit unpaced .72 num!er and taes B as an
implicit operand"To give a valid result the digits that have !een multiplied must !e
in the range of 0 3 E and the result should have !een placed in the B register" .ecause
!oth operands of multipl& are reuired to !e E or less9 the result must !e less than 8' andthus is completel& contained in
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roprocessors and %icrocontrollers
AA"
"U! A), !)
AA"
"U! A), !)
AA"
ADDnstruction $
3 *ive A' 40807 :!%D 87;
: a ;
3A) 400 00 4A"%II 9
3!)400 00 4A"%II 53:9 - 5; Res+t &
3A) 4 0000000 4 !%D 0>,%$ 4 03Res+t &
3A)40000000 4!%D 0>
3%$ 4 0 NO !orrow re@+ired
: ;
A) 4 00 00 4A"%II 5
!) 4 00 00 4 A"%II 93: 5 - 9 ; Res+t &3A) 4 00 4 - >
3 in 7s compement %$ 4
3Res+ts &3A) 4 0000 000 4!%D 0>
3%$ 4 orrow needed 6
These instructions add a num!er from source to a num!er
Prof.
Kumar
from some destination and put the result in the specified destination" The add with carr&
instruction 279 also add the status of the carr& flag into the result"The source and destination must !e of same t&pe 9 means
the& must !e a !&te location or a word location" f &ou want to add a !&te to a word9 &ou
must cop& the !&te to a word location and fill the upper !&te of the word with Leroes!efore adding"
#'AM()#&
ADD A),2
AD% %),!)
ADD D', !'
3Add immediate n+mer 2 to content of A)
3Add contents of !) p+s
3carr/ stat+s to contents of %)63Res+ts in %)
3Add contents of !' to contents
3of D'
ADD D', B"IC 3Add word from memor/ at
3offset B"IC in D" to contents of D'
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rocessors and %icrocontrollers
3 Addition of Un "igned n+mers
Prof.
Kumar
ADD %), !) 3%) 4 000 45 decima
3 !) 4 000 4 decima
3 Addition of "igned n+mers
ADD %), !) 3%) 4 000 4 5 decima
3 !) 4 000 4
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