8085 & 8086

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8085 Architecture & 8085 Architecture & Its Assembly language programming Dr A Sahu Dept of Computer Science & Engineering Engineering IIT Guwahati

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Best keynotes for 8085 and 8086 from IIT guhawati

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  • 8085 Architecture &8085Architecture&ItsAssemblylanguageprogramming

    DrASahuDeptofComputerScience&

    EngineeringEngineeringIITGuwahati

  • Outline

    8085 Blockdiagram(DataPath) InstructionSetof8085

    Sampleprogramof8085 Counter&TimeDelayCounter & Time elay StackandSubRoutine Assignment on 8085 Assignmenton8085 Introductionto8086and30x86architecture

  • INTR INTA RST5.5ReSeT6.5

    RST7.5 TRAP SID SOD

    8085MicroprocessorArchitecture

    MUX

    Bus8Bit

    InterruptControl SerialI/OControl

    RST5.5 RST7.5 SID SOD

    W ZB CD EH L

    SP

    MUXIR

    IDecode&/

    tmp RACC

    ALU

    Flag

    SPPC

    I /D tAddlatch

    Inc/Dec.terAddlatch

    M/CEncoding

    TimingandControl

    ALU

    Add Buff Data/Add BuffAddBuff Data/AddBuff

    A15A0

    AddressBus(16bit)

    8085MPU

    Memory I/P

    O/P

    D0

    D7 DataBus(8bit)

    ControlBus(8bit)

  • AssumptionAssumption

    RAMMemory is interfacedRAMMemoryisinterfaced InstructionsarestoredinmemoryO /O di l i i f d di l OneI/OdisplayportisinterfacedtodisplaydataofACC

  • Simple Assembly ProgramSimpleAssemblyProgramMVIA,24H//loadReg ACCwith24HMVIB,56H//loadReg Bwith56HADDB//ACC=ACC+BOUT01H//DisplayACCcontentsonport01HHALT//Endtheprogram// p g

    Result:7A(AllareinHex)DAA operation for Decimal Adjust A+6=10HDAAoperationforDecimalAdjustA+6=10H

  • Flowchart to multiply two numberFlowcharttomultiplytwonumberStart

    LDA 2000 // Load multiplicant to accumulatorLDA2000//Loadmultiplicant toaccumulatorMOVB,A//Movemultiplicant fromA(acc)toBregister

    LDA2001//LoadmultipliertoaccumulatorMOVC,A//MovemultiplierfromAtoC

    MOVC,A//MovemultiplierfromAtoCMVI A 00 // Load immediate value 00 to ACCMVIA,00//Loadimmediatevalue00toACC

    ADDB//AddB(multiplier)withADCRC//DecrementC,itactasacounter

    JNZL//JumptoLifC!=0

    STA2010//StoreresultintomemoryHLT//End

  • Code to multiply two numberCodetomultiplytwonumberLDA2000//Loadmultiplicant toaccumulator

    MOV B A // M l i li f A( ) B iMOVB,A//Movemultiplicant fromA(acc)toBregister

    LDA2001//Loadmultipliertoaccumulator

    MOV C A // Move multiplier from A to CMOVC,A//MovemultiplierfromAtoC

    MVIA,00//Loadimmediatevalue00toa

    L:ADDB//AddB(multiplier)withA// ( p )

    DCRC//DecrementC,itactasacounter

    JNZL//JumptoLifCreaches0

    STA2010//Storeresultintomemory

    HLT//End

  • Delay of InstructionsDelayofInstructions Performance/delayofeachinstruction

    MVI C FFH 7 T StateF RMVIC,FFH7TStateLOOP:DCRC4TState

    JNZ LOOP 7/10 T State

    F RFF R RJNZLOOP7/10TState

    PerformanceofotherINSADD R 4 T S

    F R R

    FADDR4TStateADDM7TState

    FF R

    CALLaddr 18TState

    F=Fetchwith4State,S=Fetchwith6State,S R R W W

    R=MemoryRead,W=MemoryWrite

  • Time Delay LoopTimeDelayLoop Performance/delayofeachinstruction

    MVI C FFH 7 T SMVIC,FFH7TState

    LOOP:DCRC4TStateF RF

    JNZLOOP7/10TState

    TimedelayinloopF R R

    TL=TxLoopTStatesxN10whereT=Systemclockperiod

    N10=Equiv.decimalvalueofcountloadedtoC

    TL=0.5x106 x(14x255)=1.8ms(ignore10TState)L ( ) ( g )

  • Time Delay: Nested LoopTimeDelay:NestedLoop Performance/delayofeachinstruction

    MVI C FFH 7 T StateF RMVIC,FFH7TStateMVID,FFH7TState

    LOOP1: DCR C 4 TStateF RF

    F R

    LOOP1:DCRC4TStateLOOP2:DCRD4TState

    JNZ LOOP2 7/10 TState

    F

    F R RF

    JNZLOOP27/10T StateJNZLOOP17/10TState

    Time delay in Nested loop

    F R RF R R

    TimedelayinNestedloopTNL=N110 xTx(L1_TStates+L2_TStatesxN210 )

  • TrafficLightControl:Counter&DelayLOOP: MVIA01H

    OUT01HLD B DELAY REDLoadDelayRed

    TurnSignaltoRedTurnSignaltoRed

    LDBDELAY_REDCALLDELAY

    y

    TimeDelayTimeDelay

    LoadDelayYellowLoadDelayYellow

    TurnSignaltoYellowTurnSignaltoYellow MVIA02HOUT01HLDBDELAY YELLOW

    TimeDelayTimeDelay

    T Si l t G

    _CALLDELAY

    MVIA03H

    LoadDelayGreenLoadDelayGreen

    TurnSignaltoGreen MVI A 03HOUT01HLDBDELAY_GREENCALL DELAY

    TimeDelayCALLDELAY

    JMPLOOP

  • StackPointer(SP)&StackMemory( ) y Thestackisanareaofmemoryidentifiedbythe programmer for temporary storage oftheprogrammerfortemporarystorageofinformation.

    The stack is a LIFO structureThestackisaLIFOstructure. Thestacknormallygrowsbackwardsintomemory Memorymemory. Programmercandefinesthebottom of the stack (SP)

    Memory

    bottomofthestack(SP)andthestackgrowsupintoreducingaddressrange. Bottom

    TheStackgrowsbackwards

    oftheStack

    backwardsintomemory

  • Stack MemoryStackMemory Growsbackwardsintomemory

    l h b f h k h Bettertoplacethebottomofthestackattheendofmemory

    Tokeepitasfarawayfromuserprogramsaspossible.

    StackisdefinedbysettingtheSP(StackPointer)register.) g

    LXI SP, FFFFH

    This sets SP to location FFFFH (end of memoryThissetsSPtolocationFFFFH(endofmemoryfor8085).

  • Saving Information on the StackSavingInformationontheStack SaveinformationbyPUSHing ontoSTACK Retrieved from STACK by POPing it off RetrievedfromSTACKbyPOPing itoff. PUSHandPOPworkwithregisterpairsonly.E l PUSH B ExamplePUSHB DecrementSP,CopyBto0(SP)D SP C C 0(SP) DecrementSP,CopyCtp 0(SP)

    ExamplePOPB( )

    B C

    F312

    Copy0(SP)toC,IncrementSP Copy0(SP)toB,IncrementSP

    FFFD

    FFFC

    FFFB

    F3

    SPFFFFFFFE 12

  • Stack/LIFOuseinCALL/RET Retrieveinformationbackintoitsoriginallocation TheorderofPUSHsandPOPsmustbeopposite

    8085recognizesoneadditionalregisterpairg g p PSW(ProgStatusword)=ACCandFlag

    BeforeanyroutineCALLdothisPUSH B

    AfterRETURNfromcalldothisPOP PSW

    PUSH DPUSH PSW

    POP DPOP B

  • Subroutines A subroutine is a group of instructions

    That is used repeatedly in different places of theprogram.

    Rather than repeat the same instructions severaltimestimes

    It can be grouped into a subroutine and call from thedifferent locations.

    Instructionsfordealingwithsubroutines. TheCALLinstructionisusedtoredirectprogramp gexecutiontothesubroutine.

    TheRETinstructionisusedtoreturntheexecutiontoh llthecallingroutine.

  • CALL/RETInstruction YoumustsettheSPcorrectlybeforeusingCALL CALL 5000H CALL5000H

    PushthePCvalueontothestackL d PC ith 16 bit dd li d CALL i LoadPCwith16bitaddresssuppliedCALLins.

    RET:LoadPCwithstacktop;POPPC

    PC

    FFFB

    2003

    2000 CALL 5000

    FFFE

    FFFD

    FFFC

    FFFB

    0320

    2000 CALL50002003

    17

    SPFFFFFFFE 20

  • Call by ReferencesCallbyReferences IfSRperformsoperationsonthecontentsofthe registerstheregisters

    Thesemodificationswillbetransferredbackh ll ftothecallingprogramuponreturningfroma

    subroutine.

    Ifthisisnotdesired,theSRshouldPUSHregistersandPOPonreturn.

    18

  • Stack/LIFOuseinCALL/RET Retrieveinformationbackintoitsoriginallocation TheorderofPUSHsandPOPsmustbeopposite

    8085recognizesoneadditionalregisterpairg g p PSW(ProgStatusword)=ACCandFlag

    BeforeanyroutineCALLdothisPUSH B

    AfterRETURNfromcalldothisPOP PWD

    PUSH DPUSH PSW

    POP DPOP B

  • FactorialofanumberLXISP,27FFH//Initializestackpointer

    LDA2200H//Getthenumber

    CPI 02H // Ch k if b i t th 1CPI02H//Checkifnumberisgreaterthan1

    JCLAST

    MVID,00H//Loadnumberasaresult

    MOVE,A

    DCRA

    MOVC,A//Loadcounteronelessthannumber, //

    CALLFACTO//CallsubroutineFACTO

    XCHG//GettheresultinHL//HLwithDE

    SHLD 2201H // Store result // store HL at 0(16bit)SHLD2201H//Storeresult//storeHLat0(16bit)

    JMPEND

    LAST: LXIH,000lH//Storeresult=01

    END: SHLD2201H

    HLT

  • Sub Routine for FACTORIALSubRoutineforFACTORIAL

    FACTO:LXIH,0000H

    MOVB,C//Loadcounter

    BACK: DADD//doubleadd;HL=HL+DE

    DCR BDCRB

    JNZBACK//Multiplybysuccessiveaddition

    XCHG//StoreresultinDE//HLwithDE

    C C //DCRC//Decrementcounter

    CNZFACTO//CallsubroutineFACTO

    RET//Returntomainprogram

  • AssignmentI Writeandexecute8085assemblylanguageprogramtofindvalueofNth Fibonaccinumber(R i i i i b ti(Recursiveversion:usingrecursivesubroutinecall)

    16 bit can support up to 65356 > F 16bitcansupportupto65356>F24

    Deadline 12th Aug 2010 11 55Mid night Deadline:12th Aug2010,11.55Midnight Afterdeadlinegrading:Max5outof10S d TXT i f ith fil SendTXTversionofprogramwithfilenameRollNo.txttoasahu@iitg.ernet.in withAssignment one as subject of emailAssignmentoneassubjectofemail

    Dontsubmitcopiedone:willgetNegativemarks

  • Introductionto8086&i386processor

    16 bit Microprocessor16bitMicroprocessor Allinternalregistersaswellasinternalandexternal data buses were 16 bits wideexternaldatabuseswere16bitswide

    4MainRegister,4IndexRegister,4SegmentR i S R I PRegister,StatusReg,Instr Ptr.

    Notcompatiblewith8085,butwithsuccessors TwoUnitworksinparallel:

    BusInterfaceUnit(BIU)( ) ExecutionUnit(EI)

  • 8086ArchitectureBusInterface

    UnitCBUS

    Q6Q6Q5Q5Q4Q4Q3Q3Q2Q2Q1Q1

    SUM

    CS(CodeSeg Reg)CS(CodeSeg Reg)DS(DataSeg Reg )DS(DataSeg Reg )ES(ExtraSeg Reg )ES(ExtraSeg Reg )SS(StackSeg Reg)SS(StackSeg Reg)

    IP (Intr Ptr) Sequencer( )IP(Intr Ptr)OperandOperandInDirectInDirect

    SequencerExecution

    UnitABUS

    AHAH ALALBHBH BLBLCHCH CLCLDHDH DLDL

    SI(SourceIdx )SI(SourceIdx )DI (Dest Idx)

    TempATempATempBTempBTempCTempC

    ( )DI(Dest.Idx)BP(BasePtr )BP(BasePtr )SP(StackPtr)SP(StackPtr)

    Z(FlagReg)

    ALU

  • 8086 Registers8086Registers

    AX theaccumulatorregister(dividedintoAH/AL) AH AL BX thebaseaddressregister(dividedintoBH/BL) CX thecountregister(dividedintoCH/CL) DX the data register (divided into DH / DL)

    BHBH BLBLCHCH CLCLDHDH DLDL

    DX thedataregister(dividedintoDH/DL)

    SI sourceindexregister.d i i i d i

    SI(SourceIdx )DI(Dest.Idx)DI(Dest.Idx)BP(BasePtr )BP(BasePtr )SP (St k Pt ) DI destinationindexregister.

    BP basepointer. SP stackpointer.

    SP(StackPtr)

    CS (Code Seg Reg)

    Z(FlagReg)

    CS(CodeSeg Reg)DS(DataSeg Reg )DS(DataSeg Reg )ES(ExtraSeg Reg )ES(ExtraSeg Reg )SS (Stack Seg Reg)SS(StackSeg Reg)

    IP(Intr Ptr)IP(Intr Ptr)

  • 8086Architecture ExecutionUnit:

    ALUmaybeloadedfromthreetempregisters(TMPA,TMPB,TMPC)

    Executeoperationsonbytesor16bitwords. Theresultstoredintotempreg orregistersconnectedtothe

    internaldatabus. BusInterfaceUnit

    BIUisintendedtocomputetheaddresses. Twotemporaryregistersp y g indirectaddressing foursegmentregisters(DS,CS,SSandES), Programcounter(IP InstructionPointer),g ( ), A6byteQueueBuffertostoretheprefetchedopcodes anddata. ThisPrefetch Queueoptimizethebususage. To execute a jump instruction the queue has to be flushed since theToexecuteajumpinstructionthequeuehastobeflushedsincethe

    prefetchedinstructionsdonothavetobeexecuted.

  • Next Class AgendaNextClassAgenda Detailof8086Architecture Advanced32bitarchitecture(i386,Pentium,p4)

    Iknowalittlebitofthis Myexpertiseareaofwork

    Programmingmodelforx86architectureProgramming model for x86 architecture 8086Assemblylanguageprogramming MASM / TASM /NASM ( 86 assembler) MASM/TASM/NASM(x86assembler) Ifyoumissthenextclass,willmissalot

  • Th kThanks