No. 05 November 2011
iWave's FPGA IP core:
Giving new life to your
x86 solutions The Intel 80186/88 processor family and its
equivalents from manufacturers like AMD
and NEC, were among the most popular
platforms for product designers for over
two decades. But technology is a shifting
goalpost -- and OEMs and design houses are
having to move legacy applications to newer
processors in the x86 family. Many of them
have found in iWave’s FPGA IP core for the
x86, a boon and a blessing… a painless,
elegant and cost-effective way to migrate
their applications without having to
change their legacy software, even while
avoiding obsolescence of earlier 80186/88
processors and ASICS.
The iWave x86 core is an excellent choice for
embedded applications aimed to cater the growing
needs of industrial, automotive and
communication system solutions. This core can
replace similar parts from manufacturers such as
Intel 80188/80186EB, Intel 80188/80186XL, NEC
V53 and AMD AM188/186ES. iWave’s x86 can be
targeted to any FPGA from leading vendors like
Altera, Xilinx, Actel and Lattice.
The x86 core has a broad set of integrated
peripherals, which helps reduce system
development time and cost and is compatible with
wide range of compilers and debuggers. These
include Memory and peripheral Bus interfaces,
DMA controller (8237), multiple timers (8254), a
programmable interrupt controller (8259),
variable-rate asynchronous serial ports (8251),
flexible chip select unit, and a peripheral control
block.
iWave offers two solutions for obsolete x86
processor-based application without software
modification:
Binary and Socket Compatibility: This option
uses a daughter board to implement the FPGA
and minimal associated logic as an exact pin-to-
pin replacement for the original 80186 Processor.
This approach eliminates both software and
hardware changes, except for the daughter board
itself. It allows you to evaluate the feasibility of
replacing the obsolete chip with FPGA daughter
board. We replace the obsolete 80186 processor
with an iWave FPGA daughter board in the third
party hardware and validate our x86 core. One
can then integrate the other external peripherals
components in the hardware to FPGA after
completing the evaluation of 80186 IP using
daughter board. This reduces the total system
BOM cost as well as board form factor size.
( continued on page 4)
iWave’s SD/SDIO Slave
Controller fast-tracks
many memory/ IO card
applications
Complementing iWave’s solutions in x86 FPGA
IP Cores, is our technology for harnessing
Secure Digital (SD) non volatile memory card
formats and implementing SD Input/Output
(SDIO) functions using slave controllers.
While the host controller core was developed in 2002
and has been licensed to customers across the world,
we are proud to announce availability of an SD/SDIO
slave controller core that supports all SD and SDIO
card features.
The slave controller facilitates the design of SD memory
and SDIO cards and reduces the development time of
any SD memory and SDIO device based applications.
The IP will save a lot of development time spent in
handling the SD bus protocol since such functions are
supported by the core.
This controller handles the SD/SDIO bus protocol on
the card interface side and forwards only the data
transfer requests from the host to the user interface as
simple memory read and write accesses. Other requests
from the SD host are automatically handled by the core
state machines without user interface intervention. The
core also contains the standard SD & SDIO register set
and the core process register accesses locally. The IP
core provides a simple and general-purpose 8-bit
interface to user Interface and operates in a different
clock domain. This slave controller core contains
internal data buffer to improve data bandwidth and
simplify user logic design.
The slave controller IP core supports the
following main features:
Compliant with SD/SDIO Physical
Specification Version 2.00
Supports 1-bit and 4-bit SD Mode
Supports Standard and High Capacity
operations
Supports Default and High Speed Modes of
operation
Supports all mandatory slave registers set
CID Register fields are configurable
Supports only Standard command set
Supports all mandatory SD Command Classes
CRC7 checking/generation for
Command/Response
CRC16 checking/generation for Data transfer
Support Maximum block length of 512 bytes
Supports Single and Multiple block read and
write data transfer
Supports Partial and Misalign Block length
option
IP provides simple and general-purpose 8-bit
interface to user application
A demo platform is also available for the SD/SDIO slave
controller. The iW-SD/SDIO slave demo platform can
be used to evaluate SD to NAND bridge, SDIO to UART
bridge, SDIO to USB bridge or SD/SDIO to any custom
logic / interface through expansion pins.
This board also enables any designers seeking a
development platform to validate their bridge cores.
This provides an ability to work with the SD bus and
act as a useful bridge for target devices which require
access to standard buses like NAND, UART, USB etc.
The SD/SDIO Slave controller core has been licensed
out to multiple customers around the globe. One of our
customer developed a top notch application using iW-
SDIO Slave Controller: an RF reader. With the help of
iW-SDIO slave controller IP, the customer was able to
develop and market the single chip ASIC solution for
an RF reader in a very short period.
Sheik Abdullah A.
Design for EMI & ESD compliance
Raghavendra C, iWave Systems [email protected]
The causes and effects of Electro Magnetic
Interference (EMI) and Electro Static Discharge(ESD)
on circuit boards as well as on final products are fairly
well known. This article, discusses some useful design
procedures that can be followed to reduce EMI, ESD-
related problems, which in turn helps to obtain EMI
& ESD compliances.
EMI is caused by undesirable radiated electromagnetic
fields or conducted voltages and currents. The
interference is radiated by a source emitter and is
detected by a susceptible victim via a coupling path.
The coupling path may involve one or more of the
following coupling mechanisms: 1.Conduction - electric
current 2.Radiation - electromagnetic field 3.Capacitive
Coupling - electric field 4. Inductive Coupling -
magnetic field
EMI Reduction: The following paragraphs highlight
the most common EMI problems and suggest how to
reduce them.
Ground Impedance: At the board level, most problems
involve ground impedance. And even if ground
impedance is not at the root of the problem, it will help
to brought under control before the problem can be
solved.
Consider some signal integrity problem, say that of
shared ground, also known as common impedance
coupling. In a typical situation, the ground path is
shared by two circuits, the noise source and the
receptor is sensitive low-level analogue circuit. The
voltage drop across the ground path, looks like a signal
to the analogue circuit. How much noise can be
tolerated is dependent on the application, but if the
receptor is a sensitive analogue circuit, the allowed
voltage may be quite low. The mathematics of this
problem is: E = IR (Ohm's law). The sensitivity of the
recipient circuit will be dependent resistance & current
across the input of the circuit. The solution is, either
reduce the resistance to near zero or reduce the current
to near zero.
To reduce the resistance to near zero, use a ground
plane. At higher frequencies, the impedance of even a
short trace is three orders of magnitude higher than
that of a ground plane. Therefore, while the impedance
of a short trace at 100 MHz may be 10 ohm or more,
the impedance of a ground plane will be 10 m ohm. So,
1 A of current will bounce the signal ground trace about
10 V, which is clearly unacceptable in any digital signal
case, because voltage drop across trace will acts as a
antenna & radiate the EMI, but the same current will
bounce the ground plane only 10 mV, a level that will
almost always be acceptable.
To reduce the current to near zero is not so easy. The
current in the power path usually can't be reduced.
Presumably, high current exists for a reason other than
to just dissipate power. Rather, the alternative involves
steering the currents along separate paths. This
technique enables the current to avoid sharing return
paths. Illustration shows an iWave layout, to reduce
the resistance of the signal trace & indirectly EMI
emission.
Terminate High-Speed Lines: This completes the
impedance-controlled path. Impedance termination
techniques include the load termination, ac
termination, series termination, and several nonlinear
load terminations. All of these prevent or at least
minimize reflections, but the series impedance
termination is the only technique that puts the
termination at the source, rather than at the load.
Therefore, it is the only termination that inherently
restricts the high frequency from leaving the driver.
Series termination (also known as source termination
or back termination) has some downsides, including a
slower switching time. However, if it can be used, it will
be quieter than the load terminations. Although
primarily an SI issue, it also results in reduced trace
radiation. Illustration shows the iWave schematics for
source & load termination.
Slow the Edge Rates for Critical Signals: The general
rule for both SI and EMI is to use no signal faster than
needed for the desired function. Any high-frequency
components not needed for the function only produce
excess energy that can do nothing but interfere with
neighbouring signals. Excess energy means increased
crosstalk to other adjacent signals and degraded signal
quality. And, if the affected signal leaves the board, this
results in unwanted energy piggybacking onto the
signal lines.
The best place to slow the edge rate is to place a filter
immediately at the driver, such as a series R and shunt
C. Usually, the signal on the circuit board can tolerate
the dc drop. Use as large a series resistance as possible.
If the signal requires impedance termination, it will
require series resistance of about 30 ohm. Some chips
are available with built-in 25 ohm resistors, which are
suitable for this problem. A shunt capacitor is usually
not necessary, because the stray capacitance on the line
and load completes the filter.
http://www.iwavesystems.com/IPs/Design%20for%20EMI_ESD%20compliance.pdf
iWav’s x86 FPGA core.. ( continued from page 1)
Binary Compatibility and Higher
Integration: A soft implementation of the
original 80186 Processor component (CPU core
and integrated peripherals) is programmed onto
an FPGA. High FPGA integration enables low
BOM Cost and reduces board form factor. It
supports to integrate and retarget the other
external peripherals and components. The system
performance can be enhanced with increased
operating frequency and integration.
Many satisfied customers have chosen iWave’s
FPGA IPs for chip replacement application and
one of its implementations is shown in the
illustration on page 1.
In this application, iWave developed and used the
existing IP for other external components like
Custom ASIC function, Multi-Protocol Serial
Controller (8530) and PCI controller implemented
in another FPGA, then integrated the developed
external component IPs with x86 IP and
retargeted it in single FPGA.The core application
involves quick migration of 80186 based designs
to an FPGA Platform, deliver retrofit of existing
systems and maintaining its I/O Compatibility. It
is delivered with RTL Verilog synthesizable code,
comprehensive Test Environment, Technical
Support and Maintenance -- Sheik Abdullah A.
For more details of iWave’s x86 FPGA core
solutions, please mail [email protected] or
see: http://www.iwavesystems.com/processorcores.htm
iWave@ Embedded Technology, Yokohama
iWave was strongly represented at the Embedded Technology 2011 show in Yokohama, Japan, (November 16-18), with senior management joining their local marketing partners in interacting with many industry visitors.
Meet iWave engineers and executives at these international shows in 2011: Designing with Freescale (DwF)
Moscow, Russia Dec 6 2011 at Sokolniki Hotel
http://www.freescale.com/webapp/sps/site/overview.jsp?c
ode=DWF_MKTSOLUTIONSERIES
India Semiconductor Association.
BANGALORE, Dec 16 2011
http://isaonline.org/Technovation_2011/
iWave exhibits at ARM TechCon, USA
iWave’s US partner FirstView Consultants, represented by Dominic (left) and Victor exhibiting iWave’s products at Freescale’ s Partner Booth.
iWave participated in ARM TechCon, Santa Clara(CA)
US between October 25 and 27, exhibiting at
Freescale’s Partner Booth, showcasing the i.mx53 SOM.
Our US sales partner FirstView Consultants, reports
that the iWave offering was well received and they got
a lot of questions about the future plans and the unique
SOM board approach to rapid prototyping. FirstView
had in place, three of their staff members and they
had their hands full responding to all the questions
and enquiries they received. Thanks guys!
www.iwavesystems.com [email protected]
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