x86 Memory

WashingtonWASHINGTON UNIVERSITY IN ST LOUIS

Memory Management and Virtual Memory

Fred Kuhns([email protected], http://www.arl.wustl.edu/~fredk)

Applied Research LaboratoryDepartment of Computer Science and Engineering

Washington University in St. Louis

Fred Kuhns (04/28/23) CS523 – Operating Systems 2

Memory Management• Central Component of any operating system• Hierarchical layering

– registers– cache– primary (main) memory– secondary (backing store, local disk) memory– file servers (networked storage)

• Policies related to memory requirements of processes (i.e. all or part resident)– goals of admitting new processes (long term), memory

allocation (medium term) and processor scheduling (short term) must be considered together.

– Common goal is to optimize the number of runnable process resident in memory


UNIX Memory Management• UNIX uses a demand paged virtual memory

architecture– anticipatory paging is where the OS proactively

pages • Memory is managed at the page level

– page frame or simply frame == physical page– virtual page or simply page

• Basic memory allocation responsibility of the page-level allocator– has two principle clients: paging system and

kernel memory allocator


The Virtual Address Space

Data

Stack

Text (shared)

kernel stack/u area

Data

Stack

Text (shared)

kernel stack/u area

Data

Stack

Text (shared)

kernel stack/u area

proc struct

kernel memory


Process Address Space (one approach)

Kernel stack

Kernel address space

Data

stack

Text (shared)

Process address space

0x00000000

0x7fffffff

0xffffffff


Virtual Memory Goals • Run applications larger than physical memory.• Run partially loaded programs.• Multiprogramming: > one program simultaneously

reside in memory.• Allow relocatable programs – anywhere, anytime• Application Portability:

– Applications should not have to manage memory resources

– Write machine independent code – program should not depend on memory architecture.

• Permit sharing of memory segments or regions. For example, read-only code segments should be shared between program instances.


Virtual Memory Costs• Space: Translation tables and other data used by

VM system reduce available memory to programs• Time: Address translation time is added to the cost

(execution time) of each instruction. • Async: Also page fault handling may result in page

I/O operations increasing latency and possibly affecting unrelated processes.

• Overhead: Memory management operations have been measured to consume up to 10% of the CPU time on a busy system.

• Efficiency: Allocating memory in pages may result in fragmentation


Processes and Memory• Process runs on a virtual machine as defined

by the underlying hardware.• Focus is on Hardware support for a virtual

address spacevirtual addresses independent of physical

memory• Key hardware component is the Memory

Management Unit (MMU)address translation: virtual to physical memorysimplifies context switchingensures virtual address space protection


Memory allocation

Page-levelallocator

physical page

Kernel memoryAllocator

Pagingsystem

Networkbuffers

Datastructures

tempstorage process Buffer cache


Page-level Allocation• Kernel maintains a list of free page

frames (physical memory)• Since kernel and user space programs

use virtual memory addresses, the physical location of a page is not important

• Pages are allocated from the free list• Two principal clients:

paging systemkernel memory allocator


The Paging System• Responsible for allocating and

managing the address space of processes

• Primary goal is to allow processes to run in a virtual address space and to perform address translations transparently

• In demand-paged system the page is the basic unit of memory allocation, protection and address translation. Virtual address is converted to physical page (frame) number and offset.


The Paging System• Requirements:

– Address space management – Address Translation – translation maps

used by MMU, may result in a page fault exception

– Physical memory management – physical memory used as a cache for useful data.

– Memory Protection – HW support exploited– Memory Sharing– Monitoring system load– Other facilities – for example memory

mapped files or shared libraries


pagen

Paged Virtual Memory

page0page1page2page3

pagen

P1 virtualaddress space

page0page1page2page3

P2 virtualaddress spacepage

0page1page2page3page4page5page6page7

Physicaladdress space

AddressTranslation

residentNon-resident Page

frames

Working set

pagen


The Virtual Address Space• Address space along with processes

register context reflects the current state• exec causes kernel to build new process

image:– memory “regions”: text, initialized data,

uninitialized data, modified data, stack, heap, shared memory and shared libraries.

– These regions may differ in protection, initialization and sharing. Protections usually set at page level when allocated.

• Process may start running before any of its pages are resident in memory.


Initial Access to Pages

• Text and initialized data are read in from executable file.

• Uninitialized data are zero-filled pages• Shared libraries from library file• The u area and stacks are setup during

process creation (copied from parent).


Swap Area: VM Backing Store• Swap Area: Pages are copied to the swap

device to free up space for running programs.

• Swapping plus paging for two-tiered scheme

• Requires a swap map to locate swapped out pages

• MMU set dirty bit for page if it has been modified

• Text pages need not be backed by swap


Translation Maps• Hardware Translation Tables – each access to

memory must have the virtual address translated to a physical memory location– Page tables provide the MMU with this mapping– MMU uses TLB to cache recent translations

• Other maps used by the OS:– Address space map – describes a virtual address

space for a process or kernel– Physical memory map – kernel uses to perform

reverse maps and to describe a pages ownership, references and protections.

– Backing store map – used to locate non-resident pages


Replacement Algorithms• Deciding when to reclaim a page: Defined in

terms of criteria used for selecting pages to reclaim

• Reference string: pages referenced over time• fault rate: page faults for some length of a

reference string (i.e. over a period of time)• Algorithms evaluated based on effectiveness

on collected (real) reference strings• Implementations usually require sample

reference strings• Local versus global policies:

– Most UNIX implementation use a global replacement policy but guarantee a minimum


Working set Model• Assumes a slowing changing locality of reference

– processes tend to localize references to a small set of pages– implies that if a page was recently accessed then it will be

accessed again in the “near” future– if working set is in memory then few page faults

• A simple model is a least recently used (LRU) policy:– if a page has been accessed “recently” then assume it will be

need again else assume it will not be needed– else free pages not accessed “recently”

• Implement using an approximate set: – number of pages held versus fault rate. – Set high and low water marks

• Most kernels implement a scheme whereby pages are periodically freed and placed on a free pool.

• Prepaging: working set resident before scheduling process


Working set model• Reference pattern nonuniform but clustered• w(k,t) = pages (set) corresponding to the last k

memory references, at time t.– w(1,t) w(2,t) … w(n,t)– |w(k,t)| = size of w is monotonically increasing with k

• Practical considerations lead to using a processes virtual time rather than k recent references– consider page references in past virtual time units.– clear R bit every clock tick, it is set when a page is

referenced– on page fault if R is set then update virtual time of last use

else set age = current_vt – last_use_vt. If age > then reclaim page else it is in the working set.

continue to scan all entriesif no entries found then reclaim oldest. If all had R bit set then randomly select page to reclaim.


WSClock Algorithm• Similar to clock algorithm with circular list

and clock hand.• scans list and if R = 1 then it is cleared and

the current virtual time is written.• advance hand• if R = 0 then check timestamp > T then

replace (if dirty schedule for write else put on free list)

• Alternatively, can use two clock hands


Example Paging System

SwapUFS

app1

Disk

DRAM

CPUUnitialized data

Allocated virtual pages

Text and initialized data

Stack and heap

app1Address space

Low Address(0x00000000)

High Address(0x7fffffff)

Initialized Data

Text (shared)

Unitialized DataHeap (Dynamic)

stack (dynamic)Environment


Hardware Requirements• Protection: Prevent process from changing

own memory maps• Residency: CPU distinguishes between

resident and non-resident pages• Loading: Load pages and restart interrupted

program instructions• Dirty: Determine if pages have been

modified


Memory Management Unit

• Translates Virtual Addresses– page tables– Translation Lookaside Buffer (TLB)

• Page tables– One for kernel addresses– one or more for user space processes– Page Table Entry (PTE) one per virtual page

• 32 bits - page frame, protection, valid, modified, referenced


Translation

• Virtual address: – virtual page number + offset

• Finds PTE for virtual page• Extract physical page and adds offset• Fail (MMU raises an exception - page fault):

– bounds error - outside address range– validation error - non-resident page– protection error - not permitted access


Some details• Limit Page Table size:

– segments– page the page table (multi-level page table)

• MMU has registers which point to the current page table(s)– kernel and MMU can modify page tables and registers

• Problem: – Page tables require perhaps multiple memory access

per instruction• Solution:

– rely on HW caching (virtual address cache)– cache the translations themselves - TLB


Translation Lookaside Buffer• Associative cache of address translations• Entries may contain a tag identifying the process as

well as the virtual address. – Why is this important?

• MMU typically manages the TLB• Kernel may need to invalidate entries,

– Would the kernel ever need to invalidate entries?• Contains page table entries that have been most

recently used– Functions same way as a memory cache

• Given a virtual address, processor examines the TLB– If present (a hit), the frame number is retrieved and the real

address is formed– If not found (a miss), page number is used to index the

process page table


Address Translation - General

CPU

MMUcache

virtual address

Physical address

data

Global memory


Address Translation Overview

Virtualaddress

MMU

context table pointercontext

Page tables

physicaladdressTLB cacheCPU


Cache/Main-Memory StructureMemoryAddress

13

02

2n - 1

Block

Block(k words)

Word Length

SlotNumber Tag Block

0

21

C - 1

Block Length(k words)

(a) Main Memory

(b) Cache


Page Table Entry

• Resident bit indicates if page is in memory• Modify bit to indicate if page has been altered

since loaded into main memory• Other control bits• frame number, this is the physical frame

address.

Y bitsX bitsvirtual page numberVirtual address offset in page

Z bitsframe numberM R control bitsPage Table Entry (PTE)


Example 1-level address Translation

12 bits20 bitsvirtual page number

Virtual address

offset in page

current page table register(Process) Page Table

add

frame numberM Rcontrol bits

DRAMFrames

X offsetFrame X

PTE


SuperSPARC Reference MMU

Context TblContext TblPtr register

12 bitContext register

PTD

6 bits 12 bits8 bits 6 bitsindex 1 index 2 index 3 offset

virtual pageVirtual address

Level 1

PTD

• 12 bit index for 4096 entries• 8 bit index for 256 entries• 6 bit index for 64 entries

PTD

Level 2

PTE

Level 2

offsetPhysical pagePhysical address

4096

12 Bits

• Virtual page number has 20 bits for 1M pages• Physical frame number has 24 bits with a 12 bit offset,

permitting 16M frames.

24 Bits


Page Table Descriptor/EntryPage Table Descriptor

Page Table Entry

Page Table Pointer

2 1 0

type

Phy Page Number

8 7 6 5 4 2 1 0

typeC M R ACC

Type = PTD, PTE, InvalidC - CacheableM - ModifyR - ReferenceACC - Access permissions


SVR4 VM Architecture• File Mapping – Two interpretations

– Used as a Fundamental Organizational scheme. Entire Address Space viewed as a collection of mappings to different objects (such as files)

– Applications map a file into their address space• Types of Mappings: Shared and Private• Memory Object: represents mapping from region a of

memory to backing store (swap, local/remote file, frame buffer)

• VM provides common framework, Memory objects provide the specific implementation– operations such as fetching and flushing page to backing

store


VM• Address space is a set of mappings to data objects.

– An address is only valid if it is mapped to an existing object• File system provides the name space and

mechanisms to access data. – Uses the vnode layer to interact with the file system.– Each named memory object is associated with a vnode (but a

vnode may map to many objects)– Unnamed objects represented by anonymous objects

• Physical memory is treated as a cache for the data objects

• Page is the smallest unit of allocation, protection, address translation and mapping.– Address space can be thought of as an array of pages


File Mapping Versus read/write

Buffer Cache

Copy

Copy

Virtual Memory System

Copy

P1 pages

mmap(): Address spaceread/write: Copy

process

Process P2Traditional Approach

process

Process P1VM Approach


Fundamental Abstractions (data structs)

• Page (struct page)• Address Space (struct as)• segment (struct seg)• Hardware Address Translation (struct hat)• Anonymous Page (struct anon)


VM Architecture

Proc A virtual address

AddressTranslation

physicaladdress

Physical page& offset

AS layer

vnode layeranon layer

swap layer page layer...

fault

HAT

page tables

Persistent storage

fork/exec


Physical Memory• Divided into paged and non-paged regions• Paged region described by an array of

page structures, each describing one logical page (cluster of hardware pages)

• Each physical page (page frame):– described by struct page– mapped to some memory object, with the

memory object represented by a vnode– page identity or name = <vnode, offset>


Page Struct• page struct stores offset and pointer to

corresponding vnode• may sit on several linked lists, has 3 sets of pointers

– hash table of vnode and offset– vnode contains list of all object pages currently in memory– free page list or list of pages waiting to be written to

backing store• Reference count• synchronization flags (lock, wanted, in-transit)• Copies of modified and referenced bits• HAT field used to locate all translations for this page


AS Layer• High-level abstraction describing the

virtual address space.• References a linked list of seg (segment)

structs that represent non-overlapping page-aligned address regions

• Contains the hat structure and a hint to the last segment that had a page fault

• Supports two set of operations: those operating on the entire address space and those that affect ranges within the space.


Segment Drivers• Segments represent mappings between backing

store and address regions• Segment represents an abstract base class with

specific drivers being derived classes.• seg struct contains pointer to

– a seg_ops vector, these represent the virtual functions. i.e. the type dependent interface to the class.

– Methods = {dup, fault, faulta, setprot, checkprot, unmap, swapout, sync}

– type-dependent data structure which hold private data• Each segment defines a create routine


Segment Drivers• Different types: seg_vn, seg_map, seg_dev,

seg_kmem– seg_vn: vnode segment, maps to regular files

and anonymous object.– Seg_map: One in system. Use by kernel for

transient file mappings for implementing read/write.


Process Address Space

struct as { segment list hint struct hat {}}

struct seg { base size}

struct segvn_data {}

seg_vn ops






struct segu_data {}seg_u ops

text

data

stack

u area

proc struct


Anonymous Pages• Page with no permanent storage, created when

process write to a MAP_PRIVATE object• Pages can be discarded with process terminates or

unmaps the page.• Swap device used as backing store• Example: initialized data pages when modified

become anonymous pages • Related but distinct concept is an anonymous object.

– one anonymous object in system represented bu the NULL vnode pointer (/dev/zero) and is the source of all zero-filled pages.

– unitialized data and stack regions are MAP_PRIVATE to it– Shared memory regions are MAP_SHARED to it– anonymous object pages are anonymous pages


Anonymous

Swap info vnodeSwap device

anon[]

page

page

free l

ist

anon refarray

00

0

segvn_data

seg

as

vnode

pagePer page protect

anon_map

one entry foreach page

in swap

one for eachswap device

pointer toanon andfreelist

vnode layer read and writes pages

to swap device


Hardware Address Translation Layer

• Isolates all hardware-dependent code from rest of VM

• Responsible for all address translations– setup and maintain mappings used by MMU (page tables,

directories etc)– each process has it’s own set of translations

• uses struct hat which is part of the as struct• Operations

– hat layer: hat_alloc, hat_free, hat_dup, hat_swapin, hat_swapout (build/rebuild tables when swapping)

– range of pages: hat_chgprot, hat_unload, hat_memload, hat_devload

– all translation of a page: hat_pageunload, hat_pagesync (update modified and referenced bits using values in page struct)


Misc Topics• Pagedaemon implements page reclamation

(replacement) policy. Uses two-handed clock algorithm

• Swapping - swapper daemon will swap processes when space gets below a threshold


Misc Topics Cont

• Non-page-aligned backing store• Virtual swap space in Solaris

(swapfs)– includes physical memory– dynamic reallocation


Assessment - Advantages• Modular design – OO style interface

encapsulating functionality• Portability – HAT layer simplifies porting• Sharing – copy-on-write sharing,

MAP_SHARED, shared file mappings– Lightweight file access – mmap– Enabling shared library support

• Leveraging existing interfaces (vnode)• Integrating VM and buffer cache• Facilitates break point insertion with

MAP_PRIVATE


Assessment - Disadvantages• Increased table size and maintenance requirements• Increased time to read program text and initialized

data from file rather than swap• Performance problems due to longer code paths,

complexity and indirection• disk address are computed dynamically• Invariant interfaces to abstractions may lead to

inefficient implementation (no control over implementation)

• copy-on-write may not be faster than anticipatory copying

• Swap space allocated per-page basis preventing optimizations like clustering and prepaging


Improvements

• Reduce high fault rate caused by lazy evaluations

x86 Memory

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