1
Analog to Digital ConversionAnalog to Digital Conversion
ADC EssentialsADC Essentials
A/D Conversion TechniquesA/D Conversion Techniques
Interfacing the ADC to the IBM PCInterfacing the ADC to the IBM PC
DAS (Data Acquisition Systems)DAS (Data Acquisition Systems)
How to select and use an ADCHow to select and use an ADC
A low cost DAS for the IBM PCA low cost DAS for the IBM PC
Chap 0 2
Why ADC ?Why ADC ?
Digital Signal Processing is more popular Easy to implement, modify, … Low cost
Data from real world are typically Analog Needs conversion system
from raw measurements to digital data Consists of
Amplifier, Filters Sample and Hold Circuit, Multiplexer ADC
Chap 0 3
ADC EssentialsADC Essentials
Basic I/O Relationship ADC is Rationing
System x = Analog input /
Reference• Fraction: 0 ~ 1
n bits ADC Number of discrete output
level : 2n
Quantum LSB size Q = LSB = FS / 2n
Quantization Error 1/2 LSB Reduced by increasing n
Chap 0 4
Converter ErrorsConverter Errors Offset Error
Gain Error
Can be eliminated by initial adjustments
Integral Linearity Error
Differential Linearity Error
Nonlinear Error Hard to remove
Chap 0 5
TerminologiesTerminologies
Converter Resolution The smallest change
required in the analog input of an ADC to change its output code by one level
Converter Accuracy The difference between
the actual input voltage and the full-scale weighted equivalent of the binary output code
Maximum sum of all converter errors including quantization error
Conversion Time Required time (tc) before
the converter can provide valid output data
Converter Throughput Rate The number of times the
input signal can be sampled maintaining full accuracy
Inverse of the total time required for one successful conversion
Inverse of Conversion time if No S/H(Sample and Hold) circuit is used
Chap 0 6
More on Conversion TimeMore on Conversion Time
Input voltage change during the conversion process introduces an undesirable uncertainty
Full conversion accuracy is realized only if this uncertainty is kept low below the converter’s resolution
Rate of Change x tc resolution
Example 8-bit ADC Conversion Time: 100sec Sinusoidal input
Rate of change
Let FS = 2A
Limited to Low frequency of 12.4 Hz
Few Applicationsmax( )2n c
dV FS
dt t
sin(2 )iv A ft
2 cos(2 ) 2idv fA ft fAdt
22
2
112.4
2
nc
nc
AfA
t
f Hzt
Chap 0 7
S/H increase PerformanceS/H increase Performance
S/H (Sample and Hold) Analog circuits that
quickly samples the input signal on command and then holds it relatively constant while the ADC performs conversion
Aperture time (ta) Time delay occurs in S/H
circuits between the time the hold command is received and the instant the actual transition to the hold mode takes place
Typically, few nsec
Example 20 nsec aperture time
Reasonably good for 100sec converter
162.17
2n a
f KHzt
Chap 0 8
Analog Input SignalAnalog Input Signal
Typically, Differential or Single-ended input signal of a single polarity
Typical Input Range 0 ~ 10V and 0 ~ 5V
If Actual input signal does not span Full Input range
Some of the converter output code never used
Waste of converter dynamic range
Greater relative effects of the converter errors on output
Matching input signal and input range Prescaling input signal
using OP Amp In a final stage of
preconditioning circuit By proportionally
scaling down the reference signal
If reference signal is adjustable
Chap 0 9
Converting bipolar to unipolarConverting bipolar to unipolar
Using unipolar converter when input signal is bipolar Scaling down the input Adding an offset
Bipolar Converter If polarity information in
output is desired Bipolar input range
Typically, 0 ~ 5V
Bipolar Output 2’s Complement Offset Binary Sign Magnitude …
Input signal is scaled and an offset is added
scaled
Addoffset
Chap 0 10
Outputs and Analog Reference SignalOutputs and Analog Reference Signal I/O of typical ADC
ADC output Number of bits
8 and 12 bits are typical 10, 14, 16 bits also available
Typically natural binary BCD (3½ BCD)
• For digital panel meter, and digital multimeter
Errors in reference signal From
Initial Adjustment Drift with time and
temperature
Cause Gain error in Transfer
characteristics To realize full accuracy of
ADC Precise and stable
reference is crucial Typically, precision IC
voltage reference is used• 5ppm/C ~ 100ppm/C
Chap 0 11
Control SignalsControl Signals
Start From CPU Initiate the conversion
process BUSY / EOC
To CPU Conversion is in
progress 0=Busy: In progress 1=EOC: End of
Conversion
HBE / LBE From CPU To read Output word
after EOC HBE
• High Byte Enable LBE
• Low Byte Enable
Chap 0 12
A/D Conversion TechniquesA/D Conversion Techniques
Counter or Tracking ADC Successive Approximation ADC
Most Commonly Used Dual Slop Integrating ADC Voltage to Frequency ADC Parallel or Flash ADC
Fast Conversion Software Implementation Shaft Encoder
Chap 0 13
Counter Type ADCCounter Type ADC Block diagram
Waveform
Operation Reset and Start Counter DAC convert Digital output
of Counter to Analog signal Compare Analog input and
Output of DAC Vi < VDAC
• Continue counting Vi = VDAC
• Stop counting Digital Output = Output of
Counter Disadvantage
Conversion time is varied 2n Clock Period for Full
Scale input
Chap 0 14
Tracking Type ADCTracking Type ADC
Tracking or Servo Type Using Up/Down
Counter to track input signal continuously
For slow varying input
Can be used as S/H circuit By stopping desired
instant Digital Output Long Hold Time
Disabling UP (Down) control, Converter generate Minimum (Maximum)
value reached by input signal over a given period
Chap 0 15
Successive Approximation ADCSuccessive Approximation ADC
Most Commonly used in medium to high speed Converters
Based on approximating the input signal with binary code and then successively revising this approximation until best approximation is achieved
SAR(Successive Approximation Register) holds the current binary value
Block Diagram
Chap 0 16
Successive Approximation ADCSuccessive Approximation ADC
Circuit waveform
Logic Flow
Conversion Time n clock for n-bit ADC Fixed conversion time
Serial Output is easily generated Bit decision are made
in serial order
Chap 0 17
Dual Slope Integrating ADCDual Slope Integrating ADC Operation
Integrate Reset and integrate Thus
Applications DPM(Digital Panel Meter),
DMM(Digital Multimeter), …
Excellent Noise Rejection High frequency noise
cancelled out by integration Proper T1 eliminates line
noise Easy to obtain good
resolution Low Speed
If T1 = 60Hz, converter throughput rate < 30 samples/s
1
0
T
iv dt2
0
t
rV dt1 ( ) 2i AVG rT v t V
2( )
1i AVG r
tv V
T
Chap 0 18
Voltage to Frequency ADCVoltage to Frequency ADC
VFC (Voltage to Frequency Converter) Convert analog input
voltage to train of pulses Counter
Generates Digital output by counting pulses over a fixed interval of time
Low Speed Good Noise Immunity High resolution
For slow varying signal With long conversion
time Applicable to remote data
sensing in noisy environments Digital transmission
over a long distance
Chap 0 19
Parallel or Flash ADCParallel or Flash ADC
Very High speed conversion Up to 100MHz for 8 bit
resolution Video, Radar, Digital
Oscilloscope Single Step Conversion
2n –1 comparator Precision Resistive
Network Encoder
Resolution is limited Large number of
comparator in IC
Homework #5-1 어떻게 동시에 비교가
되는지를 설명하라 .
Chap 0 20
Software ImplementationSoftware Implementation
Implementation with software using microprocessor Counting Shifting Inverting Code Conversion …
Limited Practical Use Availability of Good
performance with very reasonable Cost
Chap 0 21
Shaft EncoderShaft Encoder Elctromechanical ADC
Convert shaft angle to digital output
Encoding Optical or Magnetic Sensor
Applications Machine tools, Industrial
robotics, Numerical control
Binary Encoder Misalignment of mechanism
causes large error Ex: 011 111 (180deg)
Gray Encoder Misalignment causes 1 LSB
error
Chap 0 22
Interfacing the ADC to the IBM PCInterfacing the ADC to the IBM PC
Interface Operations Most-recent-data Scheme
At end of conversion it updates an output FIFO
Automatically start new conversion
CPU read FIFO to acquire most recent data
Start-and-wait Scheme CPU initiate conversion
every time it needs new data
CPU check EOC until conversion is finished
Using CPU Interrupt CPU initiate conversion
every time it needs new data
CPU can proceed to do other thing
ADC interrupt CPU when conversion is complete
CPU goes to ISR
See Chapter 3, For more information about 8259A
Chap 0 23
Interface SoftwareInterface Software
Memory Mapped Transfers ADC is assigned in
Memory Space MRD, MWR signal MOV instruction
More complex decoding logic
I/O Mapped Transfers ADC is in I/O Space
IOR, IOW signal IN, OUT instruction
More Simple decoding logic
DMA (Direct Memory Access) CPU release system bus
by the request of DMA DMA controller carried out
data transfer by generating the required addresses and control signals
The system bus control reverts back to CPU when data transfer is finished
DMA is useful High Speed High volume data transfer
Disk Drive interface
Chap 0 24
Interface HardwareInterface Hardware
Parallel Data Format Three state output
buffer in ADC To Interface ADC
CPU + Decoding logic• To generate Chip
Select signal
• To generate Start Signal
• To Check EOC signal
Serial Data Format Asynchronous Serial
transmission to send data over long distance to a monitoring station
UART is commonly used
Interfacing 10 or 12 bit ADC Transfer data in chunks
of 8 bits one after another
Chap 0 25
DAS (Data Acquisition System)DAS (Data Acquisition System)
DAS performs the complete function of converting the raw outputs from one or more sensors into equivalent digital signals usable for further processing, control, or displaying applications
Applications Simple monitoring of a
single analog variable Control and Monitoring
of hundreds of parameters in a nuclear plant
Chap 0 26
Single Channel SystemSingle Channel System
Transducer Generate signal of low
amplitude, mixed with undesirable noise
Amplifier, Filters Amplify Remove noise Linearize
S/H (Sample and Hold) Reduce uncertainty error
in the converted output when input changes are fast compared to the conversion time
In Multi-channel system To hold a sample from
one channel while multiplexer proceed to sample next one
Simultaneous sampling of two signal
Chap 0 27
Sample and Hold CircuitsSample and Hold Circuits
Care in selecting hold capacitor Ch Low Value
Reduces acquisition time Increase Droop
High Value Minimize Droop Increase acquisition time
Choose capacitor to get a best acquisition time while keeping the droop per conversion below 1 LSB
Chap 0 28
Commercially Available S/HCommercially Available S/H
Chap 0 29
Multi-channel SystemMulti-channel System
Analog multiplexer and a ADC Low cost
Local ADCs and digital multiplexer Higher sampling rate
Chap 0 30
How to select and use an ADCHow to select and use an ADC
Range of commercially available ADCs
Guidelines for using ADCs Use the full input range
of the ADC Use a good source of
reference signal Look out for fast input
signal changes Keep analog and digital
grounds separate Minimize interference
and loading problem
Chap 0 31
Commercially available monolithic Commercially available monolithic ADCsADCs
Chap 0 32
Commercially available hybrid ADCsCommercially available hybrid ADCs
Chap 0 33
A low cost DAS for the IBM PCA low cost DAS for the IBM PC
Multi-channel system Less than $100 ADC0816 from
National Semiconductor
Constant, repetitive rate
1000 samples/s
Generating clock For starting ADC
conversion For causing interrupt Make a pulse stream
from TCLK with short pulses of duration = ½ x BCLK/4
TCLK from 8253 Timer/Counter
• Wide pulse
Chap 0 34
ADC circuit for ADC circuit for PC prototype PC prototype boardboard
SCSLCT(Start Conversion SeLeCT): Latched trough port 30CHSCSLCT = H Selection of 30AH (/E10) start conversionSCSLCT = L TCLK’ start conversion
INTSLCT(INTerrupt SeLeCT): Latched trough port 30CHINTSLCT = H EOC cause IRQ2INTSLCT = L No Interrupt CPU read Status register (Port 309H) to check EOC
Chap 0 35
Status RegisterStatus Register
For polling TCLK and EOC signal
Port 309H (/E9) Polling of EOC results
in a low level after the data from ADC have been read
Chap 0 36
Throughput rate calculationThroughput rate calculation
4.77MHz / 8= 596KHz
Chap 0 37
Accuracy CalculationAccuracy Calculation
Better than 1% accuracy is ensured Actual accuracy with smooth input signal at room
temperature will be better than 0.5%
Chap 0 38
Basic Program for Controlling ADCBasic Program for Controlling ADC
Sampling rate < 200 samples/sBecause OUT and IN instruction in Basic takes 5ms
Chap 0 39
C Programming for Controlling ADCC Programming for Controlling ADC
Sampling from ADC channel 1 at 5ms interval and sending each sampled data point to the DAC
Chap 0 40
Homework #5-2Homework #5-2
Prototype board 의 회로 도를 참고하여 앞의 C program 이 수행되는 과정을 해석하라 예를 들면 Outp(CNTRL,5) 가 수행되면 회로도
에서 어떤 신호가 구동되는지 등… .
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