Week 13: FIT1001 Computer Systems S1 2006 1 Important Notice for Lecturers This file is provided as...

Week 13: FIT1001 Computer Systems S1 2006 1

Important Notice for Lecturers

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FIT1001- Computer Systems

Lecture 13

Exam Revision

www.monash.edu.au

FIT1001- SG13

SG4: CPU Internal Bus Organisation

Exam Revision


SG4 : Learning Objectives

• Identify that registers, ALU, control unit and buses are components of a simple central processing unit

• Describe how the components are joined by buses to form a datapath

• Understand that clock pulses are used to regulate the operational timing of buses and the components in the datapath

• Describe the fetch–decode–execute cycle and explain how this is used to perform instructions in a simple digital computer program

• Demonstrate the operation of a simple computer using a simulator (MARIE)


CPU Organisation

• The two principal parts of the CPU– Datapath

> ALU & Registers connected via bus to main memory

– Control Unit> Determines which actions to carry out according to the values in

a program counter register and a status register

• Buses– Set of wires that act as a shared but common data path– Point-to-point / multipoint– Data, Address & Control lines– Bus transactions & bus hierarchy

• Clocks synchronize the activities of the CPU– Clock cycle times & CPU throughput


CPU Organisation

• I/O Subsystem– Memory-mapped / Instruction based

• Memory– Address is unsigned integer, byte or word addressable– 2N addressable units of memory will require N bits to address

each unit

• Interrupts– Alter the normal program execution – Maskable/non-maskable types


A Computer Simulator : MARIE• MARIE architecture

– 2’s complement data (16 bits/word)– 4K words main memory, 7 registers(AC, MAR, MBR, PC, IR, InReg,

OutReg), 16 bit ALU– ISA (4 bit opcode + 12 bit address instruction format)– RTL of instruction sequence

• Instruction Processing– The fetch-decode-execute cycle steps

> MAR <-- PC> IR <- M[MAR] , PC <-- PC+1> MAR <-- IR[11-0] & decode Instruction (IR[15-12])> MBR <-- M[MAR] > Execute Instruction

• Assembly language programming• Assemblers

– Convert mnemonic instructions (assembly language) to machine code in two passes (first pass symbol table, 2nd pass final m/c code)

• Hard-wired Control Unit Vs microprogrammed CU

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FIT1001- SG13

SG5: Instruction Set Architectures

Exam Revision


Learning Objectives

• Define instruction types and formats• Identify instruction operands and the addressing modes

used• Write machine and assembler programs for a simple

computer simulator• Explain the use of basic instruction types such as arithmetic,

logic, branch and subroutine call• Identify the features of several machine instruction sets


Instruction Formats

• Instruction sets are differentiated by– Bits/instruction, operands/instruction– Operands => types, location & storage in CPU– Types of instructions & data each instruction can process

• ISAs are measured by– Main memory space occupied by a program– Instruction length, number & complexity

• ISA designs – Stack architecture

> Uses a stack to execute instructions> Operands implicitly refer to values on top of the stack

– Accumulator architecture > One operand of a binary operation is implicitly in the accumulator

– General purpose register (GPR) architecture> Uses sets of general purpose registers> Memory–memory, Memory–memory, Load-store


Instruction Formats – Operands / Length• Most common instruction formats include 0, 1, 2 or 3 operands

– OPCODE only (0 addresses)– OPCODE + 1 address (usually memory)– OPCODE + 2 addresses (registers, or one register and one memory)– OPCODE + 3 addresses (registers, or combinations of registers and

memory)• 0 operand ISA uses the stack

– All insertions and deletions are made from the top of the stack– Most instructions consist of opcodes only

> Special instructions for adding and removing elements from the stack have just one operand: Push X and Pop X

> Only certain instructions can access memory, all others must use the stack for operands

> postfix notation (RPN Z = XY+ [infix notation Z = X+Y])– Eg., For operations requiring two operands the top two elements of the stack

are used


Instruction Formats

• 1 operand instruction

– a register (normally the accumulator) is implied as the destination for the results of the instruction (eg. LOAD X )

• 2 & 3 operand instructions– the first operand is the destination (eg. LOAD R1, X )

• Instruction types– Data movement, Arithmetic, Boolean, Bit manipulation, I/O,

transfer control, special purpose (string & array manipulation)

• Addressing– Data types (numeric, non-numeric)– Addressing modes

> Immediate, direct, indirect, register, register indirect, indexed or based, stack


Addressing modes

Summary of basic addressing modes

www.monash.edu.au

FIT1001- SG13

SG6: Program Execution Concepts

Exam Revision


Learning Objectives

• Understand the concepts of program execution and control the flow of a program

• Understand the basic concepts of the stack • Understand the basic concepts of both hardware

and software interrupts• Describe how interrupts alter the normal flow of

program execution in a computer system• Define interrupt vectors and develop interrupt

handlers• Compare the characteristics of RISC machines

versus CISC machines


Program Control Instructions

• Branch Instructions– Unconditional / Conditional

• Skip Instructions• Procedure Call Instructions

– Nesting – Three common locations to storing the return address

> Register

> Start of called procedure

> Stack


Stacks

• Ordered set of elements within a memory location / block

• Access is via the top of the stack one element at a time

• LIFO list• Registers used

– Stack pointer, Stack base, Stack limit

• PUSH and POP are used to put new values on the stack and remove them from the stack

• Passing Parameters


Interrupts

• Signals that cause CPU to suspend what it is doing and transfer control to Interrupt handler/service routine

• Interrupt capabilities are provided by one or more special control lines to the processor

• Most common method is to check for a pending interrupt request at the beginning of each fetch-decode-execute cycle

• Interrupt Processing– Suspends program in progress

– Saves pertinent information on stack

– branches to interrupt handler program

– On return from ISR, restores control to original program

• Interrupt types– Processor/internal, hardware, software


Interrupts

• Interrupt use– Notify that an external event has occurred– Signal completion

– Allocate CPU time– Indicate abnormal event– Software

• Multiple Interrupts– Vectored interrupts: include address of interrupting device– Priorities determine the order of service– Unmaskable interrupts cannot be ignored, maskable

interrupts may be disabled


Real World Architectures

• Intel– CISC based architecture– Acronym for Complex Instruction Set Computer– Large number of instructions – Complicated instruction performing multiple operations per

instruction– Can slow down system performance

• MIPS– RISC based architecture – Acronym for Reduced Instruction Set Computer– Smaller number of instructions with each instruction

performing one operation

• RISC Vs CISC

www.monash.edu.au

FIT1001- SG13

SG7: Memory Components and Organisation

Exam Revision


Learning Objectives

• Describe different types of primary memory• Understand the concepts of hierarchical memory

organization• Understand how each level of memory contributes

to system performance, and how the performance is measured

• Explain the concepts of cache memory, virtual memory, paging, address translation and memory segmentation


Types of Memory

• Primary/Main memory– RAM => volatile

> Read/write> Static => high speed, expensive, high power dissipation> Dynamic => high density, cheap, slow, needs regular refreshing

– ROM => non-volatile> PROM, EPROM, FLASH

• Secondary– Magnetic disks, tapes and optical disks

• Memory Hierarchy– best performance at the lowest cost– Small, fast storage elements (registers, cache) are kept in the CPU,

larger, slower main memory is accessed through the data bus– Larger, (almost) permanent storage in the form of disk and tape

drives are still further from the CPU– Hierarchical pyramidal structure


Cache Memory

• purpose is to speed up accesses by storing recently used data closer to the CPU

• Small, fast, content addressable• Mapping

– processor uses special mapping schemes that converts a main memory address into a cache location

– Determines where the data is placed in cache

– Provides a method for the CPU to find data in the cache

• Schemes> Direct

– block X of main memory maps to cache block Y = X mod N, where N is the number of cache blocks

> Fully Associative– Instead of placing memory blocks in specific cache locations based on

memory address we could allow a block to go anywhere in cache

> Set Associative– Instead of mapping anywhere in the entire cache, a memory reference can

map only to the subset of cache slots


Direct Mapped Cache

• Example: a system using 15-bit main memory addresses, 64 block of cache of 8 words each

– memory has 215 / 23 = 212 blocks– field sizes are:

> 6 bits for the block (26 = 64)> 3 bits for the word (23 = 8)> 6 bits for the tag

– If the CPU generates the main memory address

> Would look in cache block 0> If the CPU finds the tag of 000010, the word at offset 4 (1002) in

the block is returned


Fully Associative Cache

• Cache would have to fill up before any blocks are evicted• A memory address is partitioned into only two fields: the tag

and the word• Suppose, we have 14-bit memory addresses and a cache

with 16 blocks, each block of size 8

• With fully associative cache an algorithm is used to determine which block to evict from the cache


Set Associative Cache

• Suppose we have a main memory of 214 bytes– This memory is mapped to a 2-way set associative cache

having 16 blocks where each block contains 8 words– Since this is a 2-way cache, each set consists of 2 blocks,

and there are 8 sets– Thus, we need 3 bits for the set, 3 bits for the word, giving 8

leftover bits for the tag:


Cache Replacement Policies / Effective Access Time and Hit Ratio

• Replacement policy – Is invoked with fully associative and set associative cache when it

becomes necessary to evict a block from cache– Least Recently Used algorithm

> Keeps track of the last time that a block was assessed and evicts the block that has been unused for the longest period of time

– First-in, first-out (FIFO)> The block that has been in the cache the longest, regardless of when it

was last used

– Random > Picks a block at random and replaces it with a new block

• EAT – Effective Access Time– EAT for a two-level memory is given by:

> EAT = H AccessC + (1-H) AccessMM.– H is the cache hit rate – AccessC: access time for cache– AccessMM: access time for main memory


Virtual Memory

• Virtual memory enhances performance by providing greater memory capacity

– A portion of a disk drive serves as an extension of main memory

– Allocate physical memory to processes in fixed size frames– Page table stores the physical location of each virtual page of

the process => Paging

Valid bit of 0 means page not in main memory, 1 indicates that it is


Address Translation

• Suppose a system has the following:– Virtual address space of 28 words– Physical memory of 4 page frames– Pages are 32 (25) words in length– Virtual address contain 8 bits– Physical address contain 7 bit (4 * 32 = 128, 27)

> So we have 28 / 25 = 23 or 8 virtual pages, so the page field has 3-bits

> Each page is 32 (25) words long, so 5-bits are used for offset


Effective Access Time

• We said earlier that effective access time (EAT) takes all levels of memory into consideration

– Virtual memory is also a factor in the calculation– Also have to consider page table access time– Eg., Suppose a main memory access takes 200ns, the page

fault rate is 1%, and it takes 10ms to load a page from disk> EAT = 0.99(200ns + 200ns) + 0.01(10ms) = 100,396 ns

> Consider if 100% of pages found in main memory– EAT = 1.00(200ns + 200ns) = 400ns

» Double access time» Accessing page table costs an additional memory access

because it is stored in main memory


Segmentation

• Instead of dividing memory into equal-sized pages virtual address space is divided into variable-length segments

• Memory accesses are translated by providing a segment number and an offset within the segment

• Fragmentation– Both paging and segmentation can cause fragmentation

www.monash.edu.au

FIT1001- SG13

SG8: Input/Output Organisation and Standadrds

Exam Revision


Learning Objectives

• Explain common methods used to store data in computer systems

• Describe the structure and function of each component of a computer system, and Input-Output devices in detail

• Understand operational principles of common peripheral devices such as tape, disk, cdrom drives, video displays, printers and other input devices including mice, keyboards and scanners

• Explain how computers perform input and output as part of a computer program

• Identify the factors that contribute to computer system performance in the organisation of peripheral devices


I/O Architectures

• I/O can be controlled in four general ways – Programmed I/O reserves a register for each I/O device

> Each register is continually polled to detect data arrival which means CPU must execute instructions in a loop

– Interrupt-Driven I/O allows the CPU to do other things until I/O interrupt occurs

> Interrupt Service Routine contains necessary I/O handling instructions

– Direct Memory Access (DMA) offloads I/O processing to a special-purpose circuit that takes care of the details of bus contention and memory access

> Often requires dual-ported memory access system

– Channel I/O uses dedicated I/O processors


I/O Bus Standards

• Interface cables– Interface cables connect the device to the controller and may

be parallel or serial– Parallel connections move data bits simultaneously in

separate duplicated circuits– Serial connections move data bits sequentially over a single

circuit

• Small Computer System Interface (SCSI)• IBM PC, XT, AT and ATAs• Peripheral Component Interconnect (PCI)• USB• HIPPI


Magnetic Disk Technology

• Magnetic disks offer large amounts of durable storage that can be accessed quickly

• Disk drives are called random (or direct) access storage devices, because blocks of data can be accessed according to their location on the disk

– Seek time + rotational delay = access time– Transfer rate gives us the rate at which data can be read

from the disk– Average latency is a function of the rotational speed:


Magnetic Disk Technology & Optical Disk

• Floppy (flexible) disks are organized in the same way as hard disks, with concentric tracks that are divided into sectors

– Physical and logical limitations restrict floppies to much lower densities than hard disks.

– A major logical limitation of the DOS/Windows floppy diskette is the organization of its file allocation table (FAT)

> The FAT gives the status of each sector on the disk: Free, in use, damaged, reserved, etc

• Optical disks provide large storage capacities very inexpensively, CD-ROM, DVD, and WORM

– CD-ROM can hold at most 650MB of data, DVDs can hold as much as 8.54GB

• Magnetic tapes are digital, and provide multiple gigabytes of data storage, recording methods used are serpentine and helical scan


Printer and Display Devices & Input devices

• Dot-matrix / Vector graphics• Image Description Languages

• Video Display• Display Technology

– CRT, LCD, Plasma, DLP

• Printer Technology– Impact, Laser, inkjet, plotter, thermal

• Input devices– Keyboard, mouse, optical scanner, digital camera

www.monash.edu.au

FIT1001- SG13

SG9: Introduction to Operating Systems

Exam Revision


Learning Objectives

• explain the evolution of modern operating systems from early serial and batch systems to present day - include basic operations of each category and important developments;

• discuss the important design factors and considerations involved with operating system design;

• define the terms process and thread;• discuss the four main services provided by the operating

system; process management, resource management (CPU, memory and I/O), GUI and security / protection;

• explain how processes and threads are structured and processed by the CPU – includes process / thread states and scheduling methods;


Important developments

• Operating System is the program that controls the execution of applications programs and acts as an interface between applications and the computer hardware

• Evolution– Early Serial & Simple/ Multiprogrammed Batch Systems

– Time sharing systems

• Modern Operating System– Real time systems

– Multiprocessor systems

– Distributed/networked

– Personal Computers

– Multi-tasking systems

– Multi-user systems


Operating System Design Issues

• Kernel architecture– Microkernel and monolithic

• Process / Thread Management– concept of Process & thread is is fundamental to the structure of

operating systems

• Memory Management– Storage management (isolation, allocation, protection & longterm

storage) includes file systems & virtual memory

• Information Protection and Security• Scheduling and Resource Management

– Processor, memory & I/O

• System Structure– Modular, hierarchical structure


Operating System Services

• The Human Interface– Hardware developers, applications developers & user

• Process Management– Process Execution Scheduling (long-term) – Context Switching

> Short-term => FCFS, SJF, Round-robin, Priority

– CPU utilization / throughput / turnaround time / waiting time / response time are factors

• Resource Management– Processor access is determined by scheduler– Memory

> Virtual memory extending RAM> Main memory allocation / tracks free frames> Performs “garbage collection”


Operating System Services

– I/O> services to allow input and output to occur

> protection and access issues including mediating calls from several processes to the same I/O device

– Controls disk files> Supports file creation and deletion / directory creation and

deletion / file and directory manipulation

> Mapping to secondary storage devices

– Protected Environments> Virtual machines, Subsystems, Partitions

• Security and Protection– Resource protector

www.monash.edu.au

FIT1001- SG13

SG10: File Systems Features and Formats

Exam Revision


Learning Objectives• Explain the concepts and purpose of files and directories in a

file system• Discuss various file naming restrictions imposed by common

file systems• Understand sequential, direct and indexed file access methods;• Explain the concept and function of volumes / partitions in a

file system• Discuss the various attributes stored in reference to files,

directories and volumes / partitions• Define the terms current / working directory, absolute and

relative paths• Discuss file access control methods• Explain allocation methods – contiguous, linked and indexed• Explain how free space is managed in a file system• Explain and illustrate practical implementations of modern file

system, FAT16/32, NTFS, UFS/ExtFS and ISO 9660


Purpose of File Systems

• Partition and format disks to store and retrieve information

• Enable files to be organized through directories and folders

• Establish file naming conventions• Provide utilities to maintain and manage the file

system and storage media• Provide for file and data integrity• Enable error recovery or prevention• Secure the information in files


File System Basics

• File system consists of– A collection of files storing related data– A directory structure to organise all files in the system

• File concept– Operating system abstracts from the physical properties of its

storage devices to define a logical storage unit, the FILE– User’s perspective

> File is the smallest allotment of logical secondary storage

> Data cannot be written unless it is in a file

– a file is a sequence of bits, bytes, lines or records, the meaning of which is defined by the file’s creator and user

– A file has a certain defined structure


File System Basics

• File Attributes– Name, Identifier, Type, location, size, protection, data for protection,

usage and monitoring– Information about files are kept in a directory structure

• File Operations– Creating, writing, reading, deleting, truncating and

repositioning – Open file table– Opening and closing files– locking an open file

• File Types / Structure– Common technique is to include the type as part of the file name– Files need to conform to structures so related programs / operating

system can read / execute them– Internal File Structure (Logical & Physical record)


File Access Methods

• Common methods are:– Sequential

> Information in the file is processed in order, one record after the other

> Suitable for tape drives and not appropriate for random access devices

– Direct> File is made up of fixed length logical records> Based on disk model since it allows random access to any file

block (which is a relative block number)

– Index> Generally use a form of index – pointer to various blocks> Allows us to search a large file doing little I/O


Directory Structure

• A disk can be used for the entire file system or multiple file systems, with volumes that contain a file system

• A directory contains information such as name, location, size, type etc for all files on that volume

• Typical operations on a directory:– Search for a file / match patterns– Create a file – Delete a file – List a directory – Rename a file– Traverse a file system


Directory Structure

• Single Level Directory– Limitations

> All files must have unique names> Problems increase with more files and more users

• Two Level Directory– System has a master file directory (MFD) / each user has a user file

directory (UFD)

> Path name – uniquely identifies a file (eg., user1/cat)> Can have the same file names for different user files> Efficient searching> No grouping capability – isolates users / no sharing of files


Directory Structure

• Tree Structured Directories– Extend directory structure to a tree of arbitrary height

– Allows users to create their own subdirectories / organize files

– Tree has a root and every file has a unique path name

– A directory (or subdirectory) contains a set of files or subdirectories

– Current directory (working directory) – location of a particular file

– Path names can be absolute or relative

• Acyclic-Graph Directories– Allows directories to share subdirectories and file

– The same file or subdirectory may be in two different directories

– Can be implemented with a directory entry called a LINK

– Deletion of a file can be an issue – if you delete the actual file then the links remain, but with nothing to point to


File Access and Control

• File owner/creator should be able to control:– What can be done– By whom– Types of access

• Common method of access control is to base access of identity of user

– Most general scheme is based on access control lists (ACL)– Recognize three classifications of users (owner, group,

universe)– Access modes of read, write and execute are given to each

group


Implementing File Systems

• A file system is generally composed of many different levels– I/O control, Basic file system, File organization module, Logical file

system

• On-disk structures– Boot control block, Volume control block, A directory structure per

file system, A per file control block

• In-memory structures– An in-memory mount table, In-memory directory structure cache,

System wide open file table, Per process open file table

• Selection of directory allocation and directory management algorithms significantly affects the file systems

– Hash Table, Linear list are algorithms used– Allocation methods used are contiguous, linked and indexed– Free space management include bit vector, linked list, grouping and

counting

www.monash.edu.au

FIT1001- SG13

SG12: Introduction to System Systems

Exam Revision


Learning Objectives

• Describe the relationship between machine language, assembler code and high level language

• Understand the use of system software tools including assemblers, linkers, loaders, editors, compilers, interpreters and debuggers

• describe the concept of relocatability of program code• explain some methods used to define the syntax of

computer languages including syntax (“railroad”) diagrams and BNF

• list the stages of high level program compilation• differentiate between link/loader systems that perform early,

late and dynamic binding


The Program Translation Process


Compilers

• Translates high-level language (source code) into low-level instructions (machine code)


Interpreters

• Interpreters produce executable code from source code in real time, one line at a time.

• Consequently, this not only makes interpreted languages slower than compiled languages but it also affords less opportunity for error checking.

• Interpreted languages are, however, very useful for teaching programming concepts, because feedback is nearly instantaneous, and performance is rarely a concern.

• Examples of interpreted languages– Java, BASIC, LISP


Linkers

• Construct single executable program from multiple object code files compiled at different times

• Searches program libraries to find library routines used by the program

• Determines the memory locations that code from each module will occupy and relocates instructions by adjusting absolute references

• Resolves references among files• link editors perform two passes: The first pass

creates a symbol table and the second resolves references to the values in the symbol table.


Loaders

• Loads binary files that have been linked into main memory

• Program is ready for execution• There are four link/loading scenarios

– Absolute code generated at the end of a development cycle, not requiring link editing, eg. Single-user embedded control environment

– Using a loader several times without repeat linking, early binding

– Using memory efficiently and linker/loader functions are combined, late binding

– Using dynamic link library modules, dynamic binding


Dynamic Linking

• Dynamic linking is when the link editing is delayed until load time or at run time.

• External modules are loaded from from dynamic link libraries (DLLs).

• Load time dynamic linking slows down program loading, but calls to the DLLs are faster.

• Run time dynamic linking occurs when an external module is first called, causing slower execution time.

– Dynamic linking makes program modules smaller, but carries the risk that the programmer may not have control over the DLL.

www.monash.edu.au

(end)

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