2009 IEEE International Advance Computing Conference (IACC 2009)Patiala, India, 6-7 March 2009

VHDL Modeling of Wi-Fi MAC Layer for Transmitter

A.M.Bhavikattil Dr.Subhash.Kulkarni2Research Scholor Dr.MGR University, Chennai JPNCE,Mehabobnagararvindbhavikatti com subhashsk@gmail.com

Abstract: Point], most installations will be formed by several cells,For the wireless communication in radio where the Access Points are connected through some kind

frequency range , IEEE 802.11 is one of the many of back bone[ called Distribution System or DS],typicallystandards available. IEEE 802.1 lb defines the Medium Ethernet, and in some cases wireless it self. The wholeAccess Control Layer [MAC] for wireless local area interconnected wireless LAN including the different cells,networks. The wireless local area network, WLAN is their respective Access Points and the Distributiondominated by IEEE 802.11 standard. It becomes one of System, is seen to the upper layers of the OSI model, as athe main focuses of the WLAN research. Now most of the single 802 network and is called in the standard asongoing research projects are simulation based as their Extended Service Set[ESS]. The standard also defines theactual hardware implementation is not cost effective concept of a portal, a portal is a device that interconnects

The main core of the IEEE 802.1 lb standard are an 802.11 and another 802 LAN [3].the CSMA\CA, Physical and MAC layers. But only MAC However, all is not prefect in the WLAN world.layer for transmitter is modeled in this paper using the Offering nominal bit rates of 11Mbps [802.1 lb] andVHDL. The VHDL (Very High Speed Hardware 54Mbps(802.1la and 802.11g) the effective throughputsDescription Language ) is defined in IEEE as a tool of are actually much lower-owing to packet collisions,creation of electronics system because it supports the protocol overhead , and interference in the increasinglydevelopment , verification , synthesis and testing of congested unlicensed bands at 2.4GHz and 5GHz. Furtherhardware design, the communication of hardware design more, operation in these bands entails a strict regulatorydata and the maintenance, modification and procurement transmit power constraint, thus limiting range and even bitof hardware. It is a common language for electronics rates beyond a certain distance [5]design and development prototyping

The main purpose of the IEEE 802.11 standard is 2. Overview of MAC layer:to provide wireless connectivity to devices that require afaster installation, such as Laptops, PDA's or generally The 802.11 protocol covers the MAC andmobile devices inside a WLAN. MAC procedures are physical layer, the standard currently defines a singledefined here for accessing the physical medium, which MAC which interacts with three physical layers [ all ofcan be infrared or radio frequency. them running at 1 and 2 Mbits\sec]i.e. Frequency Hopping

Spread Spectrum in the 2.4GHz band, Direct SequenceHere Wi-Fi MAC Transmitter module is Spread Spectrum in the 2.4GHz band and Infrared[3].

divided in to 5 blocks i.e. Data Unit Interface block, Beyond the standard functionality usually performed byController block , Pay Load Data Storage block , MAC MAC layers, the 802.11 MAC performs other functionsHeader Register block , Data Processing block. In this that are typically related to upper layer protocols, such aspaper, we are considering only two blocks i.e. Payload Fragmentation, Packet retransmissions andData Storage block& Data Processing block. So, other Acknowledgements. The MAC layer defines two accessblocks i.e. Data unit Interface block, Controller block, methods, the Distribution Coordination Function [DCF]MAC Header Register block are not discussed further in and Point Coordination Function [PCF] [3].this paper.

MAC layer acts as an intermediate stage betweenKey words: WLAN, IEEE 802.11, VHDL, Wi-Fi MAC layer, FPGA Data Link Layer and Physical Layer. It's primary

responsibility is to provide a reliable mechanism for1. Introduction to IEEE 802.11 exchanging transacting packets [Data, Control and

Due to technology advancement in the 21St Management] on the communication channel throughCentury, wireless Communication had been most popular physical layer [RF layer]. MAC layer performs thechoices of communication. More and more people are following transmit functions i) Generation of variousturning to wireless due to the convenience of mobility. MAC frames [Data, Control, and Management] ii)An 802.11 LAN is based on a cellular architecture where Generation of 16 bit HEC for Header and 32 bit CRC forthe system is subdivided in to cells, where each cell payload data iii) CRC and HEC generation for payload &[called Basic Service Set or BSS] is controlled by a Base Header respectively iv) FIFO buffer interface forStation [called Access point, or in short AP].Even though transmitter v) Serializing the data using byte to bitthat a wireless LAN may be formed by a single cell, with converter vi) MAC transmitter controller state machinea Single Access Point[ can also work without an Access implementation.

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Medium Access control [MAC] layer performs ___________________function like i) On transmission, assemble data in to aframe with address and error detection fields ii) On --------_reception, disassemble frame and perform addressrecognition and error detection iii) Govern access to the r...........l ..

LAN transmission medium Physical layer performs|functions like. i) Encoding/decoding of signals ii) IPreamble generation/ removal [for Synchronization].iii)Bit transmission I reception iv) Includes specifications ofthe transmission medium [4].

3. Wi-Fi features:

Wi-Fi Wireless Fidelity [802.11 family ofstandards] for LAN. WiFi is designed for local area-networks, which are private, local (short range), but where-competing cable systems run at very high speeds. WiFi .

achieves greater than lOMBit/ Sec throughput for a user inmany circumstances. Currently WiFi carries more userdata than any other wireless technology. Evolution is to gofurther, faster and at lower power consumption [2]

Upstart wireless LAN [WLAN] technologiesF-under the 802.11 (Wi-Fi) umbrella have leapfrogged K-towards cellular and other efforts edging towards broad I0band wireless [ such as 802.16! WiMAX ] and have led to Hthe first wide spread, commercially successful broadband L Li Lwireless access technology . Infact, Wi-Fi is a runaway A a

success around the globe [5] LUAU1117 1~VI- II

4. Proposed Block Diagram of Transmitter

As discussed earlier, the transmitter block is Fig 4 Block diagram of transmitterdivided in to five parts as shown in fig 4 and only twoblocks are considered for VHDL simulation. These arePayload Data Storage block & Data Processing block. 4.1a. FIFO Module

4.1 Payload Data storage block:Syst::lk IFl ~~~~~~~~~FIFOD.at.[7:0]

Is further divided into two modules i.e. FIFOmodule & Data length counter module. These modules are F.11

discussed as shown below. A F

FIFORdcE-4W

Fig. 4.1 a FIFO ModuleDescription:

FIFO Module is shown in Figure 4.1 a. Itcontains the data to be transmitted. It acts as thesynchronizing tool i.e. the data are entered at high rate butit is retrieved at the slower rate. Here, we have taken 32x8bits of data storage. Here, the first incoming data goes outfirst.

It acts on two clocks i.e. SysClk and ByteClk, ontheir rising edge and when the FIFO is enabled the inputdata is retrieved. The Full and Empty signals shows thestate of the FIFO.

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4.1b. Data length counter module 4.2c CRC Module:

BytClk

SysRs . BvtClk WF +

D-tC.0-rr Sys~Rst

DaXEa DaltaLenC(llt

~~~~~~~~~~~~~~~~~~~~~~~~~~~SBit

~~CRCO-er

Fig. 4.1 b Data length counter module Fig 4.2 c CRC ModuleDescription:

Fig. 4.1 b shows Data length conter module. This Description:module acts as a counter. It simply accepts a Max Number Fig. 4.2 c shows CRC Module. The CRC is 32 bitand counts the data being transmitted. When the number field containing the 32-bit Cyclic Redundancy Check.of the data is equal to the Max Number then the Data When the TxEna signal is high, then the CRC data isCountOver signal is turned high. It acts at every rising given out and when the CRCCIEna is high, then the CRCedge of the clock. is calculated. CRCOver is high when the transmission of

the data is over. This module helps in error freetransmission of the data with proper reliability.

..d ein to three modules i.e, Serialzer. 5. VHDL Modeling of Wi-Fi MAC layer for

HEC and CRC and they are discussed in details as shown Transmitter:belowC There are two types of widely used hardwarebelow. description languages i.e. Verilog HDL with C-language4.2a.Serializer Module: like syntax, easy to learn and another is VHDL which

follows the structure of ADA programming language.Clk Verilog and VHDL each have about 50% share of the

Sy__t_ commercial user base [8].S,E.,.

Seriliser VHDL is acronym for VHSIC i.e. very largeS,Ldl scale integrated circuit hardware description language. It

Data[7:O] _ 41 + was standardized by IEEE. VHDL is used for synthesisconstruct and implement a design on silicon. VHDL isused for simulation to imitate real world scenarios for

Fig. 4.2 a Serializer Module verification [9].

Description: Due to high computational complexity ofWLAN systems and the capabilities of state-of-the-art

Fig. 4.2 a shows serializer Module. It is basically microprocessor s, an implementation based solely inthe parallel input and serial out put device. Various data microprocessors would require a large number ofselected at the multiplexer are serially obtained. It occurs components and would be cost inefficient FPGAs withat every rising edge of the clock and when the serial their spatial / parallel computation style can significantlyenable is high. The output bit is designated as SBit. When accelerate complex parts of WLANs and improve theall the output bits are over, then the End of Conversion i.e. efficiency of discrete components implementations[I0].EOC goes high. The design has been synthesized using FPGA .

This device belongs to the virtex -E group of FPGAs from4.2b.HEC Module: xilinx. Two types of FPGAs ( Field Programmable Logic

Array ) are available i.e.i) Reprogrammable (SRAM-CM___. based ) from Xilinx, Altera, Lattice and Atmel ii) One-

BvtClk16 BIE:COut time Programmable (OTP) from Actel, Quick logic.FPGAs are reasonably cheap, with short design

TxEIla |HEC' cycle and are reprogrammable. They are more flexibleSBit ,EDE:COqr-r than PLDs and more compact than MSI/SSI. FPGAs have

HECCal]Ena ~5evolved to meet new application demands with featureslike i) Newer devices incorporate entire CPUs i.e. Xilinx

Fig. 4.2 b HEC Module Virtex II pro has 1-4 power PC CPUs ii) Have carryDescription: chains to have a better support for multi-bit operations iii)

Fig. 4.2 b shows HEC Module. This module Have integrated memories, such as block RAMs in theproduces the Head Error Check bits. It is the 16-bit error devices we use iv) Have specialized units, such ascheck bit. The HEC is calculated when the HRCCalEna is Multipliers to implement functions that are Slow/high and when the TxEna is high then the HEC data is inefficient in CLBs [Configurable Logic Blocks] [6]transmitted along with the PLCP Header Bits. FPGA enables high performance due to the following

factors i)Tailoring to desired bit-width (ii) Ease ofapplying varying sample rates (iii) Flexibility of parallelexecution of basic functions due to uniform architectural

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resources [7] Here, two modules of Wi-Fi MAC layer 6.1.d Simulation results of HEC module:transmitter are chosen and implemented on an FPGAdevice. The details of simulation are shown in tablet.

4 6 8 1Q 10 10 lq 10

Table 1 Details of Sim ulation Clk

Device Family VirtexEDevice ~XcQffle T

aeSp e........................... ........d........................................................................................................................................

.........................................................................................................................................................Sit1Ilo -L l....... ........... le................................................................................T............p e......................................

DL............erilo..........................D.........DSimulator odel~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~.......................... ...............................................................m....................H.............................................................l3enerated Simulation Language VHDL HECR~~~~~~~~g 33D1

serializer, HEC, CRC modules~~~~~~~........ repetvey l tesrlesrM ls are.........................sim

FIFORegEna D5~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~HCOtOOEF ~

FIFOEna D7~~~~~~~~~Fg6 d i uato n ictstatw e teT E a shg

matain es i.e 20Oaa legh cu tr o ue nControl 1 212 1 2 1 2~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~l

Full ...Figr6.seSimulationsindicte,latithenendioutransmissionso

dRCatEa,CCOegoshh

6. .a Si ua1o ul sobF od l:Sim

OntReg ~~~~~~~~~~ 003 000 001 002003 000 001 002 003 000 000~~~~~~~~~~~~~~~~~~000000 X860EDB 1012 X XF14125D1ata20C n30tOnver........................................................................................................................................................................

Fig.. 6..lb.Simulation..Indicate..that,..when.theCnoCnofOdata issignal~~~~~~~~~~~~~~~~~~~~~~~~~~J JL ...........................I............................................................................. ...................................................

SysRst

Data A5 78~~~~~~~~~~~~~~~~~~~~~~~~~DSe a......................................................0 0..........................................................7 8..................

SBIt~ ~ ~ ~ ~~ ~ ~ ~ ~ ~ ~ ~~~~~~~~~~~~~~~DigE a..

......2 09...........IE EE...........In ter................tio...............Ad.............ce.......C mp...........ting...........C fe ce.......................(IA.........CC.......2 9).........

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7. Conclusions:

Various individual modules of Wi-Fi Transmitterhave been designed, verified functionally using VHDL -simulator, synthesized by the synthesis tool .This designof the WiFi transmitter is capable of transmitting theframe formats. The formats include all 802.11 frames i.e.MAC frame, RTS frame , CTS frame and ACK frame.The transmitter is also capable of generating error-checking codes like HEC and CRC. It can handle variabledata transfer

Acknowledgement:

Authors would like to thank Sri. Sanjeev .KVHDL Lab In charge, ECE Department, REC, Bhalki forhis Technical support while preparing this paper.

References:

1) W.L.Pang, K.W.Chew, F.Choong, E.S.Teoh, "VHDLModeling of the IEEE 802.1 lb DCF MAC",Procedings of the 6th WSEAS InternationalConference on Instrumentation, MeasurmentCircuits and systems, Hangzhou, China, April 15 -17,2007.

2) Broadband wireless Access, Institution ofEngineering and Technology Seminar, 6th Dec 2006,London, UK

3) Pabolo Brenner , "A Technical tutorial on theIEE802.11 Protocol"

4) Shambhu Upadhyaya, " Wireless NetworkSecurity,"Lecture 5, University at Buffalo, the StateUniversity of Newyork

5) Sebastien Roy, " The Design of an FPGA BasedMIMO Transceiver for Wi-Fi,"DSP Magazine, May2006.

6) Prof. David Brooks, "Computer Science 141Computing Hardware", Fall 2007, HarvardUniversity.

7) Introduction to DSP Design flow, 2006 Xilinx, Inc8) Janak. H.Patel, Introduction to VHDL 1 and 2, Dept

of Electrical and Computer Engineering, Universityof Illinois at urbana- campaign.

9) Ahmed Abu-Hajar, Digital Design Using VHDLDigitavid, Inc, San Jose, CA.

10) K.Masselos,N.S.Voros. "Implementation of ofwireless Communications system on FPGA-Basedplatforms", EURASIP Journal on embedded systems,volume 2007, article ID 12192.

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