v3101 Advanced Digital System Design

download v3101 Advanced Digital System Design

of 6

Transcript of v3101 Advanced Digital System Design

  • 8/10/2019 v3101 Advanced Digital System Design

    1/6

    V3101 ADVANCED DIGITAL SYSTEM DESIGN

    Unit 1

    MSI and LSI circuits and their applications:1.

    Arithmetic circuits,

    2.

    comparators,3. Multiplexers,4.

    Code Converters,

    5.

    XOR & AOI Gates,

    6.

    Design of sequential systems with small number of standard modules,

    7. State register Counters with combinational networks Multimodule

    8. RAM with combinational networks9.

    Multimodule implementation of sequential systems

    10.

    Multimodule registers11.

    Multimodule counters

    Unit 2

    Sequential Circuit Design:

    12.Clocked Synchronous State Machine Analysis,

    13.Mealy machines

    14.

    Moore machines,

    15.

    Finite State Machine design procedure

    16.

    derive state diagrams

    17.

    state tables,

    18.state reduction methods,

    19.state assignments.

    20.

    Incompletely specified state machines.

    21.

    Implementing the states of FSM.

    Unit 3

    Asynchronous sequential circuits:

    22.

    Analysis,

    23.Derivation of excitation table,

    24.

    Flow table reduction,

    25.

    state assignment,

    26.

    transition table ,

    27.

    design of asynchronous Sequential circuits,

    28.

    Race conditions

    29.Race cycles,

    30.

    Methods for avoiding races31.

    Static hazards

  • 8/10/2019 v3101 Advanced Digital System Design

    2/6

    32.dynamic hazards,

    33.

    Methods for avoiding hazards,

    34.

    essential hazards

    Designing with SM charts

    35.

    State machine charts,36.Derivation of SM charts,

    37.Realization of SM charts.

    Unit 4

    Designing with Programmable Logic Devices:

    38.

    ReadOnly Memories,

    39.

    Programmable Array Logic PALs,

    40.

    Programmable Logic Arrays PLAs41.PLA minimization and

    42.PLA folding,

    43.

    Other Sequential PLDs,

    44.

    Design of combinational circuits using PLDs.

    45.

    Design of sequential circuits using PLDs

    46.

    Complex Programmable Logic Devices

    47.Field Programmable Gate Arrays

    48.Altera Series FPGAs

    49.

    Xilinx Series FPGAsUnit 5

    Timing issues in Digital system design:

    50.timing classification

    51.synchronous timing basics52.

    skew

    53.

    jitter-

    54.

    latch based clocking-

    55.self-timed circuit design

    56.

    self-timed logic,57.completion signal generation,

    58.

    self-timed signalling

    59.

    synchronizers

    60.

    Arbiters.

  • 8/10/2019 v3101 Advanced Digital System Design

    3/6

    ELV 3102 VLSI TECHNOLOGY & DESIGN

    Unit 1

    Review of Microelectronics and Introduction to MOS Technologies:1.

    Technology trends.

    2.

    MOS Transistor Theory:3. n MOS transistor4.

    p MOS transistor,

    5.

    threshold voltage equation,

    6.

    body effect,

    7. MOS device design equation,

    8. sub threshold region,9.

    Channel length modulation.

    10.

    Mobility variation,

    11.

    tunnelling,

    12.

    punch through,

    13.hot electron effect,

    14.Modelling of MOS transistors using SPICE.

    Unit 2

    Basic IC Processing Steps:15.

    Crystal growth

    16.wafer preparation,17.epitaxy,

    18.Oxidation,

    19.

    Lithography,20.

    Etching techniques ,

    21.

    film deposition,

    22.Diffusion,

    23.Ion implantation,24.

    metallisation,

    25.

    VLSI Process Integration NMOS,

    26.

    VLSI Process Integration CMOS

    27.VLSI Process Integration BICMOS

    Unit 3Basics of Digital CMOS Design:

    28.

    The MOS Inverter:

    29.

    principle,

    30.

    Depletion load inverters

    31.enhancement load inverters

    32.the basic CMOS inverter,

    33.transfer characteristics,34.

    logic threshold,

    35.

    Noise margins,36.Dynamic behaviour,

  • 8/10/2019 v3101 Advanced Digital System Design

    4/6

    37.

    Propagation Delay,

    38.

    Power Consumption.

    39.

    Latch-up in CMOS circuits.

    40.

    Ratioed logic,

    41.

    Pass Transistor logic,Arithmetic circuits in CMOS VLSI;

    42.

    Adders-

    43.

    Multipliers

    44.

    Shifters.

    Unit 4

    Sequential MOS Logic Design:45.

    Static latches;

    46.

    Flip flops

    47.

    Registers,

    48.

    Dynamic Latches

    49.Dynamic Registers,

    50.CMOS Schmitt trigger,

    51.

    Monostable sequential Circuits,

    52.

    Astable Circuits.

    53.

    Memory Design:

    54.ROM cells design

    55.RAM cells design,

    56.SRAM

    57.

    DRAM,58.

    Domino logic.

    59.

    NORA logic.

    Unit 5

    Circuit design Process:60.

    Circuit elements-

    61.

    resistor ,

    62.

    capacitor,

    63.interconnects,

    64.

    sheet resistance ,65.

    standard unit capacitance

    66.

    unit delay concepts ,

    67.

    inverter delays ,

    68.

    driving capacitive loads,

    69.propagation delays,

    70.MOS layers,

    71.Stick diagrams72.

    mask layout encoding,

    73.

    Design rules74.

    Design layout,

  • 8/10/2019 v3101 Advanced Digital System Design

    5/6

    75. Lambda Based Design rules,

    76.

    micron based design rules,

    77.

    Scaling of MOS circuits.

    ELV3103 DESIGNING WITH MICROCONTROLLERS

    Unit 1

    8-Bit Microcontrollers:1.

    Study of micro controller (MCS 51 family- 8051)

    2.

    Architecture:

    3. CPU Block diagram,

    4. Memory organization,

    5. Program memory,

    6.

    Data memory,7.

    Interrupts,

    8.

    Peripherals:

    9. Timers,

    10.Serial port,

    11.I/O Port.

    12.

    Programming,

    13.

    Addressing Modes,

    14.Instruction Set,

    15.

    Programming,16.Comparison of various families of 8- bit Microcontrollers.

    Unit 2

    PIC 16F 87X Microcontroller:17.

    CPU Architecture

    18.Block diagram ,

    19.Memory organization,20.

    Program memory,

    21.

    Data memory,

    22.

    Interrupts,

    23.

    Addressing Modes,

    24.Instruction Set ,25.

    Peripherals:

    26.Timers,27.

    ADC ,

    28.

    Serial port,

    29.I/O Port,

    30.Programming,

    Unit 3

    High Performance RISC Architecture:ARM

  • 8/10/2019 v3101 Advanced Digital System Design

    6/6

    31.

    Background of ARM

    32.

    ARM architecture versions V4, V5, V6, V7,

    33.

    ARM Cortex M3 architecture ,

    34.

    Programmers model ,

    35.

    Thumb Instruction Set Architecture,36.Memory map,37.

    Exceptions,

    38.

    Clocking

    39.

    resets,

    40.Power management,

    41.NVIC,42.

    Memory Protection Unit,

    43.

    Core Debug,

    44.

    System Debug,

    45.

    Cortex M3 development using the GNU tool chain.

    Unit 4

    Design, Development and Debugging Tools for Microcontroller based

    Systems:46.

    Software tools like Cross assembler,

    47.

    compiler,

    48.debuggers,

    49.simulators tools like In-Circuit Emulators(ICE)

    50.hardware tools like In-Circuit Emulators(ICE),

    51.

    Emulators,52.

    Logic Analysers

    Unit 5

    Microcontroller based System Design:

    53.Case study with reference to a popular 8- bit microcontroller.54.

    Case study with reference to a popular 16- bit microcontroller.

    55.

    Case study with reference to a popular 32- bit microcontroller.

    56.

    A typical application design from requirement analysis through concept

    design,

    57.

    Detailed hardware and software design using 8 bit Microcontrollers todemonstrate the use of Interrupts and available peripherals.

    58.

    Detailed hardware and software design using 16 bit Microcontrollers to

    demonstrate the use of Interrupts and available peripherals.

    59.

    Detailed hardware and software design using 32- bit Microcontrollers to

    demonstrate the use of Interrupts and available peripherals.

    60.Timing Analysis.