Using low power COTS DSPAssessment of Analog Devices BlackFin

Emile REMETEANCNES

ADCSSESA/ESTEC

Noordwijk, The NetherlandsOctober 3-5, 2007

2E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Higher Computing Performance

Technical solutions

Radiation-hardened DSPThe most comfortable / easy to use solutionNot available at present time

IP cores in hardened FPGAFull DSP coreHybrid solutions: CPU + DSP operators (FFT, convolution core)

COTS DSPHighest computing performanceLowest power dissipationSensitive to radiations effects

Key factor allowing a major scale change in scientific space research Feasibility factor for some space missions

3E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

DSP use in Space Missions

Typical DSP applications FFT (IASI) Filtering (Microscope)

General signal processing Image compression (Rosetta, Picard) Signal detection & characterization by neural network (Demeter)

Other applications General processing (telecom sat) P/L Management (Microscope, Picard)

Versatile product required

4E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Analog Devices BlackFin BF532

16b fixed point DSP core: 400 MHz / 400 MIPS / 800 MMACS

Low power (< 1W)

Integrated peripherals

176 ld LQFP

Assembly language similar to 21020’s

5E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Benchmarks

Speed (optimised code in assembly language) and precision tests

Targets: BlackFin, TSC21020 (Mosaïc 020), ADSP-2106x

Benchs:FFT 1024 pts Radix 2 Radix 4

1D & 2D 9/7 Daubechies wavelets transform (JPEG2000)• Convolution• Lifting Scheme

Direct and reverse transforms

6E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Main results

Speed (TSC21020 (1WS PM & DM) = 1, same clock frequency)

1.415.942D WT Conv

0.361.612D WT Lifting

0.564.141D WT Lifting

0.363.41FFT Rdx4

0.392.98FFT Rdx2

Code & Data in external memoryCode & Data in internal memory

Precision (rms noise) TSC21020: good (floating point) BlackFin: average (fixed point) -> reconstruction noise / image artifacts

For high-precision demanding applications, block floating point scaling or emulated floating point libraries could be used (slower!)

7E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Board architecture (Steel Electronique)

FLASHSUP.

FLASHDUT

JTAG_1JTAG_2

BF532-400MHz

DUT

SRAM1Mbyte

#1

#2#3

EBUI 16Bits/A0-19

SDRAMSup.

128Mbytes

SDRAMDUT

128Mbytes

SDRAM InterfaceSDRAM Interface

3x Banks 1Mbyte

EBUI 16Bits/A0-19

UART_DSP

UART PCRS422

SPORT1

SPORT0

SPI

11 x LEDs:PF5-15

GPIO

4x LEDs:PF11-15

3x LEDs:TMR0,1,2

LED:TMR0

/reset

Mclk_DUT

RESETADM708

MCLK20MHz

RESETADM708

NMI_DUT VDDext_DUT3v3

VDDext_Sup3v3 BF532-400MHz

SUPERVISEUR

BootMode

RTC32k768

TILU

TrigLU

8E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Benchs for heavy ion irradiation (Coframi)

DSP Core Registers Arithmetical & Logical instructions Shift instructions

Memory Internal External SRAM Controler External SDRAM Controler

Communication links SPORT SPI UART

OtherTimerGPIO

9E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

At the UCL Heavy Ion Facility

10E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Main results : Latch-up (1/2)

The BlackFin has a good latch-up immunityNo latch-up has been observed even with 132Xe26+ (55.9 Mev/mg/cm2) and the board tilted

Some technologies used to improve the performances are also favorable for latch-up immunity

CNES asked Analog Devices for technological information that could explain the good LU results.

As the response « BlackFin is processed with a 130nm LV process », was not helpful, we decided to do our own technological studies of the silicon to find answers to our questions

11E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Main results: Latch-up (2/2)

90nm process => Reduced charge collection volume(Reduced probability to trigger the parasitic thyristor)

Burried doping gradient may act as a barrier for the charge flow generated by the heavy ions in the bulk substrate

Shallow Trench Insulators ?(Analysis in progress)

Low core voltage (1.2V) is a favorable factor

Hypotheses

12E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Single Events Effects

For high-LET heavy ions many SEFI have been observed

It was not possible to perform SEU tests for ions with low LET (failure of the heavy ion facility)

SEFI signature

13E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

Further activities

SEU tests with all available ions

SEFI (PLL? DMA controller? Power controller?)

TID tests

Using the cache (challenging!)

14E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

CNES DT2 Fault-Tolerant Architecture

BlkFn

Cesam

Mem#1

Syclopes

#2

Error

EDAC

BlkFn

Cesam

Mem

EDAC

The low power dissipation of the BlackFin makes it possible to imagine a DT2 architecture for scientific missions that require both high computing AND fail-operational performances

15E. REMETEAN – Using low power COTS DSP: Assessment of Analog Devices BlackFin ADCSS, 04/10/2007 CNES

For further information please contact

Gilles MOURY (gilles.moury@cnes.fr)Head of the On-board Data Handling section

Emile REMETEAN (emile.remetean@cnes.fr)BlackFin study

Florent MANNI (florent.manni@cnes.fr)DSP activities including further activities on BlackFin

Michel PIGNOL (michel.pignol@cnes.fr)DMT / DT2 Fault-tolerant supercomputers