UNIVERSITY OF NAIROBI SCHOOL OF ENGINEERING...

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UNIVERSITY OF NAIROBI

SCHOOL OF ENGINEERING

DEPARTMENT OF ELECTRICAL AND INFORMATION

ENGINEERING

PROJECT NUMBER: PR38

TITLE: INDUSTRIAL NICKEL CADMIUM BATTERY

CHARGER

AUTHOR: OYUGI GEORGE ODHIAMBO

REG NO: F17/1412/2010

SUPERVISOR: MR. SAYYID AHMED

EXAMINER: PROF. ELIJAH MWANGI

This project report has been submitted in partial fulfillment of the requirement for the

award of Bachelor of Science Degree in Electrical and Electronics Engineering

Date of submission: 24TH

APRIL, 2015

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DECLARATION OF ORIGINALITY

NAME OF STUDENT: OYUGI GEORGE ODHIAMBO

REGISTRATION NUMBER: F17/1412/2010

COLLEGE: Architecture and Engineering

FACULTY/SCHOOL/INSTITUTE: Engineering

DEPARTMENT: Electrical and Information Engineering

COURSE NAME: Bachelor of Science in Electrical and Electronics

Engineering

TITLE OF WORK: DESIGN AND BUILDING OF AN INDUSTRIAL

NICKEL CADMIUM BATTERY CHARGER WITH AN END OF

CHARGE DETECTION CIRCUIT

1) I understand what plagiarism is and I am aware of the university policy in this regard.

2) I declare that this final year project report is my original work and has not been submitted

elsewhere for examination, award of a degree or publication. Where other people’s work

or my own work has been used, this has properly been acknowledged and referenced in

accordance with the University of Nairobi’s requirements.

3) I have not sought or used the services of any professional agencies to produce this work.

4) I have not allowed, and shall not allow anyone to copy my work with the intention of

passing it off as his/her own work.

5) I understand that any false claim in respect of this work shall result in disciplinary action,

in accordance with University anti-plagiarism policy.

Signature: ……………………………………………………………………………….

Date: …………………………………………………………………………………….

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DEDICATION

I dedicate this project to my family as a whole especially my Dad, Dalmas Oyugi and my late

Mum Rose Oyugi.

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ACKNOWLEDGEMENT

Everything is possible as long as you have faith in Almighty God so it is said. For this far I have

come it’s only through God’s grace, love, attention, and unending care. Therefore, my special

thanks go to God for giving me the strength and knowledge to complete this project. Without the

love and support of my family, I wouldn’t have come this far, but thanks to each and every

member of my family; I am able to do my final year project.

My supervisor Mr. Ahmed Sayyid has been guiding me since the onset of this project until now

that it has been documented. I am extending lots of gratitude to him for such a noble act that he

has done. Thank you Ahmed.

I would also wish to acknowledge everyone else whom I have not mentioned but has contributed

to the success of this project either directly or indirectly, be it classmates, friends, acquaintances

or relatives. Thank you all.

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ABSTRACT

This project is about the design and construction of an industrial nickel cadmium battery charger

that includes an end of charge detection circuit. The charger uses a buck dc-dc converter

topology to step down the input dc voltage to a lower output dc voltage specified for the series

arrangement of the Ni-Cd cells. The converter also provides a constant output current for

charging the Ni-Cd battery cells. The type of charging method used is fast charge because this is

a security system that needs the battery to be charged and be ready for use as fast as possible.

Fast charge involves applying the battery’s full charging current or capacity for a shorter period

of time.

The charging circuit also involves a feedback loop circuit with a DSP (Digital Signal Processor)

TMS320F28027 for control and end of charge detection. The DSP control keeps output current

of the charger constant by varying the duty cycle of the buck converter MOSFET switch

whenever a variation in the output dc current is detected. The DSP also detects the end of charge

of the Ni-Cd cells by detecting a negative voltage gradient and then lighting an LED.

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LIST OF ABBREVIATIONS

CCM Continuous Conduction Mode

CMC Current Mode Control

DCM Discontinuous Conduction Mode

DSP Digital Signal Processor

EMI Electromagnetic Interference

ESR Effective Series Resistance

IDE Integrated Development Environment

KCL Kirchhoff’s Current Law

KVL Kirchhoff’s Voltage Law

LED Light Emitting Diode

MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor

Ni-Cd Nickel Cadmium

PCB Printed Circuit Board

PI Proportional Integral

PSIM Power Simulator

PWM Pulse Width Modulation

SMPS Switched Mode Power Supply

UART Universal Asynchronous Receiver/Transmitter

VCM Voltage Mode Control

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LIST OF FIGURES

FIGURE 2. 1: LAUNCHXL-F28027 BOARD OVERVIEW[6] ............................................................. 8

FIGURE 2.3: DC-DC BUCK CONVERTER CIRCUIT. ............................................................................ 11

FIGURE 2. 4: IDEAL SWITCH (A) USED TO REDUCE DC VOLTAGE COMPONENT, (B) OUTPUT VOLTAGE

WAVEFORM ............................................................................................................................. 12

FIGURE 2. 5: DETERMINATION OF THE SWITCH OUTPUT VOLTAGE DC COMPONENT BY INTEGRATING

AND DIVIDING BY SWITCHING PERIOD [1]................................................................................ 13

FIGURE 2. 6: INSERTION OF LOW PASS FILTER ................................................................................ 13

FIGURE 2. 7: GRAPH OF BUCK CONVERTER DC OUTPUT VOLTAGE AGAINST DUTY CYCLE ............... 14

FIGURE 2. 8: BUCK CONVERTER WITH WAVEFORMS OF INDUCTOR VOLTAGE AND CAPACITOR

CURRENT IDENTIFIED[1]. ........................................................................................................ 14

FIGURE 2.9: CONVERTER OUTPUT WAVEFORM 𝒗(𝒕) COMPROSING OF DC COMPONENT 𝑽 AND THE

SWITCHING RIPPLE 𝑽𝒓𝒊𝒑𝒑𝒍𝒆(𝒕) [1] ........................................................................................ 15

FIGURE 2. 10: BUCK CONVERTER STEADY STATE INDUCTOR VOLTAGE WAVEFORM [1] ................. 16

FIGURE 2.11: BUCK CONVERTER STEADY STATE INDUCTOR CURRENT WAVEFORM [1]. ................. 17

FIGURE 2.12: PRINCIPLE OF INDUCTOR VOLT-SECOND BALANCE [1]. ............................................. 18

FIGURE 2.13: OPEN-LOOP BUCK CONVERTER AND ITS TYPICAL WAVEFORM IN CCM A) THE

CIRCUIT, B) INDUCTOR CURRENT [2] ....................................................................................... 20

FIGURE 2.14: CIRCUIT AVERAGED MODEL OF THE OPEN-LOOP BUCK CONVERTER [2] .................... 21

FIGURE 2.15: THE DC EQUIVALENT CIRCUIT MODEL OF THE OPEN-LOOP BUCK CONVERTER [2].... 22

FIGURE 2. 16: THE SMALL-SIGNAL EQUIVALENT CIRCUIT MODEL OF THE OPEN-LOOP BUCK

CONVERTER [2]. ...................................................................................................................... 22

FIGURE 2.17: THE SMALL-SIGNAL EQUIVALENT CIRCUIT MODEL [2] .............................................. 23

FIGURE 2.18: THE SMALL-SIGNAL EQUIVALENT CIRCUIT MODEL [2] .............................................. 24

FIGURE 2. 19: CLOSED LOOP FEEDBACK CONTROL BLOCK DIAGRAM ....... ERROR! BOOKMARK NOT

DEFINED.

FIGURE 2.20: TYPE I COMPENSATOR (INTEGRATOR) ...................................................................... 26

FIGURE 2.21: INDUCTOR VOLTAGE AND CURRENT, OUTPUT CAPACITOR CURRENT, AND SWITCH

CURRENT WAVEFORMS [3] [1]. ............................................................................................... 27

FIGURE 2.22: HIGH SIDE MOSFET CURRENT ................................................................................ 28

FIGURE 2.23: HIGH SIDE MOSFET CURRENT ................................................................................ 29

FIGURE 4.1: CAPACITOR, DIODE, AND INDUCTOR CURRENTS WAVEFORMS ..................................... 42

FIGURE 4.2: SWITCH VOLTAGE WAVEFORM. ................................................................................... 43

FIGURE 4. 3: SWITCH CURRENT WAVEFORM ................................................................................... 43

FIGURE 4. 4: OUTPUT VOLTAGE WAVEFORM .................................................................................. 43

FIGURE 4. 5: DIODE, INPUT AND OUTPUT VOLTAGE WAVEFORMS ................................................... 44

FIGURE 4. 6: INDUCTOR CURRENT AND OUTPUT CURRENT WAVEFORMS ........................................ 44

FIGURE 4. 7: SWITCH, INDUCTOR, AND CAPACITOR CURRENTS WAVEFORMS .................................. 44

FIGURE 4. 8: OUTPUT VOLTAGE WAVEFORM .................................................................................. 44

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FIGURE 4. 9: INPUT, DIODE, AND OUTPUT VOLTAGE WAVEFORMS. ................................................. 45

FIGURE 4. 10: INDUCTOR AND OUTPUT CURRENT WAVEFORMS ...................................................... 45

FIGURE 4. 11: CAPACITOR, DIODE, AND INDUCTOR CURRENT WAVEFORMS. ................................... 45

FIGURE 4. 12: OUTPUT VOLTAGE WAVEFORM ................................................................................ 46

FIGURE 4. 13: DIODE, INPUT, AND OUTPUT VOLTAGE WAVEFORMS ................................................ 46

FIGURE 4. 14: PRACTICAL GATE DRIVE CIRCUIT ............................................................................. 47

FIGURE 4. 15: PRACTICAL GATE DRIVE INPUT SIGNAL .................................................................... 47

FIGURE 4. 16: SIMULATED AND PRACTICAL GATE DRIVE OUTPUT VOLTAGE WAVEFORMS .............. 48

FIGURE 4. 17: PRACTICAL DIGITAL CONTROLLED BATTERY CHARGER ........................................... 49

FIGURE 4. 18: PRACTICAL AND SIMULATED INDUCTOR CURRENT AND VOLTAGE ........................... 50

FIGURE 4. 19: PRACTICAL AND SIMULATED SWITCH CURRENT WAVEFORM .................................... 50

FIGURE 4. 20: PRACTICAL AND SIMULATED OUTPUT CURRENT WAVEFORM ................................... 51

LIST OF TABLES

TABLE 1: EXPERIMENTAL BATTERY PARAMETERS

TABLE 2: RESULTS

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TABLE OF CONTENTS

DECLARATION OF ORIGINALITY…………………………………………………………i

DEDICATION…………………………………………………………………………………...ii

ACKNOWLEDGEMENT……………………………………………………………………...iii

ABSTRACT……………………………………………………………………………………...iv

LIST OF ABBREVIATIONS…………………………………………………………………...v

LIST OF FIGURES…………………………………………………………………………….vii

LIST OF TABLES…………………………………………………………………………......viii

CHAPTER 1: INTRODUCTION………………………………………………………………2

1.1: Background………………………………………………….......................................2

1.2: Problem statement…………………………………………………………………….2

1.3: Project objectives……………………………………………………………………..2

1.4: Scope of the project…………………………………………………………………..2

CHAPTER 2: LITERATURE REVIEW………………………………………...…………….3

2.1: NICKEL CADMIUM BATTERY CELLS…………………………………….…….3

2.1.1: History……………………………………………………………………...3

2.1.2: Recent developments ………………………………………………………3

2.1.3: Ni-Cd charging information………………………………………………...3

2.1.3.1: Slow Charge………………………………………………………4

2.1.3.2: Slow Charge Rates………………………………………………..4

2.1.3.3: Fast Charge……………………………………………………….4

2.1.3.4: Detecting End-of-Charge for Ni-Cd……………………………...5

2.1.3.5: Methods for Temperature Detection……………………………..6

2.1.3.5.1: Temperature slope detection……………………….…..6

2.1.3.5.2: Method of Voltage Detection…………………………..6

2.1.3.5.2.1: −∆𝑉 Detection……………………………….6

2.1.3.5.2.2: Voltage Slope Detection……………………...7

2.2: LAUNCHXL-F28027 C2000 Piccolo Launch-Pad Overview……………………….7

2.2.1: Kit Contents………………………………………………………………...9

2.2.2: Revision…………………………………………………………………….9

2.3: DC-DC CONVERTERS……………………………………………………………..9

2.3.1: Introduction………………………………………………….……………..9

2.3.2: Types of dc-dc converters…………………………………………………10

2.3.3: Buck converter…………………………………………………………….11

2.3.4: Inductor volt-second balance, capacitor charge balance, and the small-

ripple approximation……………………………………………………….…….14

2.3.5: Buck converter transfer function…………………………………….……19

2.3.5.1: Input voltage to output voltage and input voltage to inductor

current transfer functions………………………………………………...23

x

2.3.5.2: Duty cycle to output voltage and duty cycle to inductor current

transfer functions………………………………………………………...24

2.3.6: Feedback loop control of buck converter…………………………………25

2.3.7: Buck converter compensator design………………………………………25

2.3.7.1: Type I compensator……………………………………………..26

2.3.7.2: Type II compensator…………………………………………….26

2.3.7.3: Type III compensator……………………………………………26

2.3.8: Analytical waveform analysis of a buck converter………………………..27

2.3.9: Buck converter efficiency…………………………………………………28

2.3.9.1: Inductor power losses…………………………………………...28

2.3.9.2: MOSFET power losses………………………………………….28

2.3.9.3: Diode losses……………………………………………….….…30

2.3.9.4: Capacitor losses………………………………………….……...30

2.4: Digital control of dc-dc buck converter……………………………………….…….30

CHAPTER 3: DESIGN………………………………………………………………………...30

3.1: Determination of Ni-Cd battery charging voltage…………………………………..30

3.2: 1.2A charging current parameter calculation………………………………………..31



3.5: PSIM open loop design circuit………………………………………………………35

3.6: Compensator Design………………………………………………………………..36

3.7: PSIM analogue closed loop circuit design………………………………………….37

3.8: Digital control design……………………………………………………………….39

3.9: Switch gate driver design……………………………………………………………41

CHAPTER 4: PRACTICAL IMPLEMENTATION AND RESULTS……………………..42

4.1: SIMULATION RESULTS………………………………………………………….42

4.1.1: Open loop simulated results……………………………………………….42

4.1.2: Analogue control closed loop simulation results………………………….44

4.1.3: Digital control closed loop simulation results…………………………….45

4.2: PRACTICAL IMPLEMENTATION……………………………………………….46

4.2.1: MOSFET gate driver……………………………………………………...46

4.2.2: Buck converter…………………………………………………………….48

CHAPTER 5: DISCUSSION…………………………………………………………………..51

CHAPTER 6: CONCLUSION AND FUTURE WORK……………………………………..52

6.1: Conclusion…………………………………………………………………………..52

6.2: Future work………………………………………………………………………….53

REFERENCES…………………………………………………………………………………53

APPENDICES………………………………………………………………………………….54

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CHAPTER 1: INTRODUCTION

1.1: Background

The battery charger will consist of a LED display and a charge function (circuit) for the Ni-Cd

(Nickel Cadmium) battery cells. This charger will be capable of extending the lifespan of the

battery and prevent it from over-charging and current-leakage for better and efficient power

system protection systems. A circuit for the charging control using DSP TMS320F28027 will be

developed and used in obtaining the best solution for the charging-time and also for the control

purpose. This project also has the advantages of having the option in choosing the charging rate,

accordingly to the Battery Standard.

The battery charger consists of a switched mode voltage regulator to carry out the dc-dc voltage

conversion. Switched mode voltage regulators are preferred due to their high efficiency over

linear voltage regulators. Specifically, a buck converter will be used because of the low voltage

of the Ni-Cd battery cells.

1.2: Problem statement

Nowadays, there are many types of battery chargers in the market. The problem encountered

with a standard charger is that it does not include an automatic "on" and "off' function when the

charging process is completed. It also does not have any display or indicator to indicate the end

of charge of the battery. The charging phases are also not very stable for most of the chargers.

Therefore, it is necessary to develop a charger that is controllable and the charging process can

be terminated when the battery is already full. Such a charger will help in prolonging the nickel

cadmium battery life and also other types of batteries.

1.3: Project objectives

The aim of this project is to design and implement a digitally controlled Ni-Cd battery charger

using a switched mode voltage regulator and a DSP.

1.4: Scope of the project

Figure 1.1 shows the general overview of the scope of the project.

The simulation scope on PSIM includes;

The design of dc-dc buck converter

The design of the switch gate driver circuit

The design of feedback control loop of the buck converter

The hardware scope includes;

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Develop the dc-dc buck converter

Develop the switch gate driver circuit

Develop the feedback control loop of the buck converter using DSP

CHAPTER 2: LITERATURE REVIEW

2.1: NICKEL CADMIUM BATTERY CELLS

2.1.1: History

The first Ni-Cd battery was created by Waldemar Jungner of Sweden in1899. During that time,

lead acid battery was the only direct competitor which was less physically and chemically robust.

Energy density suddenly increased with minor improvements to the very first prototypes to

nearly half that of primary batteries and much more than lead acid batteries. Jungner did his

experiments by substituting iron for cadmium in varying quantities and found the iron

formulations to be wanting. The work of Jungner was unpopular in the US making Thomas

Edison to borrow the battery design and he in turn introduced the Nickel Iron battery about two

years later after Jungner had built one in 1906. A factory was established by Jungner in Sweden

with the purpose of producing flooded design Ni-Cd batteries [2].

2.1.2: Recent developments

In the past, Ni-Cd batteries have been known to have had internal resistance which is as low as

alkaline batteries. Presently, all consumer Ni-Cd batteries use the “jelly roll’ design. Such a

design integrates several layers of cathode and anode material wrapped into a cylindrical shape

[2].

2.1.3: Ni-Cd charging information

In the wake of battery charging, there are two methods of battery charging: Fast charge is a

system that can fully charge the battery in one or two hours, slow charge usually takes longer or

overnight to fully recharge the battery.

DC source Converter Batteries

DSP End of charge indicator

Figure 1. 1: Block diagram of project scope Figure 1.1: Block diagram of the project scope

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2.1.3.1: Slow Charge

Slow charge is typically a charging current that can be applied to the battery cells indefinitely

without causing any harm to the battery cells (it is sometimes known as trickle charging). The

maximum rate of trickle charge that is safe for a given cell type depends on both the cell

construction and battery chemistry. After the cell is fully charged, further charging causes

emission of a gas within the cell. All the gas emitted should recombine internally, or there will

be buildup of pressure within the cell in the long run leading to gas emission through the opening

of the internal vent (this reduces the battery life). Meaning, the maximum safe rate of trickle

charge depends on the battery chemistry, and internal electrodes construction. This has been

improvised in newer cells which allow higher rates of trickle charge. The main advantage of

slow charging is that (by definition) its circuitry does not require end of charge detection because

it cannot damage the battery cells regardless of how long they are charged. Meaning, the charger

is simple (and cheap). The main disadvantage of slow charging is that it takes a long time to

recharge the battery fully, and that is a negative marketing feature for consumer products [5].

2.1.3.2: Slow Charge Rates

Most Ni-Cd cells can easily tolerate a charging current of c/10 i.e.1/10 of the cell's Ah rating,

indefinitely without damaging to the battery cells. With this rate, an approximate recharge time

would be in the range of 12 hours. Other high-rate Ni-Cd cells (that are optimized for fast

charging) can sustain continuous trickle charge current which is as high as c/3. If c/3 is applied,

the battery would be fully charged in about 4 hours.

The possibility of easily charging a Ni-Cd battery in less than 6 hours and without including any

end-of charge detection circuit is the main reason they are used in cheap consumer products e.g.

toys, soldering irons, flashlights etc. A circuit for trickle charging can be made using cheap wall

cube to act as DC source, and also a single power resistor to limit the charging current [5].

2.1.3.3: Fast Charge

Fast charge for Ni-Cd is usually specified as a 1 hour recharge time at a charge rate of about

1.2c. Many applications where Ni-Cd batteries are used do not exceed this rate of charge. It

should be noted that, fast charging is done safely only if the cell temperature is in the range of,

10 − 40℃ . 25℃ , is only considered optimal for charging. Fast charging at lower temperatures

i.e.10 − 20℃ should be done with care because pressure within a cold cell may rise more rapidly

during charging, this rise can cause the cell to emit a gas through the internal pressure vent of the

cell and that shortens the battery life [5].

The Ni-Cd charging reaction is endothermic i.e. it makes the cell get cooler. Therefore, it is

possible to safely apply very high rates of charging current into a Ni-Cd cell, provided that it is

not overcharged. It is only the internal resistance of the cell that limits the maximum safe

charging current for Ni-Cd batteries. The power dissipated is given by P = I2R. The internal

resistance is normally quite low for Ni-Cd battery cells. Therefore, high charge rates are

possible.

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Other high-rate Ni-Cd cells exist and they can take up to 5c of charging current for about 15

minutes [5] to be fully charged. The products that currently use such ultra-fast charge schemes

are cordless tools, where a 1 hour of recharge time is considered too long to be practical.

Fast Charge: Possible Cell Damage

Caution: Ni-Cd batteries expose a user hazard if they are put on fast charged for an excessive

length of time i.e. abusive overcharge.

When the battery is already fully charged, the extra energy being given to the battery is not being

used in the charge reaction; hence that energy is dissipated as heat within the battery cell. Such

activity leads to a very sharp increase in both the cell temperature and the internal pressure if the

battery cell continues to get high current.

The cell has a pressure-activated vent that is supposed to open in case the pressure gets too high

to allow the release of gas. This is harmful to the cell because the lost gas can never be

recovered. Ni-Cd cell releases oxygen when pressure gets too high.

A severely overcharged cell is capable of exploding if the pressure vent fails to open, that can

happen due to aging or corrosion caused by chemical leakage. Due to this reason, batteries must

never be overcharged up to the point that venting occurs [5].

2.1.3.4: Detecting End-of-Charge for Ni-Cd

Ni-Cd batteries can be fast charged safely provided that they are not overcharged. By monitoring

battery voltage and/or temperature, it becomes possible to detect when the battery is already fully

charged.

A number of high-performance battery chargers use at least two detection schemes to stop fast-

charge: temperature or voltage are the primary methods, with a timing circuit as back-up in case

these primary methods fail to detect correctly the full charge point.

Figure 2.0: V/T plot for full changing current rate i.e. 1C

The plot of voltage/temperature in figure 2.0 defines the battery’s characteristic that shows the

point at which full charge is achieved. For the plot, the data used was taken on a single cell

which was charged by a constant current source at a rate of 1c, at 25℃ ambient temperature. As

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seen from the graph, the point of full charge can be determined by sensing the cell voltage or cell

temperature.

Temperature sensing can be said to be preferable over voltage sensing because the cell

temperature has the most accurate information regarding what is happening inside the cell.

Nevertheless, if the cell temperature is to be measured accurately, the temperature sensor should

be constructed inside the battery pack and that increases the manufacturing cost of the battery.

However, voltage sensing is easier, this is because the voltage leads are easily accessed and it

requires no special assembly in the battery pack.

2.1.3.5: Methods for Temperature Detection

The Ni-Cd cell has the tendency of not showing any significant temperature increase until it

nears full charge since the internal charge reaction is considered to be endothermic. When full

charge is reached, the energy used in the endothermic charge reaction declines and the amount

dissipated as heat increases making the cell to be hot. The Ni-Cd cell experiences a temperature

rise of about 10℃ above ambient temperature [5].

A circuit which can isolate the high current charge at this 10℃ rise in temperature point can be

used with Ni-Cd cell: such a circuit is called a ∆𝑇 detector.

2.1.3.5.1: Temperature slope detection

During fast charge, the temperature of Ni-Cd cell begins to increase very fast when full charge is

achieved (see Figure 2.0). A control circuit which measures the rate-of-change of the cell

temperature can be employed to detect the end-of-charge. Such a circuit is known as a ∆𝑇∆𝑡⁄

detector since it measures the change in battery cell temperature as time goes.

Temperature slope detection method is normally used in microprocessor-based systems: readings

of temperature are taken at timed intervals and then stored in the microprocessor memory.

Afterwards, the current temperature reading is compared to the previous reading, and the

difference during that period is calculated.

Whenever the temperature change over a certain period is known, the rate-of-change of the cell

temperature is calculated and then compared to a reference value. When the reference is reached,

fast charge is terminated since the battery would have been fully charged.

Contrary to the ∆𝑇 detector discussed in the previous section, measurement of the ambient

temperature in a ∆𝑇∆𝑡⁄ system is not necessary since only the cell temperature is required.

2.1.3.5.2: Method of Voltage Detection

The voltage of a Ni-Cd cell during fast charge can be used to determine

Whether the cell is fully charged (see Figure 2.0): not by the value of the voltage, but by the way

the cell voltage changes. −∆𝑉 And Slope Detection will be discussed.

2.1.3.5.2.1: −∆𝑽 Detection

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A definitive indication that a Ni-Cd cell is already fully charged can be observed when the cell

voltage starts to dip (see Figure 2.0). This reduction in battery voltage is used to end the fast

charge in a −∆𝑉 Detector, which progressively monitors the battery voltage and then shuts off

the battery charger when the voltage drops by a certain pre-set amount.

The voltage of the Ni-Cd cell employed to generate the data in Figure 2.0 dropped by 45 mV

when the cell temperature rose by 10℃ above ambient when a charge current of 1c was used.

Battery manufacturers typically recommend a −∆𝑉 detection value of 10-20 mV/cell in charging

systems that are used for Ni-Cd only.

Some relief is given by the fact that the voltage drops in a multi-cell (series-connected) pack is

usually additive if the battery cells are well matched, which in turn increases the signal the −∆𝑉

detector circuit will observe.

2.1.3.5.2.2: Voltage Slope Detection

A microprocessor-based system which can measure, store and then compare battery voltage

readings that are taken at timed intervals is able to accurately detect the end-of-charge using

voltage slope detection method. This method can be used with Ni-Cd cell, provided that the

system accuracy, resolution, and immunity to noise are adequate for the job.

A microprocessor-based system is able to use digital signal processing in order to attain higher

levels of performance as compared to strictly using analog circuits. For example, accuracy and

improved noise margin can be achieved by using a technique that varies with time, where a

number of readings are taken within a narrow timespan and then averaging them to get the data

value which is to be stored for comparison. This significantly reduces the probability of a noise

"hit" which can give a false reading, hence, perfecting the noise performance of the overall

charging system.

If voltage slope detection is to be used with Ni-Cd batteries, any of the following three methods

is maybe used (refer to Figure 2.0) [5]:

Decreasing Positive Slope: such a termination method checks for the part where the voltage is

rising a little slowly in the voltage curve, but still it is a positive slope. This point on the curve is

just before the peak voltage.

0∆𝑉: For this case, fast-charge will be terminated when the voltage curve has a zero slope i.e. at

the peak of the curve. The detector system can identify zero a slope at a point when two

successive voltage readings are the same for a period of time.

−∆𝑉: This is noted when the present voltage reading, is less than the previous reading. This

point is just next to the peak of the voltage curve.

2.2: LAUNCHXL-F28027 C2000 Piccolo Launch-Pad Overview

LAUNCHXL-F28027 is a complete inexpensive experimenter board made by Texas

Instruments. It contains all the software and hardware required to develop applications that uses

the F2802x microprocessor. LAUNCHXL-F28027 Launchpad is based on the superset F28027

device, and it can allow users to switch to other lower cost F28027x devices when the design

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specifications are known. An on-board JTAG emulation tool is also included in the Launchpad to

make it able to be directly interfaced to a computer for convenient, programming, debugging,

and evaluation. The USB interface also gives a UART serial connection to the host from the

device [6].

Texas Instruments also provides Code Composer Studio v6 IDE for writing, downloading, and

debugging applications on the Launchpad. The debugger allows the user to execute an

application using full speed with single stepping and hardware breakpoints and at the

simultaneously not consuming any extra hardware resources.

Figure 2. 1: LAUNCHXL-F28027 Board Overview[6]

From figure 2.1 above, some of the highlighted features of this DSP include;

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Boot selection, UART, and USB disconnect switches

4-Bit nibble wide LED display

Device reset push button

User feedback push button USB debugging

Programming interface using high-speed isolated XDS100v2 emulator with a

USB/UART connection

F28027 device that gives room for applications to switch to lower cost devices

Pins that are easily accessible [6].

2.2.1: Kit Contents

Quick Start Guide

LAUNCHXL-F28027 Board

0.5m mini USB-B Cable

2.2.2: Revision

LAUNCHXL-F28027 C2000 Piccolo Launchpad v1.0 was released in mid-2012 and it is the

only revision available presently [6].

2.3: DC-DC CONVERTERS

2.3.1: Introduction

Modern electronic devices and systems need high-quality, lightweight, reliable, small, and more

efficient sources of power. Linear power regulators, that use voltage or current divider principle,

are not efficient. The main reason being, they are limited to output dc voltages which are smaller

than the input dc voltage. In addition, their power density is quite low due to their low frequency

(50 or 60 Hz) filters and line transformers. However, linear regulators can provide a very high-

quality output dc voltage. They are mainly applied in low power levels. The electronic devices

used in linear regulators operate in their linear modes, but when it comes to higher power

requirement switching regulators are employed. Switching regulators use power semiconductor

switches in the ‘ON’ and ‘OFF’ states. This is because little power is lost in those states i.e. low

voltage across a switch in the on state and zero current through a switch in the off state. Hence,

switching regulators are able to achieve high energy conversion efficiencies. The modern power

electronic switches are capable of operating at high frequencies. As the operating frequency

increases, the transformers, capacitors, and filter inductors becomes smaller and lighter.

Moreover, the changing characteristics of dc-dc converters improve with increase in operating

frequencies. The corner frequency of the output filter usually determines the bandwidth of the

control loop.

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Hence, high operating frequencies makes it possible to obtain a faster dynamic response to

sudden changes in the load currents and=or the input voltage. Dc-dc power converters use high-

frequency electronic power processors for power conversion.

Below are the functions of a dc-dc power converter:

To convert dc input voltage Vin into dc output voltage Vo;

To regulate the dc output voltage against line and load variations;

To reduce the ac voltage ripple which appears on the dc output voltage to a value below

the required level;

To provide isolation between the input source and the load however, isolation is not

always required;

To protect the supplied system and the input source from electromagnetic interference

(EMI);

To satisfy various national and international safety standards [1].

Dc-dc converters are divided into two main types: resonant and soft-switching converters and

hard-switching pulse width modulated (PWM) converters. In hard-switching (PWM), during the

‘ON’ and ‘OFF’ process, the power switch cuts off the load current. During the switching

process, the power device must withstand high voltage and current at the same time, which

results to high switching losses and stress. Soft switching process is similar to PWM except that

the rising and falling edges of the waveform are ‘smoother’ without transient spikes. In this

project, PWM dc-dc converters will be discussed because they have been very popular for the

preceding three decades, and they are also widely used at all power level requirement.

Advantages of PWM converters are:

low component count

high efficiency

constant frequency operation

relatively simple control

commercial availability of integrated circuit controllers

Ability to achieve high conversion ratios in both stepdown and step-up application.

A disadvantage of PWM dc-dc converters is the turn-on and turn-off losses in semiconductor

devices caused by the PMW rectangular current and voltage waveforms. These losses limit

the practical operating frequencies of the converters to hundreds of kilohertz. Rectangular

waveforms also inherently generate EMI [1] [3].

2.3.2: Types of dc-dc converters

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a) Buck (step-down) dc-dc converter

b) Boost (step-up) dc-dc converter

c) Buck-Boost dc-dc converter

d) CUK

2.3.3: Buck converter

The step-down dc-dc converter, commonly known as a buck converter, is shown in Figure 2.2. It

is made up of a dc input voltage source Vg, diode D, filter inductor and capacitor LC

respectively, controlled switch S and load resistance R. Typical waveforms in the converter are

as shown in Figure 2.3a under the assumption that the inductor current is always positive. The

converter can operate in two modes i.e. continuous conduction mode (CCM) and discontinuous

conduction mode (DCM). The mode of the converter in which the inductor current never goes to

zero for any period of time is the continuous conduction mode (CCM). It can be seen from the

circuit that when the switch S is turned ON, the diode D becomes reverse-biased, but when it is

turned OFF, the diode becomes forward biased and it conducts to support an uninterrupted

inductor current. It is desired that the buck converter operate in CCM [1].

Figure 2.2: Dc-dc buck converter circuit.

The buck converter is as a means of reducing the input dc voltage; it does this by using non-

dissipative switches, inductors, and capacitors only. The switch produces a rectangular waveform

as shown in Fig. 2.3b. The voltage is equal to the dc input voltage when the switch is in position

1 (ON), and is equal to zero when the switch is in position 2 (OFF). In practice, the switch is

realized using semiconductor power devices, such devices can be diodes and transistors, which

are controlled to turn ON and OFF in order to perform the function of an ideal switch as

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required.

Figure 2. 3: Ideal switch (a) used to reduce dc voltage component, (b) output voltage waveform

The switching frequency fs, is the inverse of the switching period 𝑇𝑠, in general switching

frequency lies in the range of 1 kHz to 1 MHz, depending on the speed at which the

semiconductor devices switch. The duty ratio, D, is the fraction of the ON time of the switch i.e.

when it is at position 1, and its value is between zero and one. The complement of the duty ratio,

D’, is given by (1 – D).

The switch reduces the dc component of the input voltage: the switch output voltage 𝑉𝑠(t) has a

dc component which is less than the converter’s dc input voltage 𝑉𝑔. Using Fourier analysis, the

dc component of Vs (t) is given by its average value < 𝑉𝑠 >, or the following equation;

< 𝑉𝑠 > = 1

𝑇𝑠∫ 𝑉𝑠(𝑡)

𝑇𝑠

0𝑑𝑡 ………………………………………………………………………(2.1)

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Figure 2. 4: Determination of the switch output voltage dc component by integrating and

dividing by switching period [1].

As shown in Fig. 2.4, the integral is given by the area under the curve, or(𝐷𝑇𝑠𝑉𝑔). The average

value is hence;

< 𝑉𝑠 > = 1

𝑇𝑠(𝐷𝑇𝑠𝑉𝑔) = 𝐷𝑉𝑔……………………………………………………………………(2.2)

So the dc component of 𝑉𝑠(𝑡) is equal to the duty cycle multiplied by the dc input voltage 𝑉𝑔.

Meaning, the switch reduces the input dc voltage by a factor D.

If a low pass filter is inserted as shown in the figure below;

Figure 2. 5: Insertion of low pass filter

The filter will pass the dc component of 𝑉𝑠(𝑡) and at the same time reject the components of

𝑉𝑠(𝑡) at the switching frequency and its harmonics. Therefore, the output voltage is given by;

𝑉 = < 𝑉𝑠 > = 𝐷𝑉𝑔

Since the buck converter in figure 2.5 has been realized using lossless elements, the capacitor,

switch, and inductor do not dissipate power when they are ideal. Therefore, the efficiency of the

buck converter is very high.

As we can observe from the graph below;

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Figure 2. 6: Graph of buck converter dc output voltage against duty cycle

The output dc voltage 𝑉𝑔 depends on duty cycle D for control. Therefore, feedback systems are

usually constructed to adjust the duty cycle D which in turn regulates the converter output dc

voltage.

2.3.4: Inductor volt-second balance, capacitor charge balance, and the small-ripple

approximation

Figure 2. 7: Buck converter with waveforms of inductor voltage and capacitor current

identified[1].

Practically, it is impossible to construct a low pass filter that only allows dc components to pass

but completely blocks the components at the switching frequency and its harmonics. Therefore,

the low pass filter will allow some small amount of the high frequency harmonics generated by

the switch to reach the output. Hence, the output voltage will appear as shown below;

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Figure 2.8: Converter output waveform 𝒗(𝒕) comprosing of dc component 𝑽 and the switching

ripple 𝑽𝒓𝒊𝒑𝒑𝒍𝒆(𝒕) [1]

And is expressed as;

𝑉(𝑡) = 𝑉 + 𝑉𝑟𝑖𝑝𝑝𝑙𝑒(𝑡)……………………………………………………………………... (2.3)

In a properly-designed buck converter, it is desired that 𝑉𝑟𝑖𝑝𝑝𝑙𝑒(𝑡) be as small as possible i.e.

about 1% of the dc output voltage. Since 𝑉𝑟𝑖𝑝𝑝𝑙𝑒(𝑡) is considered that small, it can be neglected

and the output voltage be approximated as;

𝑉(𝑡)~𝑉

This is the small ripple approximation, or the linear ripple approximation.

The inductor current is found by integrating the inductor voltage waveform. When the switch is

ON (position 1), the inductor is connected to the input voltage 𝑉𝑔. At this instant, the inductor

voltage 𝑉𝐿(𝑡) is given by;

𝑉𝐿(𝑡) = 𝑉𝑔 − 𝑉(𝑡)………………………………………………………………………….. (2.4)

But 𝑉(𝑡) = 𝑉 + 𝑉𝑟𝑖𝑝𝑝𝑙𝑒 which is approximated as 𝑉(𝑡) = 𝑉

Hence;

𝑉𝐿(𝑡) = 𝑉𝑔 − 𝑉

Therefore, when the switch is ON, the inductor voltage 𝑉𝐿 is essentially constant.

The inductor current can be found by the following equation;

𝑉𝐿(𝑡) = 𝐿𝑑𝑖𝐿(𝑡)

𝑑𝑡………………………………………………………………………………. (2.5)

Substituting for

𝑉𝐿(𝑡) = 𝑉𝑔 − 𝑉

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We have; 𝑑𝑖𝐿(𝑡)

𝑑𝑡=

𝑉𝐿(𝑡)

𝐿=

𝑉𝑔−𝑉

𝐿 …………………. (2.6)

Since the inductor voltage is fairly constant, the inductor current slope is also fairly constant and

it increases linearly.

When the switch is now turned OFF (position 2), the left side of the inductor becomes connected

to the ground. The inductor voltage at this instant is

𝑉𝐿(𝑡) = −𝑉(𝑡)……………………….. (2.7)

And for small ripple approximation we have

𝑉𝐿(𝑡) = −𝑉

Therefore, the inductor voltage is also fairly constant when the switch is OFF as shown in the

figure below, but the current changes with a negative and fairly constant slope.

Figure 2. 9: Buck converter steady state inductor voltage waveform [1]

The solution for the inductor current gives;

𝑑𝑖𝐿(𝑡)

𝑑𝑡= −

𝑉

𝐿…………………….(2.8)

The figure below shows the inductor current waveforms during the ON and OFF subintervals.

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Figure 2.10: Buck converter steady state inductor current waveform [1].

As seen from the figure above, the peak inductor current is given by the summation of the dc

component I and the peak average ripple ∆𝑖𝐿. This ripple current flows through the inductor and

other semiconductor devices like the switch.

The inductor current waveform is symmetrical about the dc value I., therefore, in the first

subinterval, 𝑖𝐿 increases by 2∆𝑖𝐿 because ∆𝑖𝐿 is the peak ripple.

Hence;

2∆𝑖𝐿 = (𝑉𝑔 − 𝑉

𝐿) (𝐷𝑇𝑠)

∆𝑖𝐿 =𝑉𝑔−𝑉

2𝐿𝐷𝑇𝑠…………………….. (2.9)

Typical values of ∆𝑖𝐿 are in the range of 10% to 20% of the full load dc component I. ∆𝑖𝐿 should

not be allowed to be too large because that would increase the peak current flowing through the

inductor and other semiconductor devices hence increases in their sizes and costs.

The small ripple approximation is also justified for the inductor current as given below;

𝑖𝐿(𝑡) = 𝐼

The inductor value can be chosen as below;

𝐿 =𝑉𝑔−𝑉

2∆𝑖𝐿𝐷𝑇𝑠………………………. (2.10)

The inductor current waveform of Fig. 2.10 is drawn under steady state conditions, with the

converter operating in equilibrium [1].

The following process happens when the converter is first switched on;

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It is assumed that the inductor current and the output voltage are initially zero

An input 𝑽𝒈 is applied

When the switch is ON, the inductor current increases with a gradient of 𝑽𝒈−𝑽

𝑳 but 𝑽 is

initially zero.

When the switch goes OFF, the inductor current changes with a gradient of −𝑽

𝑳 and since

𝑽 is initially zero, this gradient is essentially zero.

It can be seen that there is a net increase in inductor current over the first switching period,

because 𝑖𝐿(𝑇𝑠) is greater than 𝑖𝐿(0) [1].

The output capacitor will charge slightly because the inductor current goes to the output. Hence,

there will be a slight increase in𝑉.

This process repeats during the second and subsequent switching periods, with the inductor

current increasing during each subinterval 1 and decreasing during each subinterval 2 [1].

As the output capacitor continues to charge and 𝑉 increases, the slope during subinterval 1

decreases while the slope during subinterval 2 becomes more negative [1]. Eventually, the point

is reached where the increase in inductor current during subinterval 1 is equal to the decrease in

inductor current during subinterval 2 [1].

For steady state, the integral over one period of inductor voltage is zero,

0 = ∫ 𝑉𝐿(𝑡)𝑑𝑡𝑇𝑠

0

0 =1

𝑇𝑠∫ 𝑉𝐿(𝑡)𝑑𝑡 =< 𝑉𝐿 >

𝑇𝑠

0………………… (2.11)

Meaning the net area under the waveform must be zero during steady state.

Figure 2.11: Principle of inductor volt-second balance [1].

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𝜆 = ∫ 𝑉𝐿(𝑡)𝑑𝑡 = (𝑉𝑔 − 𝑉)(𝐷𝑇𝑠) + (−𝑉)(𝐷`𝑇𝑠)𝑇𝑠

0………………… (2.12)

Where 𝐷 + 𝐷` = 1

< 𝑉𝐿 >=𝜆

𝑇𝑠= 𝐷(𝑉𝑔 − 𝑉) + 𝐷`(−𝑉)

0 = 𝐷𝑉𝑔 − (𝐷 + 𝐷`)𝑉 = 𝐷𝑉𝑔 − 𝑉

𝑉 = 𝐷𝑉𝑔………………………. (2.13)

The buck converter output capacitor has the following equation;

𝑖𝐶(𝑡) = 𝐶𝑑𝑉𝐶(𝑡)

𝑑𝑡……………. (2.14a)

If it is integrated over one switching period we have

𝑉𝐶(𝑡) − 𝑉𝐶(0) =1

𝐶∫ 𝑖𝐶(𝑡)𝑑𝑡

𝑇𝑠

0 ……………. (2.14b)

In steady state, the net change over one switching period of the capacitor voltage must be zero,

so that the left-hand side of Eq. (2.14b) is equal to zero. Therefore, in equilibrium the integral of

the capacitor current over one switching period (having the dimensions of amp-seconds, or

charge) should be zero. There is no net change in capacitor charge in steady state [1].

0 =1

𝑇𝑠∫ 𝑖𝐶(𝑡)𝑑𝑡 =< 𝑖𝐶 >

𝑇𝑠

0………………… (2.15)

2.3.5: Buck converter transfer function

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Figure 2.12: Open-loop Buck converter and its typical waveform in CCM a) the circuit, b)

inductor current [2]

According to the circuit averaging technique [2], the switch S can be modelled to be a current

dependent source of current and diode D modelled to be a voltage dependent voltage source in

the Continuous Conduction Mode (CCM) operation i.e.

< 𝑖𝑆 > = 𝑑 < 𝑖𝐿 >

< 𝑣𝐷 > = 𝑑 < 𝑣𝑖𝑛 > ………..(2.16)

Where, < 𝑣𝐷 >, < 𝑖𝑆 >, < 𝑖𝐿 >, < 𝑣𝑂 >, and < 𝑣𝑖𝑛 > are average value of 𝑖𝑠, 𝑖𝐿, 𝑣𝑂, 𝑣𝐷, and

𝑣𝑖𝑛 respectively.

Hence the averaged model buck converter circuit is as shown below;

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Figure 2.13: Circuit averaged model of the open-loop Buck converter [2]

If it is assumed that 𝐼𝐿 , 𝑉𝑂 , 𝑉𝑖𝑛, and 𝐷 are the dc values of < 𝑖𝐿 >, < 𝑣𝑂 >, < 𝑉𝑖𝑛 >, and 𝑑 in that

respect, then, 𝑖̂𝐿, 𝑣𝑂, 𝑣𝑖𝑛, and �̂� are the small ac variations of < 𝑖𝐿 >, < 𝑣𝑂 >, < 𝑣𝑖𝑛 >, and 𝑑

respectively. Therefore, the equations are as follows;

< 𝑖𝐿 > = 𝐼𝐿 + 𝑖̂𝐿

< 𝑣𝑂 > = 𝑉𝑂 + 𝑣𝑂

< 𝑣𝑖𝑛 > = 𝑉𝑖𝑛 + 𝑣𝑖𝑛

𝑑 = 𝐷 + �̂� …………….. (2.17)

With

𝑖̂𝐿 ≪ 𝐼𝐿

𝑣𝑂 ≪ 𝑉𝑂

𝑣𝑖𝑛 ≪ 𝑉𝑖𝑛

�̂� ≪ 𝐷

If equation (2.17) is substituted into equation (2.16) and high order small signal terms (𝑖̂𝐿�̂�~0,

𝑣𝑂�̂�~0), the resulting models for switch and diode become;

< 𝑖𝑆 > = 𝐷𝐼𝐿 + �̂�𝐼𝐿 + 𝐷𝑖̂𝐿

< 𝑣𝐷 > = 𝐷𝑉𝑖𝑛 + �̂�𝑉𝑖𝑛 + 𝐷𝑣𝑖𝑛 (2.18)

Using equations (2.17) and (2.18) in Fig. 2.13 and then eliminating the DC part and the small

variation components, the DC equivalent circuit model and the small-signal equivalent circuit

model in Figs. 2.14 and 2.15, are obtained respectively.

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Figure 2.14: The DC equivalent circuit model of the open-loop Buck converter [2].

Figure 2. 15: The small-signal equivalent circuit model of the open-loop Buck converter [2].

From Figure 2.14;

𝑉𝑂 = 𝐷𝑉𝑖𝑛 , and,

𝐼𝐿 = 𝐷𝑉𝑖𝑛/𝑅 ………………. (2.19)

This shows that there is no difference between the results from integer order model dc values and

the fractional order model.

From Figure 2.15, all the transfer functions of the buck converter can be obtained.

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2.3.5.1: Input voltage to output voltage and input voltage to inductor current transfer

functions

The input voltage to output voltage transfer function of the open loop buck converter operating

in CCM (i.e. its audio susceptibility), is important in determining audio susceptibility in closed

loop in both voltage and current mode controls.

The input voltage to inductor current transfer function is essential for finding the closed loop

audio susceptibility in current control mode.

Figure 2.16: The small-signal equivalent circuit model [2]

Figure 2.16 is used to determine the input voltage to the output voltage transfer function and the

input voltage to the inductor current transfer function.

The above two transfer functions can be derived from the small signal equivalent circuit in fig

2.16 which is obtained by using the perturbation of duty cycle equal to zero as shown below;

From KVL and KCL and assuming α=1, and β=1, we have;

𝐿𝑠𝑖̂𝐿(𝑠) = 𝐷𝑣𝑖𝑛(𝑠) − 𝑣𝑜(𝑠)

𝐶𝑠𝑣𝑂(𝑠) = 𝑖̂𝐿(𝑠) −�̂�𝑜(𝑠)

𝑅 ……………. (2.20)

Hence, when �̂�(𝑠) = 0 we have;

𝐺𝑣𝑣(𝑠) =�̂�𝑜(𝑠)

�̂�𝑖𝑛(𝑠)=

𝐷

𝐿𝐶𝑠2+𝐿

𝑅𝑠+1

……………….. (2.21)

And

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𝐺𝑖𝑣(𝑠) =�̂�𝐿(𝑠)

�̂�𝑖𝑛(𝑠)=

𝐷𝐶(𝑠+1

𝐶𝑅)

𝐿𝐶𝑠2+𝐿

𝑅𝑠+1

………………. (2.22)

Equation (2.21) expresses the effect of changes in input voltage onto the output voltage at a time

when only the input voltage works (i.e. D=0).

Equation (2.22) expresses the effect of changes in input voltage onto the inductor current at a

time when only the input voltage works (i.e. D=0).

2.3.5.2: Duty cycle to output voltage and duty cycle to inductor current transfer functions

The duty cycle to output voltage transfer function of the open loop buck converter is important in

voltage control mode and also for describing voltage loop for current control mode. The duty

cycle to inductor current transfer function is significant for showing the current loop in current

control mode.

Figure 2.17: The small-signal equivalent circuit model [2]

Figure 2.17 is used to determine the duty cycle to the output voltage transfer function and the

duty cycle to the inductor current transfer function.

Applying KVL and KCL on figure 2.17, the following equations are obtained;

𝐿𝑠𝑖̂𝐿(𝑠) = �̂�(𝑠)𝑉𝑖𝑛 − 𝑣𝑜(𝑠)

𝐶𝑠𝑣𝑜(𝑠) = 𝑖̂𝐿(𝑠) −�̂�𝑜(𝑠)

𝑅………………. (2.23)

When𝑣𝑖𝑛(𝑠) = 0, then;

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𝐺𝑣𝑜𝑑(𝑠) =�̂�𝑜(𝑠)

�̂�(𝑠)=

𝑉𝑖𝑛

𝐿𝐶𝑠2+𝐿

𝑅𝑠+1

………………… (2.24)

And

𝐺𝑖𝑜𝑑(𝑠) =�̂�𝐿(𝑠)

�̂�(𝑠)=

𝑉𝑖𝑛𝐶(𝑠+1

𝐶𝑅)

𝐿𝐶𝑠2+𝐿

𝑅𝑠+1

………………….. (2.25)

2.3.6: Feedback loop control of buck converter

Figure 20 below shows the block diagram of the buck converter control loop

𝑉𝑖𝑛 𝐼𝑖𝑛 𝑉𝑜𝑢𝑡 𝐼𝑜𝑢𝑡

+

-

Figure 2.18: buck converter feedback control loop block diagram

Where;

K is the current sensor gain

Gc (s) is the compensator transfer function

Giod (s) is the control to output current transfer function

Vm is the peak to peak ramp input into the comparator

Therefore, the overall transfer function Hs of the system is given by;

𝐻𝑆 = 𝐾 ∙ 𝐺𝑐(𝑠) ∙1

𝑉𝑚∙ 𝐺𝑖𝑜𝑑(𝑠)…………… (2.26)

This control loop model requires the design of the compensator transfer function in order to meet

the desired system performance. Giod(s) is used to get the overall transfer function because

constant current supply is desired.

2.3.7: Buck converter compensator design

If the performance specifications for the buck converter are given, different compensators can be

designed to meet the specified performance criteria. The performance specification can be a

certain Gain Margin, Phase Margin, Crossover frequency, Bandwidth and resonant peak.

2.3.7.1: Type I compensator

Giod (s)

K

1

𝑉𝑚

Gc (s)

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A pure integrator compensator is a type I compensator. Type I compensator circuit is as shown in

figure 2.19 below.

Figure 2.18: Type I compensator (Integrator)

The transfer function of the compensator is given by; 𝑉𝑒

𝑉𝑜𝑢𝑡= −

1

𝑅1𝐶𝑠……………….. (2.27)

When variation in Ve is found to differ from the set reference voltage, Rbias is adjusted to return

Ve back to the required value [1] [8].

2.3.7.2: Type II compensator

Type II compensator contains an integrator, plus one pole and one zero and it has the transfer

function given below.

𝐺𝐶(𝑠) =𝑎

𝑠∙

(1+𝑠𝑏⁄ )

(1+𝑠𝑐⁄ )

…………… (2.28)

Where;

a = integrator gain

b = compensator zero

c = compensator pole [8]

2.3.7.3: Type III compensator

A type III compensator has two zeros, two poles, plus an integrator. This compensator has the

transfer function given below.

𝐺𝑐(𝑠) = 𝑎

𝑠∙

(1+𝑠𝑏1

⁄ )

(1+𝑠𝑐1⁄ )

∙(1+𝑠

𝑏2⁄ )

(1+𝑠𝑐2⁄ )

………….. (2.29)

Where;

𝑏1 & 𝑏2, are compensator zeros

𝑐1 & 𝑐2 , are compensator poles [8]

27

NOTE: All these types of compensator can be designed using MATLAB SISOTOOL when

given the system transfer function and the desired performance specifications. For more

knowledge on this, refer to this link;

www.mathworks.com/help/control/getstart/siso-design-tool.html

2.3.8: Analytical waveform analysis of a buck converter

The following are the analytical waveforms of the various components of a buck converter in

CCM;

Figure 2.19: Inductor voltage and current, output capacitor current, and switch current

waveforms [3] [1].

28

Figure 2.20; Inductor voltage and current, output capacitor current, and switch current

waveforms [3] [1].

2.3.9: Buck converter efficiency

The main causes of power losses in a dc-dc buck converter are:

MOSFET switching losses

MOSFET conduction losses

Inductor conduction losses [4].

Capacitor conduction losses.

2.3.9.1: Inductor power losses

The conduction loss of the inductor is as shown;

𝑃𝐿 = 𝐼2𝑟𝑚𝑠𝐿 × 𝑅𝐷𝐶𝑅

Where, 𝑅𝐷𝐶𝑅= inductor dc resistance

𝐼2𝑟𝑚𝑠𝐿 = 𝐼2𝑜 +∆𝐼2

12

Where, ∆𝐼 = ripple current.

∆𝐼 is 20% of the output current. Therefore, the inductor current can be estimated to be,

𝐼𝑟𝑚𝑠𝐿 = 𝐼𝑜 × 1.00167

Since the ripple current only contributes 0.1675 of the inductor current, it can be neglected so

that the power losses in the inductor becomes;

𝑃𝐿 = 𝐼2𝑜 × 𝑅𝐷𝐶𝑅 ……………. (2.30)

2.3.9.2: MOSFET power losses

Figure 2.21 below shows a high side MOSFET current.

Figure 2.20: High side MOSFET current

29

Power loss in the high side is given by;

𝑃𝑄1 = 𝐼2𝑟𝑚𝑠𝑄1 + 𝑅𝐷𝑆𝑂𝑁1

Where, 𝑅𝐷𝑆𝑂𝑁1= drain-to-source on time resistance of high side MOSFET.

If we substitute for 𝐼𝑟𝑚𝑠 𝑄1:

𝑃𝑄1 =𝑉𝑜

𝑉𝑖𝑛× (𝐼𝑜

2 +∆𝐼2

12) × 𝑅𝐷𝑆𝑂𝑁1

Figure 2.22 shows low side MOSFET current.

Figure 2.21: High side MOSFET current

.Power loss in the low side of the MOSFET is given by;

𝑃𝑄2 = 𝐼2𝑟𝑚𝑠𝑄2 × 𝑅𝐷𝑆𝑂𝑁2

Where, 𝑅𝐷𝑆𝑂𝑁2= drain-to-source on time resistance of low side MOSFET.

Substituting for 𝐼𝑟𝑚𝑠𝑄2:

𝑃𝑄2 = (1 −𝑉𝑜

𝑉𝑖𝑛) × (𝐼𝑜

2 +∆𝐼2

12) × 𝑅𝐷𝑆𝑂𝑁2

Total loss by MOSFETs is given by;

𝑃𝐹𝐸𝑇 = 𝑃𝑄1 + 𝑃𝑄2

Substituting for 𝑃𝑄1 and 𝑃𝑄2;

𝑃𝐹𝐸𝑇 = (𝐼𝑜2 +

∆𝐼2

12) × (

𝑉𝑜

𝑉𝑖𝑛× (𝑅𝐷𝑆𝑂𝑁1 − 𝑅𝐷𝑆𝑂𝑁2) + 𝑅𝐷𝑆𝑂𝑁2)

Where, ∆𝐼 =(𝑉𝑖𝑛−𝑉𝑜)×𝑉𝑜

𝐿×𝑓×𝑉𝑖𝑛

Since the contribution of ∆𝐼2

12 is very small, it can be ignore and hence;

𝑃𝐹𝐸𝑇 = 𝐼𝑜2 × (

𝑉𝑜

𝑉𝑖𝑛× (𝑅𝐷𝑆𝑂𝑁1 − 𝑅𝐷𝑆𝑂𝑁2) + 𝑅𝐷𝑆𝑂𝑁2) …………….. (2.31)

30

When 𝑅𝐷𝑆𝑂𝑁1 = 𝑅𝐷𝑆𝑂𝑁2, power loss in the MOSFET becomes independent of the output

voltage. Other losses like inductor conduction losses and switching losses are independent of

output voltage and they do not change with change in output voltage.

Therefore,

𝑃𝐷 = 𝑃𝐿 + 𝑃𝐹𝐸𝑇 + 𝑜𝑡ℎ𝑒𝑟 𝑙𝑜𝑠𝑠𝑒𝑠………………….. (2.32)

If output power of power supply and total power supply losses are known, then overall efficiency

can be computed as follows; [4].

𝜂 =𝑃𝑜

𝑃𝑜+𝑃𝐷…………………….. (2.33)

2.3.9.3: Diode losses

Estimate diode current is given by;

𝐼𝐷 = (1 − 𝐷) × 𝐼𝑙𝑜𝑎𝑑

Diode forward voltage = 𝑉𝐹

Diode reverse voltage = 𝑉𝑖𝑛

Power dissipated by the diode is given by;

𝑃𝐷𝑖𝑜𝑑𝑒 = 𝑉𝐹 × 𝐼𝑙𝑜𝑎𝑑…………….. (2.34)

2.3.9.4: Capacitor losses

Estimated power dissipation in the output capacitor is given by;

𝑃𝐶𝑎𝑝 = (𝐼𝑟𝑖𝑝𝑝𝑙𝑒)2

× 𝐸𝑆𝑅………… (2.35)

2.4: Digital control of dc-dc buck converter

The emergence of digital signal processing (DSP) has led to DSP being preferred for use over

analogue based controls for controlling high frequency SMPS. This is because DSP

advantageous over analogue based control. Even though analogue controllers are simple and

cheap, they have drawbacks like, drifting when temperature changes, ageing, and susceptibility

to noise. However, digital controllers have guaranteed accuracy and can be modified to fit user

preferences without carrying any hardware changes [7].

CHAPTER 3: DESIGN

3.1: Determination of Ni-Cd battery charging voltage

The first design activity of this project was to do a preliminary test on the Ni-Cd battery cells to

determine the charging voltages at various charging currents and subsequently calculating the

internal resistances at every instance.

The result was tabulated as shown in Table 1 below.

From equation 2.13,

𝐷 =𝑉𝑜𝑢𝑡

𝑉𝑖𝑛, where 𝑉𝑖𝑛 = 20𝑉

31

𝐼𝑖𝑛 = 𝐷𝐼𝑜𝑢𝑡

𝑅𝐿 =𝑉𝑜𝑢𝑡

𝐼𝑜𝑢𝑡

There are 5 rechargeable Ni-Cd battery cells each of 1.2V connected in series to give a total

voltage of 6V. The capacity of each battery cell is 2000mAh.

Table 1: Experimental battery parameters

𝐼𝑜𝑢𝑡(𝐴) 𝑉𝑜𝑢𝑡(𝑉) 𝐷 𝐼𝑖𝑛(𝐴) 𝑅𝐿(𝑂ℎ𝑚𝑠)

2.0 7.76 0.388 0.776 3.88

1.8 7.70 0.385 0.693 4.28

1.6 7.63 0.382 0.611 4.77

1.4 7.55 0.378 0.529 5.39

1.2 7.50 0.375 0.450 6.25

1.0 7.43 0.372 0.372 7.43

0.8 7.36 0.368 0.294 9.20

0.6 7.28 0.364 0.218 12.13

0.4 7.21 0.361 0.144 18.03

0.2 7.12 0.356 0.071 35.60

From Table 1, maximum, middle, and minimum charging currents were considered in design.

3.2: 1.2A charging current

The design specifications are;

𝐼𝑜𝑢𝑡 = 1.2𝐴

𝑉𝑖𝑛 = 20𝑉

𝑉𝑜𝑢𝑡 = 7.50𝑉

𝐷1 = 0.375

𝑅𝐿1 = 6.25

𝐹𝑠𝑤 = 50𝑘𝐻𝑧

𝐼𝑟𝑖𝑝𝑝𝑙𝑒 = 20% 𝑜𝑓 𝐼𝑜𝑢𝑡

i.e. 𝐼𝑟𝑖𝑝𝑝𝑙𝑒 = 0.24𝐴

𝑉𝑟𝑖𝑝𝑝𝑙𝑒 = 1% 𝑜𝑓 𝑉𝑜𝑢𝑡

i.e. 𝑉𝑟𝑖𝑝𝑝𝑙𝑒 = 0.075𝑉

3.2.1: Inductor value

From equation 2.10,

𝐿 =(𝑉𝑖𝑛 − 𝑉𝑜𝑢𝑡) × 𝐷

𝐹𝑠𝑤 × 𝐼𝑟𝑖𝑝𝑝𝑙𝑒𝑢𝐻

32

𝐿1 =(20 − 7.50) × 0.375

50 × 10^3 × 0.24𝑢𝐻

𝐿1 = 390.63𝑢𝐻 ≈ 391𝑢𝐻

3.2.2: Output capacitor value

From equation 2.14a,

𝐶 =𝐼𝑟𝑖𝑝𝑝𝑙𝑒

8 × 𝐹𝑠𝑤 × 𝑉𝑟𝑖𝑝𝑝𝑙𝑒𝑢𝐹

𝐶1 =0.24

8 × 50 × 10^3 × 0.075𝑢𝐹

𝐶1 = 8𝑢𝐹

3.2.3: Control to output current transfer function

From equation 2.25,

𝐺𝑖𝑜𝑑(𝑠) =𝑖̂𝐿(𝑠)

�̂�(𝑠)=

𝑉𝑖𝑛𝐶(𝑠 +1

𝐶𝑅)

𝐿𝐶𝑠2 +𝐿𝑅 𝑠 + 1

𝐺𝑖𝑜𝑑1(𝑠) =𝑖̂𝐿(𝑠)

�̂�(𝑠)=

20 × 8 × 10^ − 6 × (𝑠 +1

8 × 10^ − 6 × 6.25)

8 × 10^ − 6 × 391 × 10^ − 6 × 𝑠2 +391 × 10^ − 6

6.25× 𝑠 + 1


�̂�(𝑠)=

1.6 × 10^ − 4(𝑠 + 20000)

3.129 × 10^ − 9 × 𝑠2 + 6.256 × 10^ − 5 × 𝑠 + 1


Specifications are;




𝐷2 = 0.356

𝑅𝐿2 = 35.60





33





𝐿2 =(20 − 7.12) × 0.356

50 × 10^3 × 0.04𝑢𝐻

𝐿2 = 2.29𝑚𝐻 ≈ 2𝑚𝐻




𝐶2 =0.04

8 × 50 × 10^3 × 0.0712𝑢𝐹

𝐶2 = 1.4𝑢𝐹



�̂�(𝑠)=


𝐶𝑅)



�̂�(𝑠)=

20 × 1.4 × 10^ − 6 × (𝑠 +1

1.4 × 10^ − 6 × 35.6)

1.4 × 10^ − 6 × 2.29 × 10^ − 3 × 𝑠2 +2.29 × 10^ − 3

35.6× 𝑠 + 1


�̂�(𝑠)=

2.8 × 10^ − 5(𝑠 + 20064.21)

3.206 × 10^ − 9 × 𝑠2 + 6.433 × 10^ − 5 × 𝑠 + 1


Specifications are;




𝐷3 = 0.375

𝑅𝐿3 = 3.88






34




𝐿3 =(20 − 7.76) × 0.388

50 × 10^3 × 0.4𝑢𝐻

𝐿3 = 237.46𝑢𝐻 ≈ 237𝑢𝐻




𝐶3 =0.4

8 × 50 × 10^3 × 0.0776𝑢𝐹

𝐶3 = 13𝑢𝐹



�̂�(𝑠)=


𝐶𝑅)



�̂�(𝑠)=

20 × 13 × 10^ − 6 × (𝑠 +1

13 × 10^ − 6 × 3.88)

13 × 10^ − 6 × 237 × 10^ − 6 × 𝑠2 +237 × 10^ − 6

3.88 × 𝑠 + 1


�̂�(𝑠)=

2.6 × 10^ − 4(𝑠 + 19825.54)

3.08 × 10^ − 9 × 𝑠2 + 6.11 × 10^ − 5 × 𝑠 + 1

35

Figure 3.0 : uncompensated bode plots of 𝑮𝒊𝒐𝒅𝟏(𝒔), 𝑮𝒊𝒐𝒅𝟐(𝒔), 𝒂𝒏𝒅 𝑮𝒊𝒐𝒅𝟑(𝒔)

3.5: PSIM open loop design circuit

The buck converter was then modelled in PSIM simulation software and the calculated

components values inserted for every charging current as shown in fig. 4 below.

Figure 3.1: Buck converter circuit in PSIM

36

From Fig 3.0, it can be seen that the open loop systems for the three selected charging currents

are stable with infinite gain margins but the phase margins lye between 90 and 100 degrees

which is too high.

It is therefore necessary to compensate the system to a desired phase margin of about 45 degrees

by adding a phase lag to improve the steady state performance of the system. A compensator

which can perform this function better is Proportional + Integral (PI)

3.6: Compensator Design

PI compensator design was done using MATLAB SISOTOOL as shown in the screen print of

figure 3.2 below for the system of 1.2A charging current and used for the compensation of all the

other systems.

Figure 3. 2: MATLAB SISOTOOL PID compensator design screen print

The designed PI compensator has the transfer function;

𝐺𝐶(𝑠) = 3335.7 ∙(1 + 9.2−6𝑠)

𝑠

37

Figure 3. 3: Bode plot of the designed PI compensator

3.7: PSIM closed loop circuit design

After the PI compensator was successfully designed in MATLAB, a closed loop system was then

modelled in PSIM with the PI compensator in the feedback control loop as shown in Fig 13.

𝑉𝑚 Was chosen to be a saw tooth wave of 1V peak to peak and a duty cycle of 1 𝐼𝑟𝑒𝑓 = 1, and

the current sensor with a gain of 1

𝐼𝑜𝑢𝑡= 𝐾.

Figure 3. 4: Analogue buck converter control circuit in PSIM.

38

How the feedback control loop of the converter works for maintaining a constant current

A pulse input of peak to peak voltage of 20V has been used to represent a varying input voltage.

The current sensor gain is set such that it gives out a voltage of 1 for any charging current

desired. The 1V from the sensor is the compared with the reference voltage in the controller and

an error signal computed. The error signal should be ideally zero if there is no disturbance in the

output current. If the output current deviates from the required value, a non-zero error signal will

be computed and sent into the PI compensator. After the compensator, the signal will enter the

comparator and comparator will produce the adjusted PWM to return the output current to its

desired value. .

The transfer function of the compensated closed loop system is given by;

𝐻𝑠 = 𝐺𝑖𝑜𝑑(𝑠) × 𝐺𝑃𝐼(𝑠) ×1

𝑉𝑚× 𝐾…………….. (3.1)

Therefore, for the three designed systems we have;

𝐻1 = 𝐺𝑖𝑜𝑑1(𝑠) × 𝐺𝑃𝐼(𝑠) ×1

𝑉𝑚× 𝐾1

𝐻1 = 1571.54 ∙(𝑠 + 2 × 104)(𝑠 + 1.09 × 105)

𝑠(𝑠2 + 2 × 104𝑠 + 3.20 × 108)


𝑉𝑚× 𝐾2

𝐻2 = 268.41 ∙(𝑠 + 2.01 × 104)(𝑠 + 1.09 × 105)

𝑠(𝑠2 + 2 × 104𝑠 + 3.12 × 108)


𝑉𝑚× 𝐾3

𝐻3 = 2594.38 ∙(𝑠 + 1.98 × 104)(𝑠 + 1.09 × 105)

𝑠(𝑠2 + 1.98 × 104𝑠 + 3.28 × 108)

Figure 3.5 shows the Bode plot of the compensated systems with the same PI controller

39

Figure 3. 5: Bode plot of compensated system and uncompensated system

From figure 3.4, it can be observed that the PI controller improved the Phase Margins to 45, 89,

and 67 degrees of Giod1, Giod2, and Giod3 respectively. The compensated systems have infinite

Gain Margins.

3.8: Digital control design

For digital control of the buck converter, the PI controller transfer function was transformed into

discrete form at a sampling frequency of 50 kHz using PSIM as shown in Figure 3.5 below.

40

Figure 3. 6: Analogue to digital compensator transformation.

The discrete PI compensator has the transfer function shown below;

𝐺𝐶(𝑧) = 3369.59 ∙2 × 10−5

2∙

1 + 𝑧−1

1 − 𝑧−1

The transformation from s-domain to z-domain of the PI compensator transfer function was done

using ‘Tustin/Bilinear’ method.

3.8.1: Digital control loop circuit

The designed digital feedback control loop of the buck converter was modelled and simulated in

PSIM as shown in figure 18 below.

41

Figure 3.7: Digital buck converter control circuit in PSIM

The digital control works with the same principle as the analogue control.

3.9: Switch gate driver design

Power IGBTs and MOSFETs are voltage driven switches because they have an insulated gate

which acts like a capacitor. There turn ON and turn OFF waveforms exhibit a ‘step’ which

remains at a constant level while the drain voltage rises or falls when they are switching.

Miller voltage is the voltage at which the gate voltage remains during switching. For most

applications, miller voltage is around 4-6v depending on the current being switched.

Figure 3.8: gate driver IC circuit

42

Gate driver IC or optocoupler is an electronic device which transfers a voltage signal from one

part of a circuit to another while isolating the two circuits electrically from each other. As seen

from Figure 3.7 above, it consists of an infrared emitting LED chip which is optically levelled

with a light sensitive silicon semiconductor chip. The silicon chip can be a diode, photo SCR,

photo Darlington, or a photo transistor as in figure 3.7. The gate driver circuit isolates the buck

converter circuit from the digital control circuit. RD is the resistance protecting the photodiode

and its value depends on the maximum forward voltage and current of the photodiode and the

value of the input signal. RL is the gate source resistance for protecting the MOSFET.

Vbias range from 10V to 20V depending on the gate turn on voltage of the MOSFET.

CHAPTER 4: PRACTICAL IMPLEMENTATION AND RESULTS

For practical implementation and results, the design parameters of 1.2A nominal charging

current was selected because it is desired to charge the batteries in medium range, not fast or

slow.

4.1: SIMULATION RESULTS

4.1.1: Open loop simulated results

The simulation waveforms were as follows;

Figure 4.0 1: Inductor and output currents waveforms.

Figure 4.1: Capacitor, diode, and inductor currents waveforms

43

Figure 4.2: switch voltage waveform.

Figure 4. 3: switch current waveform

.

Figure 4. 4: Output voltage waveform

44

Figure 4. 5: Diode, input and output voltage waveforms

.4.1.2: Analogue control closed loop simulation results

Figure 4. 6: Inductor current and output current waveforms

Figure 4. 7: Switch, inductor, and capacitor currents waveforms


45

Figure 4. 9: Input, diode, and output voltage waveforms.

4.1.3: Digital control closed loop simulation results

Figure 4. 10: Inductor and output current waveforms

Figure 4. 11: Capacitor, diode, and inductor current waveforms.

46


Figure 4. 13: Diode, input, and output voltage waveforms

4.2: PRACTICAL IMPLEMENTATION

4.2.1: MOSFET gate driver

PC817 optocoupler IC was chosen for the gate driver circuit because it is inexpensive, reliable,

and readily available. It has a CTR>20%, maximum forward voltage of 1.5V and maximum

forward current of 10mA. Therefore,

𝑅𝐷 =3.3𝑉 − 1.5𝑉

0.01= 180 𝑂ℎ𝑚𝑠

𝑅𝐿 = 3.3 𝐾𝑂ℎ𝑚𝑠

Vbias = 15𝑉

47

Figure 4. 14: Practical gate drive circuit

Figure 4. 15: practical gate drive input signal

48

Figure 4. 16: Simulated and practical gate drive output voltage waveforms

.For practical implementation of the open loop buck converter, a P-Channel MOSFET i.e.

IRF9450 was chosen for simplicity of the gate drive circuitry and low Rds (on). Low Rds (on)

leads to low switching losses. Its current and voltage rating are higher than the circuit rating so

that the MOSFET specifications are not exceeded.

The diode used was 1N5820 schottky diode with a reverse voltage of 40V and current rating of

3A. Its forward voltage drop is 0.4V.

A 10uF, 50V electrolytic output capacitor was used with an ESR of 0.12Ohms. It was chosen

because it can handle the output voltage ripple requirements.

A 380uH ferrite core inductor with an ESR of 0.5 Ohms was designed.

49

Figure 4. 17: Practical digital controlled battery charger

The digital feedback control loop and charge control was implemented using DSP Launchpad

F28027 programmed to perform dc-dc converter control.

50

Figure 4. 18: Practical and simulated inductor current and voltage

Figure 4. 19: Practical and simulated switch current waveform

51

Figure 4. 20: Practical and simulated output current waveform

Table 2: Results

CALCULATED SIMULATED PRACTICAL

Output current (A) 1.2 1.18 1.04

Output Voltage (V) 7.5 7.47 8.1

CHAPTER 5: DISCUSSION

The designed battery charger exhibited better performance with minimum error evidenced by the

results collected from simulation and part of practical implementation. To prolong the life of Ni-

Cd battery cells, a constant current should be provided for a particular period of time and then

withdrawn once the battery if fully charged to prevent overcharging which damages most of

batteries. In this project, various scenarios that occur while charging Ni-Cd batteries were put

into consideration and solved.

The issue of overcharging was eliminated by providing an end of charge indicator which signals

the user to disconnect the charger. The charger uses −∆ voltage end of charge detection method.

Sometimes, in power systems, variations occur in voltages and currents due to faults, load

changes and other forms of disturbances. Therefore, the designed charger is able to withstand

such changes and still continue to provide a constant charging current to the battery. This

stability was tested when the battery circuit was supplied by a pulsating voltage and the result

was still a constant current. To verify this, look at figures 4.0 and 4.10. Other charging current

52

options were also provided and future users of this charger will have numerous options for

charging their batteries. The digital control loop implemented by DSP provides efficient

operation of the buck converter because it has a very high frequency capability and SMPSs are

more efficient at high frequencies. This charger is also easy to design and implement because it

contains few number of components that are inexpensive.

Efficiency of the built buck converter

Component power losses

From equations 2.30, 2.31, 2.33, and 2.35, we get the following power losses and overall

efficiency.

MOSFET power loss = 0.028W

Inductor losses = 0.72W

Diode losses = 0.3W

Capacitor losses = 0.00144W

Total losses = 1.049W

Converter output power = 1.04x8.1=8.424W

Efficiency, 𝜂 =8.424

9.47× 100= 88.96%

For larger capacity batteries like industrial Ni-Cd batteries used in power system protection

circuits, the same design procedure is followed but with increased capacity as per the

requirement of the battery to be charged.

CHAPTER 6: CONCLUSION AND FUTURE WORK

6.1: Conclusion

The whole of the project lifespan concentrated in the design of a more efficient dc-dc buck

converter that would be used to charge Ni-Cd battery cells. After the design, a digital control

circuit was incorporated using DSP for current regulation. The charger was therefore, designed

successfully meeting all specification. However, the practical implementation presented some

0.72

0.028

0.3

1

2

3

4

53

challenges in the part of implementing the digital control feedback loop using DSP. This is

because, DSP require special equipment like an advanced oscilloscope to monitor and measure

its characteristics during coding and implementation stages. Such equipments are still not

available in the University.

6.2: Future work

Recommendations for future work

1. A timing circuit should be included in the charger for backup in case the negative

gradient detection method fails to detect the end of charge correctly.

2. The designed charger can be improved to be automatic so that it disconnects the battery

when it is full.

3. A similar charger can be designed for other types of batteries with different charging

requirements and brought together to make one multicharger.

REFERENCES

1. Fundamental of power electronic second edition, Robert w. Erickson

2. Czarkowski D and Kazimierczuk M K 1993 IEEE Trans. Aerosp. Electron. Syst. 29 1059

3. Power Electronics Handbook, 2001, Dariusz Czarkowski, Chapter 13.

4. Calculating Efficiency PMP-DCDC Controllers, SLVA390 February-2010, Arvind Raj,

Texas Instruments.

5. Battery Charging, SNVA557 2011, Chester Simpson, Texas Instruments.

6. LAUNCHXL-F28027 C2000 Piccolo Launchpad Experimenter Kit, SPRUHH2A July-

2012, Texas Instruments.

7. Texas Instrument, C28x Digital Power Library

8. Srivatsa Raghunath, Digital Loop Exemplified, Texas instrument application report,

slua622, december 2011

APPENDIX A: Bill of Quantities

COMPONENTS TYPE QUANTITY PRICE (Kshs.)

Battery cells Ni-Cd 1.2V, 2000mAh 5 1750

MOSFET IRF9540 1 80

DSP LAUNCHPAD F28027 1 1,600

Current sensor ACS712 1 900

Voltage sensor 25V 1 500

Diode 1N5820 1 20

Capacitors 10uF, 0.1uF 6 30

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Resistors 180R, 3.3K 2 10

Optocoupler PC817 1 50

Vero board 7cm by 15cm 1 100

Bread board 1 250

APPENDIX B: DSP schematic

APPENDIX C: DSP modules used

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APPENDIX D: ProjectName-Main.c

// FILE: ProjectName-Main.C

//

// Description: The file drives duty on PWM1A using C28x

// C28x ISR is triggered by the PWM 1 interrupt

//

// Version: 2.0

//

// Target: TMS320F2802x(PiccoloA),

//

//----------------------------------------------------------------------------------

// Copyright Texas Instruments © 2004-2010

//----------------------------------------------------------------------------------

#include "ProjectName-Settings.h"

#include "PeripheralHeaderIncludes.h"

#include "DSP2802x_EPWM_defines.h"

#include "DPlib.h"

#include "IQmathLib.h"

// Add protoypes of functions being used in the project here

void DeviceInit(void);

#ifdef FLASH

void InitFlash();

#endif

void MemCopy();

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//-------------------------------- DPLIB --------------------------------------------

void PWM_1ch_CNF(int16 n, int16 period, int16 mode, int16 phase);

void ADC_SOC_CNF(int ChSel[], int Trigsel[], int ACQPS[], int IntChSel, int mode);

// -------------------------------- FRAMEWORK --------------------------------------

// State Machine function prototypes

//----------------------------------------------------------------------------------

// Alpha states

void A0(void); //state A0

void B0(void); //state B0

void C0(void); //state C0

// A branch states





// B branch states





// C branch states





// Variable declarations

void (*Alpha_State_Ptr)(void); // Base States pointer

void (*A_Task_Ptr)(void); // State pointer A branch

void (*B_Task_Ptr)(void); // State pointer B branch

void (*C_Task_Ptr)(void); // State pointer C branch

// -------------------------------- FRAMEWORK --------------------------------------

int16 VTimer0[4]; // Virtual Timers slaved off CPU Timer 0



// Used for running BackGround in flash, and ISR in RAM

extern Uint16 *RamfuncsLoadStart, *RamfuncsLoadEnd, *RamfuncsRunStart;

// Used for copying CLA code from load location to RUN location

extern Uint16 Cla1funcsLoadStart, Cla1funcsLoadEnd, Cla1funcsRunStart;

// Used for ADC Configuration

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int ChSel[16] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};

int TrigSel[16] = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};

int ACQPS[16] = {7,7,7,7,7,7,7,7,7,7,7,7,7,7,7,7};

// Used to indirectly access all EPWM modules

volatile struct EPWM_REGS *ePWM[] =

{ &EPwm1Regs, //intentional: (ePWM[0] notused)

&EPwm1Regs,

&EPwm2Regs,

&EPwm3Regs,

&EPwm4Regs,

};

// Used to indirectly access all Comparator modules

volatile struct COMP_REGS *Comp[] =

{ &Comp1Regs, //intentional: (Comp[0] not used)

&Comp1Regs,

&Comp2Regs,

};

// ---------------------------- DPLIB Net Pointers ---------------------------------

//ADCDRV_1ch - instance #1

extern volatile long *ADCDRV_1ch_Rlt0; //instance 0

// CONTROL_2P2Z - instance #1

extern volatile long *CNTL_2P2Z_Ref1;

extern volatile long *CNTL_2P2Z_Out1;

extern volatile long *CNTL_2P2Z_Fdbk1;

extern volatile long *CNTL_2P2Z_Coef1;

// PWMDRV_1ch

extern volatile long *PWMDRV_1ch_Duty1; // instance #1, EPWM1

// ---------------------------- DPLIB Variables ---------------------------------

// Declare the net variables being used by the DP Lib Macro here

volatile long ADCOut, Filter_Out , Ref_Value;

#pragma DATA_SECTION(CNTL_2P2Z_CoefStruct1, "CNTL_2P2Z_Coef");

struct CNTL_2P2Z_CoefStruct CNTL_2P2Z_CoefStruct1;

// -------------------------------- FRAMEWORK --------------------------------------

// sets a limit on the amount of external GUI controls - increase as necessary

int16 *varSetTxtList[16]; //16 textbox controlled variables

int16 *varSetBtnList[16]; //16 button controlled variables

int16 *varSetSldrList[16]; //16 slider controlled variables

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int16 *varGetList[16]; //16 variables sendable to GUI

int16 *arrayGetList[16]; //16 arrays sendable to GUI

int16 LedBlinkCnt;

// ---------------------------------- USER -----------------------------------------

// Variables for background support only (no need to access)

int16 i; // common use incrementer

Uint32 HistPtr, temp_Scratch; // Temp here means Temporary

// MAIN CODE - starts here

void main(void)

{

DeviceInit(); // Device Life support & GPIO

#ifdef FLASH

// symbols are created by the linker. Refer to the linker files.

MemCopy(&RamfuncsLoadStart, &RamfuncsLoadEnd, &RamfuncsRunStart);

InitFlash(); // Call the flash wrapper init function

#endif //(FLASH)

// Timer period definitions found in PeripheralHeaderIncludes.h

CpuTimer0Regs.PRD.all = mSec1; // A tasks

CpuTimer1Regs.PRD.all = mSec10; // B tasks

CpuTimer2Regs.PRD.all = mSec100; // C tasks

// Tasks State-machine init

Alpha_State_Ptr = &A0;

A_Task_Ptr = &A1;

B_Task_Ptr = &B1;

C_Task_Ptr = &C1;

VTimer0[0] = 0;

VTimer1[0] = 0;

VTimer2[0] = 0;

LedBlinkCnt = 5;

// Configure PWM1 for 50Khz (Period Count= 60Mhz/50Khz = 1200)

PWM_1ch_CNF(1, 1200, 1, 0);

//Map channel to ADC Pin

ChSel[0]=14; //Map channel 0 to pin ADC-B6

// Select Trigger Event for ADC conversion

TrigSel[0]= ADCTRIG_EPWM1_SOCA;

// ADC interrupt after EOC of channel 0

ADC_SOC_CNF(ChSel,TrigSel,ACQPS,0,2);

// Configure the EPWM1 to issue the SOC

59

EPwm1Regs.ETSEL.bit.SOCAEN = 1;

EPwm1Regs.ETSEL.bit.SOCASEL = ET_CTR_PRD; // Use PRD event as trigger

for ADC SOC

EPwm1Regs.ETPS.bit.SOCAPRD = ET_1ST; // Generate pulse on every event

// Digital Power CLA(DP) library initialisation

DPL_Init();

// Connect the ADC Output to the Net Variable

ADCDRV_1ch_Rlt0 = &ADCOut;

// Connect the CNTL_2P2Z block to the variables

CNTL_2P2Z_Fdbk1 = &ADCOut;

CNTL_2P2Z_Out1 = &Filter_Out;

CNTL_2P2Z_Ref1 = &Ref_Value;

CNTL_2P2Z_Coef1 = &CNTL_2P2Z_CoefStruct1.b2;

// Connect the PWM Driver input to the output of the controller 2P2Z

PWMDRV_1ch_Duty1 = &Filter_Out;

// Initialize the Controller Coefficients

CNTL_2P2Z_CoefStruct1.b2 = _IQ26(0.0);



CNTL_2P2Z_CoefStruct1.a2 = _IQ26(0.0);

CNTL_2P2Z_CoefStruct1.a1 = _IQ26(1.0);

CNTL_2P2Z_CoefStruct1.max =_IQ24(0.7);

CNTL_2P2Z_CoefStruct1.min =_IQ24(0.1);

//Initialize the net Variables/nodes

Ref_Value=_IQ24(0.82);

Filter_Out=_IQ24(0.0)

//Also Set the appropriate # define's in the {ProjectName}-Settings.h

//to enable interrupt management in the ISR

;EALLOW;

PieVectTable.EPWM1_INT = &DPL_ISR; // Map Interrupt

PieCtrlRegs.PIEIER3.bit.INTx1 = 1; // PIE level enable, Grp3 / Int1

EPwm1Regs.ETSEL.bit.INTSEL = ET_CTR_PRD; // INT on PRD event

EPwm1Regs.ETSEL.bit.INTEN = 1; // Enable INT

EPwm1Regs.ETPS.bit.INTPRD = ET_1ST; // Generate INT on every event

IER |= M_INT3; // Enable CPU INT3 connected to EPWM1-6 INTs:

EINT; // Enable Global interrupt INTM

ERTM; // Enable Global realtime interrupt DBGM

EDIS;

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//--------------------------------- FRAMEWORK -------------------------------------

for(;;) //infinite loop

{

// State machine entry & exit point

//===========================================================

(*Alpha_State_Ptr)(); // jump to an Alpha state (A0,B0,...)

//===========================================================

}

} //END MAIN CODE

//====================================================================

=============

// STATE-MACHINE SEQUENCING AND SYNCRONIZATION

//--------------------------------- FRAMEWORK -------------------------------------

void A0(void)

{

// loop rate synchronizer for A-tasks

if(CpuTimer0Regs.TCR.bit.TIF == 1)

{

CpuTimer0Regs.TCR.bit.TIF = 1; // clear flag

//-----------------------------------------------------------

(*A_Task_Ptr)(); // jump to an A Task (A1,A2,A3,...)

//-----------------------------------------------------------

VTimer0[0]++; // virtual timer 0, instance 0 (spare)

}

Alpha_State_Ptr = &B0; // Comment out to allow only A tasks

}

void B0(void)

{

// loop rate synchronizer for B-tasks


{


//-----------------------------------------------------------

(*B_Task_Ptr)(); // jump to a B Task (B1,B2,B3,...)

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//-----------------------------------------------------------

VTimer1[0]++; // virtual timer 1, instance 0 (spare)

}

Alpha_State_Ptr = &C0; // Allow C state tasks

}

void C0(void)

{

// loop rate synchronizer for C-tasks


{


//-----------------------------------------------------------

(*C_Task_Ptr)(); // jump to a C Task (C1,C2,C3,...)

//-----------------------------------------------------------

VTimer2[0]++; //virtual timer 2, instance 0 (spare)

}

Alpha_State_Ptr = &A0; // Back to State A0

}

void A1(void)

{

//the next time CpuTimer0 'counter' reaches Period value go to A2

A_Task_Ptr = &A2;

}

void A2(void)

{


A_Task_Ptr = &A3;

}

void A3(void)

{


A_Task_Ptr = &A4;

}

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void A4(void)

{


A_Task_Ptr = &A1;

void B1(void)

{

//the next time CpuTimer1 'counter' reaches Period value go to B2

B_Task_Ptr = &B2;

}

void B2(void) // Blink LED on the control CArd

{

if(LedBlinkCnt==0)

{

GpioDataRegs.GPBTOGGLE.bit.GPIO34 = 1; //turn on/off LD3 on

the controlCARD

LedBlinkCnt=5;

}

else

LedBlinkCnt--;


B_Task_Ptr = &B3;

}

void B3(void)

{


B_Task_Ptr = &B4;

}

void B4(void) // SPARE

{

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//-----------------


B_Task_Ptr = &B1;

}

void C1(void)

{

//the next time CpuTimer2 'counter' reaches Period value go to C2

C_Task_Ptr = &C2;

}

void C2(void) -

{


C_Task_Ptr = &C3;

}

void C3(void)

{

C_Task_Ptr = &C4;

}

void C4(void) // SPARE

{


C_Task_Ptr = &C1;

//-----------------

}

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