AD8452-EVALZ User GuideUG-1180

One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com

Universal Evaluation Board for the AD8452

PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 14

FEATURES Pin accessible, standalone AD8452 Simplified operation: connect a power supply and scope and

start looking at waveforms On-board precision 5 V reference included for accurate gain

measurements Factory tested Four optional control loops available but not necessary for

operation; may be bypassed as desired Safe: only low power circuitry is present; no accidental

power discharges

ADDITIONAL EQUIPMENT NEEDED +12 V, +5 V, −5 V bench supply: Keysight E3631 or equivalent

power supply with current metering and adjustable output current-limiting

±50 mV diode emulation/current-limiting bias voltage Oscilloscope: Tektronix DPO7104 or multichannel equivalent DMM: 4½ digit or greater Test jumpers with grabber or mini-gator clips Optional: power amplifier, Li-Ion battery, current transducer

(low resistance shunt)

DOCUMENTS NEEDED AD8452 data sheet

GENERAL DESCRIPTION The AD8452-EVALZ is a platform for the AD8452, designed for investigation of the AD8452 analog and pulse-width modulation (PWM) features and performance without the added complica-tions of a driver and/or switch mode power supply (SMPS) design. For convenience, a precision 5 V reference IC and four trim pots are built in to the evaluation board, for driving the battery current and voltage ISET and VSET inputs. All device pins are accessible with test loops or probe landings.

At the same time, the AD8452-EVALZ has the flexibility to interface and drive a typical half bridge inductor input SMPS with output levels in the 1 A to 15 A range. SMPS and associated components are specified and sourced by the user.

The AD8452 is intended for use as the core controller for commercial battery test and formation systems. Its advanced miniaturization and extraordinarily high level of analog precision meet the challenge of mass production of high energy density storage lithium ion packs for transportation and energy storage in homes.

Figure 1 is a photograph of the AD8452-EVALZ. When working with the evaluation board, consult the AD8452 data sheet for a detailed device Theory of Operation and for additional information in conjunction with this user guide.

EVALUATION BOARD PHOTOGRAPH

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Figure 1.

UG-1180 AD8452-EVALZ User Guide

Rev. 0 | Page 2 of 14

TABLE OF CONTENTS Features .............................................................................................. 1 Additional Equipment Needed ....................................................... 1 Documents Needed .......................................................................... 1 General Description ......................................................................... 1 Evaluation Board Photograph ......................................................... 1 Revision History ............................................................................... 2 Overview of the AD8452.................................................................. 3

Evaluation Board Hardware .............................................................4 Test Setup........................................................................................5

Evaluation Board Schematics and Artwork ...................................9 Ordering Information .................................................................... 13

Bill of Materials ........................................................................... 13 Related Links ................................................................................... 14

REVISION HISTORY 10/2017—Revision 0: Initial Version

AD8452-EVALZ User Guide UG-1180

Rev. 0 | Page 3 of 14

OVERVIEW OF THE AD8452 The AD8452 is a front-end controller for battery test or formation systems. It is a 48-lead device in a 7 mm × 7 mm LQFP package, comprised of a high performance analog section and PWM.

A block diagram is shown in Figure 2. Refer to the AD8452 data sheet for a full description.

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2

8

7

6

5

4

3

2

9

12

11

10

ISVP

VREG = 5V

ISVN

33

28

27

25

34

AVEE

1

26

35

38

29

ISREFH

VREF

ISREFLS

ISREFL

IVE1

ISM

EA

IVE0

ISET

VIN

T

AG

ND

CLN

AVC

C

CLP

VVE1

VIN

T

VVE0

VVP0

VSET

CL

VSET

B

AVCC

37

BVREFH

BVPS

BVREFL

BVP

BVNS

BVREFLS

EN

BVM

EA

BVN

MO

DE

500Ω

100kΩ

BATTERYCURRENTSENSE IA

G = 66

SS

MODE_B

31

32

AVC

C

300Ω

60kΩ

AVE

E

AVE

E

36

DH

DL

VIN

CLV

T

SCFG

FAU

LT

VREG

DT

SS

FREQ

DGND

SYNC

1MΩ

1MΩSS

CL

SS

1×

80kΩ200kΩ

SS DISCHARGE

8.5MΩ

200kΩ

SCFG

SCFG

CONFIGDETECT

30

4V

1×

SYNC

SYNC DETECT

AVEE

AVCC

BATTERYVOLTAGESENSE DAG = 0.4

17 1815 161413 19 20 21 22 23 24

AVEE

CLFLG

AVCC44 404245 3943 41464748

DMAXDMAX

VREG

DMAX

D

C

DC

D C

MODE'

CLFLG

CLFLG

SYNC

OSCILLATOR

VREG

UVLO

TSD

BANDGAP

MODE_B

5µA

+/–

79.7kΩ

2.5VVREF

1MΩ CURRENT LIMITAND DIODEEMULATION

VSET

BU

FFER

MODE_B

CV LOOPFILTER

AMPLIFIER

SOFT-STARTAMPLIFIER

1.1mA

CC LOOPFILTER

AMPLIFIER

VCTRL-COMP

IDMAX11µA

ISCFG11µA

VBG = 1.252V

MODE_B

DRIVELOGIC

0.3µA

1.64pF

10µA 20µA

20µA

VFREQ = 1.252V

Figure 2. Detailed Block Diagram of the AD8452 Showing the High Performance Analog Section and the PWM Section

UG-1180 AD8452-EVALZ User Guide

Rev. 0 | Page 4 of 14

EVALUATION BOARD HARDWARE Figure 3 is a system level block diagram comprising three functional system level block diagrams, an AD8452-EVALZ block diagram, including its user adjustable current and voltage control compensation matrix, and a simple precision reference (an ADR4550) for driving current and voltage inputs throughout the PWM conversion process to the outputs DH and DL.

The balance of the large signal system in Figure 3 is user supplied and consists of the metal-oxide semiconductor field effect transistor (MOSFET) driver and user supplied SMPS, an inductor-capacitor (L-C) output filter with a current limiting resistor (RCL), and a current sense shunt.

A description of some simple experiments with the AD8452 follows. The AD8452-EVALZ can be connected as the analog and PWM small signal digital controller of a complete battery formation system, allowing users to explore the AD8452 functions in detail, with an emulated system input/output (I/O) provided. The board can also be operated as a channel controller for a power channel custom designed to the unique needs and requirements of the user.

For more system information on system applications, including communication links, see the AD8452 UG-1181.

COMPENSATIONMATRIX

D

D

D

D

D

D

C

C

C

ADR4550(+5VR)

+5VR

OUTPUTSWITCHES

(USERSUPPLIED)

LLPF RCL

LEVE

LSH

IFTE

R

ADI EVAL-ADUMX3223EBZ

(TYPICAL)

CLPF

BATTERY FORMATION SYSTEM-LEVEL CHANNEL

CONTROLLER

BATTERY

CURRENTSENSESHUNT

ISVP

ISVN

BVP

BVN

MODESWITCHES

(3)

BATTERYCURRENT

(IBAT)

AVEE

CONSTANT CURRENTLOOP FILTER AMPLIFIER

1×VINT

BUFFER

VSET

BU

F

VSET

ISET

CDCD

CDVINT

ISMEA

VVE1

VVE0

VVP0

AD8452

IBAT

C = CHARGED = DISCHARGE

CONSTANT VOLTAGELOOP FILTER AMPLIFIER

IVE1

IVE0

BUCKBOOSTPWM

SELECTIBAT

POLARITY

1.1mAVREG

DH

DISABLE

VIA

VIBDL

ISVP

ISVN

CURRENTLIMIT AND

DIODEEMULATION

CHARGE

DISCHARGE

1×

+5VR

VBAT

+5VR

EXTERNAL DC TO DCPOWER CONVERTER

AND BATTERY CIRCUITRY(USER SUPPLIED)

AD8452-EVALZ

BVMEADA

IA

C

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Figure 3. Block Diagram Showing the AD8452 and External Circuitry Boundaries

AD8452-EVALZ User Guide UG-1180

Rev. 0 | Page 5 of 14

TEST SETUP

+5V

−5V

+12V

GND

4-CHANNEL SCOPE POWER SUPPLY±50mV BIAS SUPPLY

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Figure 4. Typical Setup for the AD8452-EVALZ Bench Test

Jumper Positions

There are five 2-pin jumpers installed on the evaluation board (see Figure 5). Table 1 shows their location and function.

Table 1. Jumper Locations and Functions Location Function P3 VSET input. P4 ISET input. CONN_VIN Connects AVCC to VIN. P1-1 and P1-2 Shorts ISVP and ISVN to keep instrumentation

amplifier voltage input at 0 V. P1-3 and P1-4

Inserted for Charge Mode Test

Shorts BVP and BVN to keep difference amplifier input at 0 V.

P1-3 and P1-4 Removed for Discharge Mode Test

Mimics the state of battery conditions during a discharge cycle by simulating a fully charged battery. The lower value VSET voltage establishes the withdrawal current from the higher voltage battery.

DC Testing—Board Setup and Power Supply Currents

With the evaluation board set up as shown in Figure 4, the power supply currents are those shown in Table 2. The test loops in Figure 4 are color coded: black is for ground; red for positive voltages; orange for negative voltages; green for 5 V logic supplies; and purple corresponds to the signal test points shown in the schematic (see Figure 8). When power is applied to the evaluation board, there can be a momentary current surge, especially if the filter capacitors are not recently charged. This behavior is normal, and the supply currents settle to their typical values in a few seconds. It is strongly recommended that the power supply used for experimenting feature current metering and current-limiting.

Table 2. Power Supply Load Currents by Supply Pin

Supply (V) Power Supply Current Limiting (Optional) (mA)

Load Current (Typical)

AVCC (+12) 20 +9 mA −5 10 −4 mA +5 5 +1 μA

UG-1180 AD8452-EVALZ User Guide

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Pin VIN on the AD8452 (U1) is connected by Jumper CONN_ VIN to Pin AVCC and the AVCC net on the evaluation board, and provides power to the PWM and 5 V low dropout (LDO) regulator sections. 5 V is externally available at Pin VREG for low current applications such as pull-up resistors, but loading of VREG should not exceed 5 mA. Jumper CONN_VIN can be removed if the user needs to test the device with higher supply voltages. Otherwise, it is recommended to remain in place.

5 V Reference Supply and Input Trimmers

The AD8452-EVALZ includes the ADR4550 on-board 5 V reference (U2) for a stable input source.

Four trimmers provide independent control voltages for current and voltage in both charge/discharge modes. This makes switching from charge to discharge possible without having to reset the current or voltage control levels. These levels are factory set and are not likely to require adjustment. Charge current, discharge current, and charge voltage are set at 2.5 V. Discharge voltage is set for 1.5 V so that tests of the PWM function can occur with the expected polarity of battery voltage and current flow.

Current Limit Threshold Voltage (at Pin CLVT)

The CLVT pin voltage is generated by forcing 20 μA through Resistor R104 (4.99 kΩ). When probing Pin CLVT to measure the voltage, look for a small bare copper dot above and to the left of U1, Pin 37. The voltage is 105 mV + 30 mV or − 25 mV To disable the current limit function, pull Pin CLVT high.

Instrumentation Amplifier (In-Amp)

When installed as intended in a system, the in-amp measures bidirectional battery current, and is controlled by the MODE function. If the mode switch is in charge (that is, the handle is to the right), Pin ISMEA measures 0.660 V with a 10 mV voltage from VSHH to VSHL. When the mode switch is in discharge mode, the voltage at ISMEA still reads 0.660 V, because the mode switch reverses the input voltage polarity. However, the voltage at ISMEA reads −0.660 V if the 10 mV input voltage polarity is reversed and the mode switch remains in charge mode. This type of test is useful to verify that the in-amp output swings both positive and negative outputs.

The inputs to the in-amp are floating. If the output voltage floats high, connect VSHL to a nearby ground pin with a grabber clip jumper or a small soldered wire.

Difference Amplifier

The difference amplifier measures battery voltage. The polarity of the voltage is always positive; however, the difference amplifier gain is <1 to reduce the integrator voltage to a value within the linear range of the integrator.

To exercise the difference amplifier, set the mode switch to the charge position (switch handle to the right), apply 1 V dc from a voltage source from VBATH to VBATL, and connect VBATL to a nearby ground pin with a grabber clip jumper). Verify that the output at BVMEA is 0.4 V ± 0.4 mV.

Pin FREQ and Pin SYNC

Apply power and activate the enable switch (move the switch handle to the lower position). Connect a digital multimeter (DMM) probe to Pin FREQ and verify that the dc voltage reads 1.25 V.

Under the same conditions, connect a scope probe to Pin SYNC. Observe a square wave with a period of 10 μs ± 1 μs.

Soft Start—DC at Pin SS and Turn On Ramp

Activate the enable switch. After 1 second, verify that the dc voltage on Pin SS reads 4.9 V to 5 V.

The only way to change the turn on delay of the AD8452 is to change Capacitor CSS. Use a good quality ceramic capacitor such as an NP0/C0G or a high dielectric X7 style, because the capacitor ramp time is a function of the 20 μA current source. Less stringent performance capacitors such as the Y5 series are sufficient for many applications, but can exhibit enough leakage to fail before the maximum applied voltage is realized. An easy calculation for capacitor value is to scale the capacitor by the desired ramp time. The default ramp time for the capacitor installed in the evaluation board is 1 sec, achieved with a 1 μF capacitor. To reduce the time by a factor of 10, exchange the 1 μF capacitor for a 0.1 μF model.

Test of PWM and Driver Outputs DH and DL for Charge and Discharge Modes

The following two experiments demonstrate the timing and waveform details of the AD8452 in real time, using a scope, with file storage capabilities for future reference. Figure 5 shows a photograph of the setup for the experiment, and Figure 6 and Figure 7 show a 100 kHz clock and PWM outputs of the high and low gate drivers (DH and DL, respectively), along with the controlling analog signal (VINT). Two slightly different setups demonstrate the operation of the AD8452 in charge and discharge modes.

AD8452-EVALZ User Guide UG-1180

Rev. 0 | Page 7 of 14

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Figure 5. Typical Test Setup for Scope Observations

Charge Mode

Connect the vertical inputs of a 4-channel oscilloscope to the four outputs of the AD8452-EVALZ (listed in Table 3). The Pin DH and Pin DL waveforms are the control signals for the output power MOSFET switches.

Table 3. Scope Connections to Observe Driver Waveforms Channel Function Pin 1 Displays the clock signal SYNC (clock waveform) 2 High switch drive (DH) Test Loop DH 3 Low switch drive (DL) P2-2 (center pin) 4 Integrator output (VINT) VINT

On the scope, set the vertical scale of all four channels to 5 V per division (5 V/div) and select Channel 1 as the trigger source. Before applying power to evaluation board, verify that the ENABLE switch is in the up position. Connect the amplifier inputs and jumpers according to the following steps:

1. Connect a jumper from the VINT test loop to the VVE1 test loop. This connection sets the gain of the constant voltage (CV) loop to unity.

2. Verify that there are shorting shunts installed from P1-1 to P1-2 and from P1-3 to P1-4. These jumpers set the output voltages VISMEA and BVMEA to 0 V by ensuring that the current shunt and battery voltage inputs are 0 V.

3. Connect the positive lead from a 50 mV bias supply to Pin CLP (the current limit positive pin) to Pin CLN (the current limit negative pin).

4. Move the MODE switch to charge (switch handle to the right). 5. Enable the AD8452 by moving the ENABLE switch handle

to the down position.

The output voltages appear as shown in Figure 6. Note that SYNC (Channel 1, the black pulse display) and DH (Channel 2, blue pulse display) are in phase with one another, while SYNC and DL (Channel 3, red) are 180° out of phase with one another. The antiphase relationship of DH and DL are important, because it ensures the two output devices are never switched on at the same time, and it forces current from the supply to the load (battery).

Discharge Mode

With the circuit disabled (the ENABLE switch is in the up position), follow the same steps as in the Charge Mode section, with the following exceptions: 1. Move the VINT jumper from the VVE1 test loop to the

VVE0 test loop. This connection sets the CV loop gain to unity again, but in discharge mode.

2. Remove the shorting shunt from P1-3 to P1-4 and, using two jumpers, connect the VBATH test loop to 5 V, and connect the VBATL test loop to ground.

3. Reverse the polarity of the 50 mV bias supply by connecting the positive lead from the 50 mV bias supply to Pin CLN and the negative lead to Pin CLP.

4. Move the MODE switch to discharge (switch handle to the left). Enable the AD8452 by moving the ENABLE switch handle to the down position.

The output voltages appear as shown in Figure 7. Note that DL is in phase with SYNC, and DH is 180° out of phase with SYNC. This phase relationship forces current from the load (battery) back to the supply.

UG-1180 AD8452-EVALZ User Guide

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Another useful experiment can be performed using the same setup described previously, by changing scope settings. Instead of a 10 μs/div free running horizontal sweep, set the horizontal control to single sweep and the scale to a longer interval, such as 200 ms/div. Disable the AD8452, clear the scope screen of any prior waveforms and reenable the AD8452. Expect to see a timing sequence in which DH comes on before DL in charge mode, and the opposite in discharge mode. See the Soft Start section in the AD8452 data sheet for more details.

CH1 5.0V CH2 5.0V A CH1 1.3VBW

CH3 5.0V CH4 5.0VBW

BWBW

1

4

3

216

188-

006

SYNC

DH

DL

VINT

Figure 6. Operating in Charge Mode; Waveforms at the AD8452 PWM

Outputs SYNC, DH, and DL, and Integrator DC Level VINT

CH1 5.0V CH2 5.0V A CH1 1.3VBWCH3 5.0V CH4 5.0VBW

BWBW

1

4

3

2

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SYNC

DH

DL

VINT

Figure 7. Operating in Discharge Mode; Waveforms at the AD8452 PWM

Outputs SYNC, DH, and DL, and Integrator DC Level VINT

AD8452-EVALZ User Guide UG-1180

Rev. 0 | Page 9 of 14

EVALUATION BOARD SCHEMATICS AND ARTWORK

DG

ND

DG

ND

C CD DDC

(DIS

)

(EN

)

4.99

K

1UF

1UF

1UF

1UF

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121K

0.00

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100

100

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0.00

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2200

PF

0.00

1UF

1K

0.01

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270P

F

270P

F

YEL

10U

F

GR

NR

ED

121K

0.00

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PUR

PUR

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7

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20K

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200

20K

20K

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8452

AST

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4.7K

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1

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TL

VBA

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GN

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D3

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D9

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D4

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DG

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+5V

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V

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LG

+5VR

+5VR

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VVP0BVMEA

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DH

AG

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SS

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T_H

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R

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AG

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VREFAGNDAVCC

ISETISMEA

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AVCCCLNCLP

CLVT

FREQ

DM

AX

SS DT

DG

ND

DH DL

VIN

VREG

SCFG

SYN

CC

LFLG

FAULTENMODEAVEEVINTVVE1VVE0VSETBBVMEAVVP0VSETAVEE

BVR

EFH

BVR

EFLS

BVR

EFL

BVN

SB

VNB

VPS

BVP

ISVN

ISVP

ISR

EFLS

ISR

EFL

ISR

EFH

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Figure 8. Schematic of the AD8452-EVALZ

UG-1180 AD8452-EVALZ User Guide

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Figure 9. Primary Side Silk Screen

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Figure 10. AD8452-EVALZ Primary Side—All Components Located on This Side

AD8452-EVALZ User Guide UG-1180

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Figure 11. AD8452-EVALZ Layer Two—Ground

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Figure 12. AD8452-EVALZ Layer Three—Power

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Figure 13. AD8452-EVALZ Bottom Layer—Copper

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ORDERING INFORMATION BILL OF MATERIALS

Table 4. Reference Designator Description Manufacturer Part Number +5V Connector, printed circuit board (PCB) test

point, green Components Corporation

TP-105-01-05

−5V Connector, PCB test point, yellow Components Corporation

TP-105-01-04

AVCC Connector, PCB test point, red Components Corporation

TP-105-01-02

BVMEA, BVREFH, CLFLG, CLN, CLP, DH, DL, DMAX, DT, FREQ, ISET, ISMEA, ISREFH, IVE1, IVEO, SCFG, SS, SYNC, VBATH, VBATL, VIN, VINT, VREF, VREG, VSET, VSETB, VSHH, VSHL, VVE0, VVE1, VVPO

Connectors, PCB test point, purple Components Corporation

TP-105-01-07

C1, C2, C3, C94 Capacitors, ceramic, X6S, general purpose, 10 μF, 35 V, 10%

Murata GRM21BC8YA106KE11L

C7, C61, C63, C67, C68, C88, C89, C90, C99, C100, C101, C102, CSS

Capacitors, ceramic, X5R, general purpose, 1 μF, 50 V, 10%

Taiyo Yuden UMK107AB7105KA-T

C4, C83, C84, C86, C87, C92, C95 Capacitors, ceramic, X7R, 0603, 0.1 μF, 50 V, 10% AVX 06035C104KAT2A C5, C6, C93 Capacitors, ceramic, C0G, 47 pF, 50 V, 5% AVX 06035A470JAT2A C8, C58, C59, C77, C78, C79, C80 Capacitors, ceramic, C0G (NP0), general purpose,

0.001 μF, 50 V, 5% Murata GRM1885C1H102JA01D

C64, C65, C66 Capacitors, ceramic, C0G (NP0), general purpose, 560 pF, 50 V, 5%

Murata GRM1885C1H561JA01D

C69, C70 Capacitors, ceramic, C0G (NP0), general purpose, 270 pF, 50 V, 5%

Murata GRM1885C1H271JA01D

C71, C72 Capacitors, ceramic, C0G, 0.01 μF, 50 V, 5% TDK CGA3E2C0G1H103J080AA C74, C75, C76 Capacitors, ceramic, NP0, 39 pF, 50 V, 5% Murata GRM1885C1H390JA01D C81, C82 Capacitors, ceramic, chip, C0G, 0603, 2200 pF,

50 V, 5% TDK C1608C0G1H222J

CONN_VIN, P3, P4 Connectors, PCB header, one row, two way Harwin M20-9990246 ENABLE Switch, SPDT, PCB mounted, slide ITT OS102011MS2QN1 GND1, GND2, GND3, GND4, GND5, GND6, GND7, GND8, GND9, GND10, GND11, GND12, GND13, GND14, GND_RET

Connectors, PCB test point, black Components Corporation

TP-105-01-00

ISETCHG, ISETDIS, VSETCHG, VSETDIS Resistors, 1/4 inch square, trimpot trimming, 20 kΩ, 10%

Bourns 3269W-1-203GLF

MODE Switch slide, 4PDT TE Connectivity MSS420004 P1 Connector, PCB header, male, straight, 2.54 mm

pitch, 3.05 mm solder tail Sullins PREC004SAAN-RC

P2 Connector, PCB header, 2.54 mm pitch, SIL vertical PC tail (tin)

Harwin M20-9990346

R100, R101, R102 Resistors, precision, thick film chip, 121 kΩ, 1% Panasonic ERJ-3EKF1213V R104 Resistor, precision, thick film chip, 4.99 kΩ, 1% Panasonic ERJ-3EKF4991V R2, R4, R11, R80, R81, R82, R83, R105 Resistors, film, SMD, 0603, 0 Ω, 5% Panasonic ERJ-3GEY0R00V R30, R79, R93, R107 Resistors, chip, SMD, 0603, 200 Ω, 1% Panasonic ERJ-3EKF2000V R109, R111 Resistors, chip, 0603, 4.7 kΩ, 50 V, 1% Bourns CR0603-FX-4701ELF R113, R115 Resistors, precision, thick film chip, R0603,

10 kΩ, 1% Panasonic ERJ-3EKF1002V

R5, R77, R78 Resistors, precision, thick film chip, R0603, 1 kΩ, 1%

Panasonic ERJ-3EKF1001V

R6 Resistor, precision, thick film chip, 20 kΩ, 1% Panasonic ERJ-3EKF2002V R7 Resistor, jumper, SMD, 1206, 0 Ω, 0% Panasonic ERJ-8GEY0R00V

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Reference Designator Description Manufacturer Part Number R8, R9 Resistors, precision, thick film chip, R0603,

100 Ω, 1% Panasonic ERJ-3EKF1000V

R85, R86 Resistors, precision, thick film chip, 0603, 64.9 kΩ, 50 V

Panasonic ERJ-3EKF6492V

R90, R91, R92 Resistors, thick film chip, 6.65 kΩ, 1% Vishay CRCW06036K65FKEA R94, R95 Resistors, thick film chip, 0603, 6.04 kΩ, 75 V, 1% Vishay CRCW06036K04FKEA R96, R97, R98 Resistors, precision, thick film chip, 0603,

78.7 kΩ, 50 V, 1% Panasonic RJ-3EKF7872V

RFRQ Resistor, precision, thick film chip, 100 kΩ, 50 V, 1%

Panasonic ERJ-3EKF1003V

U1 AD8452 Analog Devices AD8452ASTZ U2 ADR4550 Analog Devices ADR4550BRZ RELATED LINKS Resource Description UG-1181 AD8452 Battery Testing and Formation Evaluation Board AN-1319 Compensator Design for a Battery Charge/Discharge Unit Using the AD8450 or the AD8451

ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.

Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc. (“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term “Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.

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